diff --git a/README.md b/README.md
index 8094b68..2dc6ba0 100644
--- a/README.md
+++ b/README.md
@@ -197,7 +197,11 @@
 | FPGA_IO_SPARE_0_2 | rst_i    |      135 | PA0       | GPIO_Output     | Active high         |
 | FPGA_IO_SPARE_0_0 | mode_i   |      137 | PB11      | GPIO_Output     | FPGA operation mode |
 | FPGA_IO_SPARE_0_1 | valid_o  |      136 | PB10      | GPIO_Output     | Data/Transfer Valid |
-| DSPI_SCK          | sclk_i   |       76 | PB2       | QUADSPI_CLK     |                     |
-| DSPI_CS           | cs_n     |       75 | PB6       | QUADSPI_BK1_NCS |                     |
-| DSPI_IO1          | mosi_i   |       74 | PC10      | QUADSPI_BK1_IO1 |                     |
 | DSPI_IO0          | miso_i   |       73 | PC9       | QUADSPI_BK1_IO0 |                     |
+| DSPI_IO1          | mosi_i   |       74 | PC10      | QUADSPI_BK1_IO1 |                     |
+| DSPI_CS           | cs_n     |       75 | PB6       | QUADSPI_BK1_NCS |                     |
+| DSPI_SCK          | sclk_i   |       76 | PB2       | QUADSPI_CLK     |                     |
+| FPGA_IO_SPARE_2_0 |          |       49 | PA7       | SPI1_MOSI       |                     |
+| FPGA_IO_SPARE_2_1 |          |       48 | PA6       | SPI1_MISO       |                     |
+| FPGA_IO_SPARE_2_2 |          |       47 | PA5       | SPI1_SCK        |                     |
+| FPGA_IO_SPARE_2_3 |          |       45 | PA4       | SPI1_NSS        |                     |
diff --git a/fpga/fpga_image.gni b/fpga/fpga_image.gni
index fd8cee0..c6f9c69 100644
--- a/fpga/fpga_image.gni
+++ b/fpga/fpga_image.gni
@@ -71,7 +71,7 @@
   }
 
   pw_exec("${target_name}._json") {
-    inputs = _verilog_files
+    inputs = [ _pcf_file ] + _verilog_files
     outputs = [
       _json_file,
       _yosys_log,