commit | 63be56551efa8f515e4a41accaa96a56acaa0390 | [log] [tgz] |
---|---|---|
author | Anthony DiGirolamo <tonymd@google.com> | Mon Dec 18 22:33:30 2023 +0000 |
committer | CQ Bot Account <pigweed-scoped@luci-project-accounts.iam.gserviceaccount.com> | Mon Dec 18 22:33:30 2023 +0000 |
tree | 32d836509fffc7ede2216d89c859858a4cb9aa4f | |
parent | 8e681efab60a43a24260913e7f9febf3f2497a07 [diff] |
fpga: Create fpga_image build template Change-Id: I85f157838060d8c0187bb66596afdc894d2a4bbb Reviewed-on: https://pigweed-review.googlesource.com/c/gonk/+/185471 Reviewed-by: Armando Montanez <amontanez@google.com> Commit-Queue: Anthony DiGirolamo <tonymd@google.com>
Clone the repo
git clone https://pigweed.googlesource.com/pigweed/gonk
Source bootstrap.sh
to download all compilers and tooling into the environment
directory:
. ./bootstrap.sh
This should init all git submodules for you.
From here on the Pigweed environment is activated. You can activate the environment in a new shell without re-running bootstrap by sourcing activate.sh
. ./activate.sh
Build for the host and device by running:
pw build
This is mostly a shortcut with nice output for running gn gen out/gn
and ninja -C out/gn
.
The build commands are defined in: //tools/gonk_tools/build_project.py
.
The Verilog build requires the following to be installed on Linux:
sudo apt install fpga-icestorm nextpnr-ice40 yosys
Run this to compile the Gonk Verilog:
pw build ninja -C out/gn fpga
The bitstream files will be written with the .bin
extenson under ./out/gn/obj/fpga/*/*.bin
.
spi_flash_test
Exampledfu-util
Create a bin file from the elf. This will be automated later.
arm-none-eabi-objcopy -O binary \ ./out/gn/arduino_size_optimized/obj/applications/spi_flash_test/bin/spi_flash_test.elf \ ./out/gn/arduino_size_optimized/obj/applications/spi_flash_test/bin/spi_flash_test.bin
Unplug gonk from USB and replug with MODE button held down.
Run dfu-util to flash.
dfu-util -d 0483:df11 -s 0x08000000:leave \ --serial STM32FxSTM32 -a 0 \ -D ./out/gn/arduino_size_optimized/obj/applications/spi_flash_test/bin/spi_flash_test.bin
Unplug Gonk from USB and replug to reset the hardware. SPI bus issues have been observed without this step.
Connect over serial.
python -m serial.tools.miniterm --raw /dev/ttyGonk 1000000
You should see output matching:
--- Miniterm on /dev/ttyGonk 1000000,8,N,1 --- --- Quit: Ctrl+] | Menu: Ctrl+T | Help: Ctrl+T followed by Ctrl+H --- INF Device id: 1f 84 1 INF Device id: 1f 84 1 INF Device id: 1f 84 1 INF Device id: 1f 84 1
./scripts/flash-with-blackmagic-probe.sh ./out/gn/arduino_size_optimized/obj/applications/spi_flash_test/bin/spi_flash_test.elf
Run the host app and connect to it via pw-system-console
:
./out/gn/host_device_simulator.speed_optimized/obj/applications/system_example/bin/system_example & \ pw-system-console --socket-addr default \ --proto-globs third_party/pigweed/pw_rpc/echo.proto ; \ killall system_example
Flashing
openocd -s $PW_PIGWEED_CIPD_INSTALL_DIR/share/openocd/scripts \ -f $GONK_ROOT/targets/stm32f769i_disc0_stm32cube/openocd_stm32f7xx.cfg \ -c "program out/gn/stm32f769i_disc0_stm32cube.size_optimized/obj/applications/system_example/bin/system_example.elf reset exit"
Checkout the desired commits in each of these submodules:
third_party/stm32cube_f7/cmsis_core third_party/stm32cube_f7/cmsis_device third_party/stm32cube_f7/hal_driver
Then run from Gonk root:
python -m pw_stm32cube_build gen_file_list third_party/stm32cube_f7
| Net | STM32 Pin | STM32 Function | Function | |--------+-----------+----------------+----------| | STATUS | PB13 | GPIO_Output | STAT LED |
Net | STM32 Pin | STM32 Function | Flash Pin |
---|---|---|---|
ICE_SPI_SS | PD2 | GPIO_Output | S# |
ICE_SPI_MISO | PB4 | SPI1_MISO | DQ1 |
ICE_SPI_MOSI | PB5 | SPI1_MOSI | DQ0 |
ICE_SPI_SCK | PB3 | SPI1_SCK | C |
FLASH_HOLD | PC11 | GPIO_Output | HOLD#/DQ3 |
FLASH_WP | PC12 | GPIO_Output | W#/VPP/DQ2 |
Net | Function | FPGA IO# | STM32 Pin | STM32 Function | Notes |
---|---|---|---|---|---|
FPGA_IO_SPARE_0_2 | rst_i | 135 | PA0 | GPIO_Output | Active high |
FPGA_IO_SPARE_0_0 | mode_i | 137 | PB11 | GPIO_Output | FPGA operation mode |
FPGA_IO_SPARE_0_1 | valid_o | 136 | PB10 | GPIO_Output | Data/Transfer Valid |
DSPI_SCK | sclk_i | 76 | PB2 | QUADSPI_CLK | |
DSPI_CS | cs_n | 75 | PB6 | QUADSPI_BK1_NCS | |
DSPI_IO1 | mosi_i | 74 | PC10 | QUADSPI_BK1_IO1 | |
DSPI_IO0 | miso_i | 73 | PC9 | QUADSPI_BK1_IO0 |