commit | 696d6b2471b11f1fc80767ae8479afdbbd289552 | [log] [tgz] |
---|---|---|
author | pigweed-roller <pigweed-roller@pigweed-service-accounts.iam.gserviceaccount.com> | Wed Mar 06 09:35:25 2024 +0000 |
committer | CQ Bot Account <pigweed-scoped@luci-project-accounts.iam.gserviceaccount.com> | Wed Mar 06 09:35:25 2024 +0000 |
tree | 806391cadce61f3c13c41c97e6657e20e6fe43d7 | |
parent | 7d7ff1a81cd456681866bdb60b3c5496b6cd42d4 [diff] |
[third_party/pigweed] Roll 11 commits 64bfe3952506478 pw_log: Add tests for Rust printf and println back ee60eb2ee49d19b third_party/stm32cube: Build template formatting f bc2a4e4cbcf4b94 pw_transfer: Respect user-specified resource size 2c13ea8f2033a76 pw_presubmit: Remove unused presubmit step 2c1ea5ca55a6136 pw_module: Remove README.md check 8425ed014a4751b bazel: Update rust_crates in Bazel WORKSPACE 4f37a0bd3126b44 pw_multibuf: Add MultiBufAllocator interface 710f2337bfb925c pw_digital_io_linux: Introduce new module 45fab0df4aca712 third_party/freertos: Create Bazel build template d551c36e7bb5799 pw_rpc: Expose CloseAndWaitForCallbacks in client 70708e6ee084070 third_party/emboss: Support latest version of Embo https://pigweed.googlesource.com/pigweed/pigweed third_party/pigweed Rolled-Commits: 385a1e4a5585ba2..64bfe3952506478 Roller-URL: https://ci.chromium.org/b/8754225121519702801 GitWatcher: ignore CQ-Do-Not-Cancel-Tryjobs: true Change-Id: I256b0f425ccc7e12c571e6a7b44f2126a3b67b24 Reviewed-on: https://pigweed-review.googlesource.com/c/gonk/+/195036 Bot-Commit: Pigweed Roller <pigweed-roller@pigweed-service-accounts.iam.gserviceaccount.com> Commit-Queue: Pigweed Roller <pigweed-roller@pigweed-service-accounts.iam.gserviceaccount.com>
Clone the repo
git clone https://pigweed.googlesource.com/pigweed/gonk
Source bootstrap.sh
to download all compilers and tooling into the environment
directory:
. ./bootstrap.sh
This should init all git submodules for you.
From here on the Pigweed environment is activated. You can activate the environment in a new shell without re-running bootstrap by sourcing activate.sh
. ./activate.sh
Build for the host and device by running:
pw build
This is mostly a shortcut with nice output for running gn gen out/gn
and ninja -C out/gn
.
The build commands are defined in: //tools/gonk_tools/build_project.py
.
The Verilog build requires the following to be installed on Linux:
sudo apt install fpga-icestorm nextpnr-ice40 yosys
Run this to compile:
pw build
The bitstream files will be written with the .bin
extenson under ./out/gn/obj/fpga/*/*.bin
along with log output files.
For example:
$ ls ./out/gn/obj/fpga/toplevel/ nextpnr-log.txt toplevel.asc toplevel.bin toplevel.json toplevel_timing_report.json toplevel_timing_report.txt yosys-log.txt
Flash the stm32f7 and launch the write_fpga.py
script on a bitstream file.
Unplug gonk from USB and replug with MODE button held down.
Run pw flash
on the MCU binary.
pw flash ./out/gn/arduino_size_optimized/obj/applications/fpga_config/fpga_config.bin
Write an FPGA bitstream with the write_fpga.py
script:
python ./tools/gonk_tools/write_fpga.py \ --bitstream-file ./out/gn/obj/fpga/toplevel/toplevel.bin --database ./out/gn/arduino_size_optimized/obj/applications/fpga_config/bin/fpga_config.elf \ --log-to-stderr
You can redirect host and device logs to separate files with:
python ./tools/gonk_tools/write_fpga.py \ --bitstream-file ./out/gn/obj/fpga/toplevel/toplevel.bin --database ./out/gn/arduino_size_optimized/obj/applications/fpga_config/bin/fpga_config.elf \ --host-logfile gonk-host-logs.txt \ --device-logfile gonk-device-logs.txt
./scripts/flash-with-blackmagic-probe.sh ./out/gn/arduino_size_optimized/obj/applications/spi_flash_test/bin/spi_flash_test.elf
On Linux with the FPGA toolchain available run:
pw build
The zip file containing all the dependencies for the gonk python tooling is located in:
out/gn/obj/gonk_bundle.zip
Inside are the Python wheels for gonk_dist
, gonk_firmware
, and all third_party dependencies.
gonk_bundle ├── python_wheels │ ├── appdirs-1.4.4-py2.py3-none-any.whl │ ├── astroid-3.0.1-py3-none-any.whl │ ├── ... │ ├── gonk_dist-0.0.1+20240305140627-py3-none-any.whl │ ├── gonk_firmware-0.0.1+20240305140542-py3-none-any.whl │ ├── ... │ └── wheel-0.40.0-py3-none-any.whl ├── requirements.txt ├── setup.bat └── setup.sh
Run the host app and connect to it via pw-system-console
:
./out/gn/host_device_simulator.speed_optimized/obj/applications/system_example/bin/system_example & \ pw-system-console --socket-addr default \ --proto-globs third_party/pigweed/pw_rpc/echo.proto ; \ killall system_example
Flashing
openocd -s $PW_PIGWEED_CIPD_INSTALL_DIR/share/openocd/scripts \ -f $GONK_ROOT/targets/stm32f769i_disc0_stm32cube/openocd_stm32f7xx.cfg \ -c "program out/gn/stm32f769i_disc0_stm32cube.size_optimized/obj/applications/system_example/bin/system_example.elf reset exit"
Checkout the desired commits in each of these submodules:
third_party/stm32cube_f7/cmsis_core third_party/stm32cube_f7/cmsis_device third_party/stm32cube_f7/hal_driver
Then run from Gonk root:
python -m pw_stm32cube_build gen_file_list third_party/stm32cube_f7
Net | STM32 Pin | STM32 Function | Function |
---|---|---|---|
STATUS | PB13 | GPIO_Output | STAT LED |
Net | FPGA IO# | STM32 Pin | STM32 Function | Flash Pin |
---|---|---|---|---|
ICE_SPI_SS | 71 | PD2 | GPIO_Output | S# |
ICE_SPI_MISO | 68 | PB4 | SPI1_MISO | DQ1 |
ICE_SPI_MOSI | 67 | PB5 | SPI1_MOSI | DQ0 |
ICE_SPI_SCK | 70 | PB3 | SPI1_SCK | C |
FLASH_HOLD | 63 | PC11 | GPIO_Output | HOLD#/DQ3 |
FLASH_WP | 64 | PC12 | GPIO_Output | W#/VPP/DQ2 |
Net | Function | FPGA IO# | STM32 Pin | STM32 Function | Notes |
---|---|---|---|---|---|
FPGA_IO_SPARE_0_2 | rst_i | 135 | PA0 | GPIO_Output | Active high |
FPGA_IO_SPARE_0_0 | mode_i | 137 | PB11 | GPIO_Output | FPGA operation mode |
DSPI_CS | valid_o | 75 | PB6 | GPIO_Output | Data/Transfer Valid |
FPGA_IO_SPARE_1_1 | miso_i | 101 | PC2 | SPI1_MISO | |
FPGA_IO_SPARE_1_0 | mosi_i | 99 | PC3 | SPI1_MOSI | |
I2C_O_SDA | cs_n | 79 | PB9 | SPI1_NSS | |
FPGA_IO_SPARE_0_1 | sclk_i | 136 | PB10 | SPI1_SCK | |
FPGA_IO_SPARE_2_0 | 49 | PA7 | |||
FPGA_IO_SPARE_2_1 | 48 | PA6 | |||
FPGA_IO_SPARE_2_2 | 47 | PA5 | |||
FPGA_IO_SPARE_2_3 | 45 | PA4 |