Gonk

Getting Started

1. Clone the repo

   git clone https://pigweed.googlesource.com/pigweed/gonk
   

2. Source bootstrap.sh to download all compilers and tooling into the environment directory:

   . ./bootstrap.sh
   

   This should init all git submodules for you.

3. From here on the Pigweed environment is activated. You can activate the environment in a new shell without re-running bootstrap by sourcing activate.sh

   . ./activate.sh
   

Compile:

Build for the host and device by running:

pw build

This is mostly a shortcut with nice output for running gn gen out/gn and ninja -C out/gn.

The build commands are defined in: //tools/gonk_tools/build_project.py.

Gonk Verilog:

The Verilog build requires the following to be installed on Linux:

sudo apt install fpga-icestorm nextpnr-ice40 yosys

Run this to compile the Gonk Verilog:

pw build

The bitstream files will be written with the .bin extenson under ./out/gn/obj/fpga/*/*.bin along with log output files.

For example:

$ ls ./out/gn/obj/fpga/toplevel/
nextpnr-log.txt
toplevel.asc
toplevel.bin
toplevel.json
toplevel_timing_report.json
toplevel_timing_report.txt
yosys-log.txt

Gonk fpga_config Example

Flash the stm32f7 and launch the write_fpga.py script on a bitstream file.

Flash with dfu-util

1. Unplug gonk from USB and replug with MODE button held down.

2. Run dfu-util to flash.

   dfu-util -d 0483:df11 -s 0x08000000:leave \
     --serial STM32FxSTM32 -a 0 \
     -D ./out/gn/arduino_size_optimized/obj/applications/fpga_config/fpga_config.bin
   

Write the FPGA bitstream

1. Write an FPGA bitstream with the write_fpga.py script:

   python ./tools/gonk_tools/write_fpga.py ./applications/fpga_config/fpga_blinky.bin
   

Gonk spi_flash_test Example

Flash with dfu-util

1. Unplug gonk from USB and replug with MODE button held down.

2. Run dfu-util to flash.

   dfu-util -d 0483:df11 -s 0x08000000:leave \
     --serial STM32FxSTM32 -a 0 \
     -D ./out/gn/arduino_size_optimized/obj/applications/spi_flash_test/spi_flash_test.bin
   

3. Unplug Gonk from USB and replug to reset the hardware. SPI bus issues have been observed without this step.

4. Connect over serial.

   python -m serial.tools.miniterm --raw /dev/ttyGonk 1000000
   

   You should see output matching:

   --- Miniterm on /dev/ttyGonk  1000000,8,N,1 ---
   --- Quit: Ctrl+] | Menu: Ctrl+T | Help: Ctrl+T followed by Ctrl+H ---
   INF  Device id: 1f 84 1
   INF  Device id: 1f 84 1
   INF  Device id: 1f 84 1
   INF  Device id: 1f 84 1
   

Flash with BlackMagic Probe:

./scripts/flash-with-blackmagic-probe.sh ./out/gn/arduino_size_optimized/obj/applications/spi_flash_test/bin/spi_flash_test.elf

pw_system Example

Run on Host

Run the host app and connect to it via pw-system-console:

./out/gn/host_device_simulator.speed_optimized/obj/applications/system_example/bin/system_example & \
  pw-system-console --socket-addr default \
    --proto-globs third_party/pigweed/pw_rpc/echo.proto ; \
  killall system_example

Run on Device

Flashing

openocd -s $PW_PIGWEED_CIPD_INSTALL_DIR/share/openocd/scripts \
  -f $GONK_ROOT/targets/stm32f769i_disc0_stm32cube/openocd_stm32f7xx.cfg \
  -c "program out/gn/stm32f769i_disc0_stm32cube.size_optimized/obj/applications/system_example/bin/system_example.elf reset exit"

Updating STM32Cube

Checkout the desired commits in each of these submodules:

third_party/stm32cube_f7/cmsis_core
third_party/stm32cube_f7/cmsis_device
third_party/stm32cube_f7/hal_driver

Then run from Gonk root:

python -m pw_stm32cube_build gen_file_list third_party/stm32cube_f7

Pin Map

Misc

| Net | STM32 Pin | STM32 Function | Function | |--------+-----------+----------------+----------| | STATUS | PB13 | GPIO_Output | STAT LED |

SPI Flash Connection

Net	STM32 Pin	STM32 Function	Flash Pin
ICE_SPI_SS	PD2	GPIO_Output	S#
ICE_SPI_MISO	PB4	SPI1_MISO	DQ1
ICE_SPI_MOSI	PB5	SPI1_MOSI	DQ0
ICE_SPI_SCK	PB3	SPI1_SCK	C
FLASH_HOLD	PC11	GPIO_Output	HOLD#/DQ3
FLASH_WP	PC12	GPIO_Output	W#/VPP/DQ2

FPGA Connection

Net	Function	FPGA IO#	STM32 Pin	STM32 Function	Notes
FPGA_IO_SPARE_0_2	rst_i	135	PA0	GPIO_Output	Active high
FPGA_IO_SPARE_0_0	mode_i	137	PB11	GPIO_Output	FPGA operation mode
FPGA_IO_SPARE_0_1	valid_o	136	PB10	GPIO_Output	Data/Transfer Valid
DSPI_SCK	sclk_i	76	PB2	QUADSPI_CLK
DSPI_CS	cs_n	75	PB6	QUADSPI_BK1_NCS
DSPI_IO1	mosi_i	74	PC10	QUADSPI_BK1_IO1
DSPI_IO0	miso_i	73	PC9	QUADSPI_BK1_IO0