)]}'
{
  "commit": "8f9f689b782748678e97b843665c0773b70d223b",
  "tree": "9acf4ad63bb522f1b922ed69032615f335efafcf",
  "parents": [
    "918840c1be48efa9260cff3204e8520101649e65"
  ],
  "author": {
    "name": "Anthony DiGirolamo",
    "email": "tonymd@google.com",
    "time": "Fri Jan 26 20:06:14 2024 +0000"
  },
  "committer": {
    "name": "CQ Bot Account",
    "email": "pigweed-scoped@luci-project-accounts.iam.gserviceaccount.com",
    "time": "Fri Jan 26 20:06:14 2024 +0000"
  },
  "message": "lib/adc: Continuous read fixes\n\n- Shorten delay to 1ms between each continuous read\n- Use WaitForFpgaIOValid() between continous reads instead of\n  checking for a pulse.\n- Update to latest verilog with fixed valid signal handling.\n\nChange-Id: Ieca3a955803b06287245e90f5574b8abdd35ace6\nReviewed-on: https://pigweed-review.googlesource.com/c/gonk/+/189370\nReviewed-by: Umang Shah \u003cumangshah@google.com\u003e\nCommit-Queue: Anthony DiGirolamo \u003ctonymd@google.com\u003e\n",
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