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commit34d7e4f0f6533d25705dcef1d6172955bfb48357[log] [tgz]
authorpigweed-roller <pigweed-roller@pigweed-service-accounts.iam.gserviceaccount.com>Wed Nov 13 09:37:15 2024 +0000
committerCQ Bot Account <pigweed-scoped@luci-project-accounts.iam.gserviceaccount.com>Wed Nov 13 09:37:15 2024 +0000
tree59609b061de48a540576866151333c6711f6cf05
parent8c59c74eb97ce682cc3974ecc747013cbe3ccbae [diff]
roll: third_party/pigweed 0422de1..c99ca8a (7 commits)

c99ca8a:https://pigweed-review.googlesource.com/c/pigweed/pigweed/+/248194 pw_presubmit: Accept clang-*: in commit messages for clang-tidy/-format
ab5df2c:https://pigweed-review.googlesource.com/c/pigweed/pigweed/+/248193 pw_system: Remove backwards compatibility overload of SystemStart()
d20009a:https://pigweed-review.googlesource.com/c/pigweed/pigweed/+/243818 pw_async2: Add PW_TRY_READY_* control flow macros
d38811b:https://pigweed-review.googlesource.com/c/pigweed/pigweed/+/247993 docs: Build target docs with Bazel
a3184cd:https://pigweed-review.googlesource.com/c/pigweed/pigweed/+/248233 many: Reduce use of `includes`
f662898:https://pigweed-review.googlesource.com/c/pigweed/pigweed/+/248272 pw_rpc_transport: Remove more stray includes
5f398c0:https://pigweed-review.googlesource.com/c/pigweed/pigweed/+/248172 pw_bluetooth_sapphire: Remove unused template

Rolled-Repo: https://pigweed.googlesource.com/pigweed/pigweed
Rolled-Commits: 0422de1761e52a..c99ca8ae0a441b
Roll-Count: 1
Roller-URL: https://cr-buildbucket.appspot.com/build/8731394704714089025
GitWatcher: ignore
CQ-Do-Not-Cancel-Tryjobs: true
Change-Id: If2ca40e5cfb3d2587be36ef193334ca756234693
Reviewed-on: https://pigweed-review.googlesource.com/c/gonk/+/248106
Lint: Lint 🤖 <android-build-ayeaye@system.gserviceaccount.com>
Bot-Commit: Pigweed Roller <pigweed-roller@pigweed-service-accounts.iam.gserviceaccount.com>
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1 file changed
tree: 59609b061de48a540576866151333c6711f6cf05
  1. applications/
  2. build_overrides/
  3. fpga/
  4. lib/
  5. pcb/
  6. scripts/
  7. targets/
  8. third_party/
  9. tools/
  10. activate.fish ⇨ bootstrap.fish
  11. activate.sh ⇨ bootstrap.sh
  12. .gitignore
  13. .gitmodules
  14. .gn
  15. banner.txt
  16. bootstrap.fish
  17. bootstrap.sh
  18. BUILD.gn
  19. BUILDCONFIG.gn
  20. OWNERS
  21. pigweed.json
  22. README.md
README.md

Gonk

Getting Started

NOTE: If you are using a gonk_tools.zip bundle follow the instructions in the //tools directory: https://pigweed.googlesource.com/gonk/+/refs/heads/main/tools/

  1. Clone the repo

    git clone https://pigweed.googlesource.com/gonk

  2. Source bootstrap.sh to download all compilers and tooling into the environment directory:

    . ./bootstrap.sh

    This should init all git submodules for you.

  3. From here on the Pigweed environment is activated. You can activate the environment in a new shell without re-running bootstrap by sourcing activate.sh

    . ./activate.sh

Capture ADC samples and plot

  1. First bootstrap, run pw build and flash gonk using DFU.

    . ./bootstrap.sh

    pw build

    Unplug gonk from USB and replug with MODE button held down.

    Run gonk-flash on the MCU binary. This uses pyfu-usb.

    gonk-flash ./out/gn/arduino_size_optimized/obj/applications/gonk/gonk.bin

  2. Start capturing ADC samples with:

    gonk \
  --bitstream-file DEFAULT \
  --log-to-stderr
    • Press Enter to stop or start ADC continuous updates. It will begin automatically on startup.
    • Press ctrl-c to quit.

  3. Plot the logs from gonk-csv-log.txt with:

    python tools/gonk_tools/plot.py -i gonk-csv-log.txt -o plot.svg

Compilation Details

Build for the host and device by running:

pw build

This is mostly a shortcut with nice output for running gn gen out/gn and ninja -C out/gn.

The build commands are defined in: //tools/gonk_tools/build_project.py.

Gonk Verilog Build

The Verilog build requires the following to be installed on Linux:

sudo apt install fpga-icestorm nextpnr-ice40 yosys

Running pw build will run the FPGA toolchain if these commands are available on the $PATH:

  • icepack
  • icetime
  • nextpnr-ice40
  • yosys

The bitstream files will be written with the .bin extenson under ./out/gn/obj/fpga/*/*.bin along with log output files.

For example:

$ ls ./out/gn/obj/fpga/toplevel/
nextpnr-log.txt
toplevel.asc
toplevel.bin
toplevel.json
toplevel_timing_report.json
toplevel_timing_report.txt
yosys-log.txt

Gonk Firmware Build

Flash the stm32f7 and launch the gonk.py script on a bitstream file.

Flash via DFU

  1. Unplug gonk from USB and replug with MODE button held down.

  2. Run gonk-flash which uses pyfu-usb. The --bin-file argument is optional.

    gonk-flash --bin-file ./out/gn/arduino_size_optimized/obj/applications/gonk/bin/gonk.elf

Alternative: Flash with BlackMagic Probe

This is more useful if you are doing firmware debugging.

./scripts/flash-with-blackmagic-probe.sh ./out/gn/arduino_size_optimized/obj/applications/gonk/bin/gonk.elf

Generating the Gonk Python Bundle

This is a distibutable python wheel that can be used without the Gonk source checkout or compiling anything.

On Linux with the FPGA toolchain available run:

pw build

The zip file containing all the dependencies for the gonk python tooling is located in:

out/gn/obj/gonk_bundle.zip

Inside are the Python wheels for gonk_dist, gonk_firmware, and all third_party dependencies.

gonk_bundle
├── python_wheels
│   ├── appdirs-1.4.4-py2.py3-none-any.whl
│   ├── astroid-3.0.1-py3-none-any.whl
│   ├── ...
│   ├── gonk_dist-0.0.1+20240305140627-py3-none-any.whl
│   ├── gonk_firmware-0.0.1+20240305140542-py3-none-any.whl
│   ├── ...
│   └── wheel-0.40.0-py3-none-any.whl
├── requirements.txt
├── setup.bat
└── setup.sh

Appendix

CSV Log Format

Fields

  1. Host timestamp with format %Y%m%d %H:%M:%S.%f
  2. Delta microseconds (elapsed microseconds since the last ADC read) on the STM32 microcontroller side.
  3. 7 Voltage values
  4. 7 Current values
  5. 7 Power values
  6. Comment text

Example separated into multiple lines (with an empty comment field)

20240813 14:16:35.176433,
283,
0.8148437500000001, 0.8892578125, 5.212109375000001, 1.087109375, 0.8904296875000001, 3.3820312500000003, 1.8125,
0.058447916666666676, 0.031546875, 0.13443125, 0.015902343750000002, 0.0009143518518518518, 0.16081250000000002, 0.004143750000000001,
0.04762591959635418, 0.02805330505371094, 0.7006703784179689, 0.01728758697509766, 0.0008141660337094908, 0.5438729003906251, 0.007510546875000001,

GPIO assert events in the CSV

When GPIOs are pulled LOW (to ground) a line in the CSV will appear with delta_micros = 0 and empty measurement values. The Comment field will contain the GPIO assert log message.

Example:

20240813 14:12:32.930888, 0,
,,,,,,,
,,,,,,,
,,,,,,,
Header pin assert: 2

Compiling the FPGA Toolchain

yosys

See https://github.com/YosysHQ/yosys for more instructions.

On Ubuntu/Debian install the deps:

sudo apt-get install build-essential clang lld bison flex \
    libreadline-dev gawk tcl-dev libffi-dev git \
    graphviz xdot pkg-config python3 libboost-system-dev \
    libboost-python-dev libboost-filesystem-dev zlib1g-dev

Activate the bootstrap environment . ./bootstraph.sh then compile yosys.

git clone https://github.com/YosysHQ/yosys
cd yosys
git submodule update --init
make config-clang
make -j8

Install it to a known directory and add it to your $PATH:

make DESTDIR=$HOME/ice40-fpga-tools install
export $PATH=$PATH:$HOME/ice40-fpga-tools/usr/local/bin

fpga-icestorm

TODO: Document compiling from source.

nextpnr-ice40

TODO: Document compiling from source.

Updating STM32Cube

Checkout the desired commits in each of these submodules:

third_party/stm32cube_f7/cmsis_core
third_party/stm32cube_f7/cmsis_device
third_party/stm32cube_f7/hal_driver

Then run from Gonk root:

python -m pw_stm32cube_build gen_file_list third_party/stm32cube_f7

Gonk Pin Maps

Misc

NetSTM32 PinSTM32 FunctionFunction
STATUSPB13GPIO_OutputSTAT LED

Top 6 pin header (0.1inch pitch 2x3)

Visual header pin positions:

                             +-------------
+------+--------+-----+      |
|  2   | Ground |  6  |      |    USB-C
+------+--------+-----+      |    Port
|  1   |   3    | VCC |      |
+------+--------+-----+      +-------------
Header PinNetSTM32 Pin
1SPI_HDR_IO3PB0
2SPI_HDR_IO1PA2
3SPI_HDR_IO2PA3
4GND
5VCC_GONK
6SPI_HDR_IO0PA1

SPI Flash Connection

NetFPGA IO#STM32 PinSTM32 FunctionFlash Pin
ICE_SPI_SS71PD2GPIO_OutputS#
ICE_SPI_MISO68PB4SPI1_MISODQ1
ICE_SPI_MOSI67PB5SPI1_MOSIDQ0
ICE_SPI_SCK70PB3SPI1_SCKC
FLASH_HOLD63PC11GPIO_OutputHOLD#/DQ3
FLASH_WP64PC12GPIO_OutputW#/VPP/DQ2

FPGA Connection

NetFunctionFPGA IO#STM32 PinSTM32 FunctionNotes
FPGA_IO_SPARE_0_2rst_i135PA0GPIO_OutputActive high
FPGA_IO_SPARE_0_0mode_i137PB11GPIO_OutputFPGA operation mode
DSPI_CSvalid_o75PB6GPIO_OutputData/Transfer Valid
FPGA_IO_SPARE_1_1miso_i101PC2SPI1_MISO
FPGA_IO_SPARE_1_0mosi_i99PC3SPI1_MOSI
I2C_O_SDAcs_n79PB9SPI1_NSS
FPGA_IO_SPARE_0_1sclk_i136PB10SPI1_SCK
FPGA_IO_SPARE_2_049PA7
FPGA_IO_SPARE_2_148PA6
FPGA_IO_SPARE_2_247PA5
FPGA_IO_SPARE_2_345PA4