diff --git a/pw_cpu_exception_cortex_m/py/exception_analyzer_test.py b/pw_cpu_exception_cortex_m/py/exception_analyzer_test.py
index 20e887f..eed73e4 100644
--- a/pw_cpu_exception_cortex_m/py/exception_analyzer_test.py
+++ b/pw_cpu_exception_cortex_m/py/exception_analyzer_test.py
@@ -198,7 +198,7 @@
         """Validate CPU state dump with CFSR bits set is formatted correctly."""
         cpu_state_proto = cpu_state_pb2.ArmV7mCpuState()
         cpu_state_proto.cfsr = (
-            cortex_m_constants.PW_CORTEX_M_CFSR_PRECISEERR_MASK
+            cortex_m_constants.PW_CORTEX_M_CFSR_PRECISERR_MASK
             | cortex_m_constants.PW_CORTEX_M_CFSR_BFARVALID_MASK)
         cpu_state_proto.pc = 0xd2603058
         cpu_state_proto.bfar = 0xdeadbeef
@@ -210,7 +210,7 @@
             'Exception caused by a bus fault at 0xdeadbeef.',
             '',
             'Active Crash Fault Status Register (CFSR) fields:',
-            'PRECISEERR  Precise bus fault.',
+            'PRECISERR   Precise bus fault.',
             'BFARVALID   BFAR is valid.',
             '',
             'All registers:',
diff --git a/pw_cpu_exception_cortex_m/py/pw_cpu_exception_cortex_m/cortex_m_constants.py b/pw_cpu_exception_cortex_m/py/pw_cpu_exception_cortex_m/cortex_m_constants.py
index 4bf5114..b623c38 100644
--- a/pw_cpu_exception_cortex_m/py/pw_cpu_exception_cortex_m/cortex_m_constants.py
+++ b/pw_cpu_exception_cortex_m/py/pw_cpu_exception_cortex_m/cortex_m_constants.py
@@ -54,7 +54,7 @@
 # Bus faults (BusFault Status Register) =
 PW_CORTEX_M_CFSR_BUS_FAULT_START = (0x1 << 8)
 PW_CORTEX_M_CFSR_IBUSERR_MASK = (PW_CORTEX_M_CFSR_BUS_FAULT_START << 0)
-PW_CORTEX_M_CFSR_PRECISEERR_MASK = (PW_CORTEX_M_CFSR_BUS_FAULT_START << 1)
+PW_CORTEX_M_CFSR_PRECISERR_MASK = (PW_CORTEX_M_CFSR_BUS_FAULT_START << 1)
 PW_CORTEX_M_CFSR_IMPRECISERR_MASK = (PW_CORTEX_M_CFSR_BUS_FAULT_START << 2)
 PW_CORTEX_M_CFSR_UNSTKERR_MASK = (PW_CORTEX_M_CFSR_BUS_FAULT_START << 3)
 PW_CORTEX_M_CFSR_STKERR_MASK = (PW_CORTEX_M_CFSR_BUS_FAULT_START << 4)
@@ -90,7 +90,7 @@
              'MMFAR register is valid.'),
     BitField('IBUSERR', PW_CORTEX_M_CFSR_IBUSERR_MASK,
              'Bus fault on instruction fetch.'),
-    BitField('PRECISEERR', PW_CORTEX_M_CFSR_PRECISEERR_MASK,
+    BitField('PRECISERR', PW_CORTEX_M_CFSR_PRECISERR_MASK,
              'Precise bus fault.'),
     BitField('IMPRECISERR', PW_CORTEX_M_CFSR_IMPRECISERR_MASK,
              'Imprecise bus fault.'),