| /* | |
| FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd. | |
| All rights reserved | |
| VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. | |
| This file is part of the FreeRTOS distribution. | |
| FreeRTOS is free software; you can redistribute it and/or modify it under | |
| the terms of the GNU General Public License (version 2) as published by the | |
| Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. | |
| *************************************************************************** | |
| >>! NOTE: The modification to the GPL is included to allow you to !<< | |
| >>! distribute a combined work that includes FreeRTOS without being !<< | |
| >>! obliged to provide the source code for proprietary components !<< | |
| >>! outside of the FreeRTOS kernel. !<< | |
| *************************************************************************** | |
| FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY | |
| WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS | |
| FOR A PARTICULAR PURPOSE. Full license text is available on the following | |
| link: http://www.freertos.org/a00114.html | |
| *************************************************************************** | |
| * * | |
| * FreeRTOS provides completely free yet professionally developed, * | |
| * robust, strictly quality controlled, supported, and cross * | |
| * platform software that is more than just the market leader, it * | |
| * is the industry's de facto standard. * | |
| * * | |
| * Help yourself get started quickly while simultaneously helping * | |
| * to support the FreeRTOS project by purchasing a FreeRTOS * | |
| * tutorial book, reference manual, or both: * | |
| * http://www.FreeRTOS.org/Documentation * | |
| * * | |
| *************************************************************************** | |
| http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading | |
| the FAQ page "My application does not run, what could be wrong?". Have you | |
| defined configASSERT()? | |
| http://www.FreeRTOS.org/support - In return for receiving this top quality | |
| embedded software for free we request you assist our global community by | |
| participating in the support forum. | |
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| http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, | |
| including FreeRTOS+Trace - an indispensable productivity tool, a DOS | |
| compatible FAT file system, and our tiny thread aware UDP/IP stack. | |
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| Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. | |
| http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High | |
| Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS | |
| licenses offer ticketed support, indemnification and commercial middleware. | |
| http://www.SafeRTOS.com - High Integrity Systems also provide a safety | |
| engineered and independently SIL3 certified version for use in safety and | |
| mission critical applications that require provable dependability. | |
| 1 tab == 4 spaces! | |
| */ | |
| /* | |
| * Normally the interrupt nesting test would use [at least] two separate timers. | |
| * In this case, there was difficulty generating interrupts from TC1, so only | |
| * TC0 is used. Nested interrupts are instead generated by manually pending the | |
| * TC1 interrupt from inside the TC0 interrupt handler. This means TC1 must be | |
| * assigned an interrupt priority above TC0. [Note this arrangement does not | |
| * really fulfil the purpose of the test as the nesting always occurs at the | |
| * same point in the code, whereas the test is designed to test nesting | |
| * occurring within the queue API functions] | |
| */ | |
| /* Scheduler includes. */ | |
| #include "FreeRTOS.h" | |
| /* Demo includes. */ | |
| #include "IntQueueTimer.h" | |
| #include "IntQueue.h" | |
| /* Library includes. */ | |
| #include "board.h" | |
| #include "asf.h" | |
| /* The frequency at which the int queue timer executes. */ | |
| #define tmrTIMER_0_FREQUENCY ( 2030UL ) | |
| /* The genuine timer interrupt executes at the lower priority. The manually | |
| pended timer interrupt executes at the higher priority to ensure it always nests | |
| with the lower priority (which in turn will occasionally nest with the tick | |
| interrupt - creating a maximum interrupt nesting depth of 3). */ | |
| #define tmrLOWER_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY + 1 ) | |
| #define tmrHIGHER_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ) | |
| /*-----------------------------------------------------------*/ | |
| void vInitialiseTimerForIntQueueTest( void ) | |
| { | |
| uint32_t ulDivider, ulTCCLKS; | |
| /* Configure PMC for TC0. */ | |
| pmc_enable_periph_clk( ID_TC0 ); | |
| /* Configure TC0 channel 0 for interrupts at tmrTIMER_0_FREQUENCY. */ | |
| tc_find_mck_divisor( tmrTIMER_0_FREQUENCY, configCPU_CLOCK_HZ, &ulDivider, &ulTCCLKS, configCPU_CLOCK_HZ ); | |
| tc_init( TC0, 0, ulTCCLKS | TC_CMR_CPCTRG ); | |
| ulDivider <<= 1UL; | |
| tc_write_rc( TC0, 0, ( configCPU_CLOCK_HZ / ulDivider ) / tmrTIMER_0_FREQUENCY ); | |
| tc_enable_interrupt( TC0, 0, TC_IER_CPCS ); | |
| /* Configure and enable interrupts for both TC0 and TC1, as TC1 interrupts | |
| are manually pended from within the TC0 interrupt handler (see the notes at | |
| the top of this file). */ | |
| NVIC_ClearPendingIRQ( TC0_IRQn ); | |
| NVIC_ClearPendingIRQ( TC1_IRQn ); | |
| NVIC_SetPriority( TC0_IRQn, tmrLOWER_PRIORITY ); | |
| NVIC_SetPriority( TC1_IRQn, tmrHIGHER_PRIORITY ); | |
| NVIC_EnableIRQ( TC0_IRQn ); | |
| NVIC_EnableIRQ( TC1_IRQn ); | |
| /* Start the timer last of all. */ | |
| tc_start( TC0, 0 ); | |
| } | |
| /*-----------------------------------------------------------*/ | |
| void TC0_Handler( void ) | |
| { | |
| static uint32_t ulISRCount = 0; | |
| /* Clear the interrupt. */ | |
| if( tc_get_status( TC0, 0 ) != 0 ) | |
| { | |
| /* As noted in the comments above, manually pend the TC1 interrupt from | |
| the TC0 interrupt handler. This is not done on each occurrence of the | |
| TC0 interrupt though, to make sure interrupts don't nest in every single | |
| case. */ | |
| ulISRCount++; | |
| if( ( ulISRCount & 0x07 ) != 0x07 ) | |
| { | |
| /* Pend an interrupt that will nest with this interrupt. */ | |
| NVIC_SetPendingIRQ( TC1_IRQn ); | |
| } | |
| /* Call the IntQ test function for this channel. */ | |
| portYIELD_FROM_ISR( xFirstTimerHandler() ); | |
| } | |
| } | |
| /*-----------------------------------------------------------*/ | |
| void TC1_Handler( void ) | |
| { | |
| /* Call the IntQ test function that would normally get called from a second | |
| and independent timer. */ | |
| portYIELD_FROM_ISR( xSecondTimerHandler() ); | |
| } | |