tree 8d1bd1caa8974791f371d770eb0d29035e44ad28
parent a2e00f0c6b19326b67d386d9f5d76b2a43f08c75
author Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> 1596937034 -0700
committer GitHub <noreply@github.com> 1596937034 -0700
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Allow application to override TEX,S,C and B bits for Flash and RAM (#113)

The TEX,  Shareable (S), Cacheable (C) and Bufferable (B) bits define
the memory type, and where necessary the cacheable and shareable
properties of the memory region.

The default values for these bits, as configured in our MPU ports, are
sometimes not suitable for application. One such example is when the MCU
has a cache, the application writer may not want to mark the memory as
shareable to avoid disabling the cache. This change allows the
application writer to override default vales for TEX, S C and B bits for
Flash and RAM in their FreeRTOSConfig.h. The following two new
configurations are introduced:

- configTEX_S_C_B_FLASH
- configTEX_S_C_B_SRAM

If undefined, the default values for the above configurations are
TEX=000, S=1, C=1, B=1. This ensures backward compatibility.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>