tree d42ed3f0cb697ade597aca63a1ffd9c0725ab75c
parent 8e89acfc98909923476849a2493c5fa576ff0094
author Paul Bartell <pbartell@amazon.com> 1656565526 -0700
committer GitHub <noreply@github.com> 1656565526 +0530
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Add Cortex M7 r0p1 Errata 837070 workaround to CM4_MPU ports (#513)

* Clarify Cortex M7 r0p1 errata number in r0p1 specific port.

* Add ARM Cortex M7 r0p0 / r0p1 Errata 837070 workaround to CM4 MPU ports.

Optionally, enable the errata workaround by defining configTARGET_ARM_CM7_r0p0 or configTARGET_ARM_CM7_r0p1 in FreeRTOSConfig.h.

* Add r0p1 errata support to IAR port as well

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Change macro name to configENABLE_ERRATA_837070_WORKAROUND

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>