Allow xPortIsAuthorizedToAccessBuffer() API call only from mpu_wrappers_v2 (#992)
* Add support to call xPortxPortIsAuthorizedToAccessBuffer function only when using latest MPU wrappers
* Fix build issue in ARM CM3 MPU port
* Code review suggestions
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
diff --git a/portable/ARMv8M/non_secure/port.c b/portable/ARMv8M/non_secure/port.c
index 7171a72..329de05 100644
--- a/portable/ARMv8M/non_secure/port.c
+++ b/portable/ARMv8M/non_secure/port.c
@@ -496,14 +496,14 @@
#endif /* configENABLE_MPU == 1 */
/*-----------------------------------------------------------*/
-#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
/**
* @brief This variable is set to pdTRUE when the scheduler is started.
*/
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
-#endif
+#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/**
* @brief Each task maintains its own interrupt status in the critical nesting
@@ -555,6 +555,7 @@
/*-----------------------------------------------------------*/
#if ( configUSE_TICKLESS_IDLE == 1 )
+
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
{
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
@@ -770,6 +771,7 @@
__asm volatile ( "cpsie i" ::: "memory" );
}
}
+
#endif /* configUSE_TICKLESS_IDLE */
/*-----------------------------------------------------------*/
@@ -827,6 +829,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
{
uint32_t ulAccessPermissions = 0;
@@ -843,10 +846,12 @@
return ulAccessPermissions;
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
{
#if defined( __ARMCC_VERSION )
@@ -935,10 +940,12 @@
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_FPU == 1 )
+
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
{
#if ( configENABLE_TRUSTZONE == 1 )
@@ -960,6 +967,7 @@
* LSPEN = 1 ==> Enable lazy context save of FP state. */
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
}
+
#endif /* configENABLE_FPU */
/*-----------------------------------------------------------*/
@@ -1740,11 +1748,11 @@
/* Initialize the critical nesting count ready for the first task. */
ulCriticalNesting = 0;
- #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
{
xSchedulerRunning = pdTRUE;
}
- #endif
+ #endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
/* Start the first task. */
vStartFirstTask();
@@ -1772,6 +1780,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
const struct xMEMORY_REGION * const xRegions,
StackType_t * pxBottomOfStack,
@@ -1893,10 +1902,12 @@
lIndex++;
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
-#if ( configENABLE_MPU == 1 )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
+
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
uint32_t ulBufferLength,
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
@@ -1949,7 +1960,8 @@
return xAccessGranted;
}
-#endif /* configENABLE_MPU */
+
+#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/*-----------------------------------------------------------*/
BaseType_t xPortIsInsideInterrupt( void )
diff --git a/portable/GCC/ARM_CM23/non_secure/port.c b/portable/GCC/ARM_CM23/non_secure/port.c
index 7171a72..329de05 100644
--- a/portable/GCC/ARM_CM23/non_secure/port.c
+++ b/portable/GCC/ARM_CM23/non_secure/port.c
@@ -496,14 +496,14 @@
#endif /* configENABLE_MPU == 1 */
/*-----------------------------------------------------------*/
-#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
/**
* @brief This variable is set to pdTRUE when the scheduler is started.
*/
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
-#endif
+#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/**
* @brief Each task maintains its own interrupt status in the critical nesting
@@ -555,6 +555,7 @@
/*-----------------------------------------------------------*/
#if ( configUSE_TICKLESS_IDLE == 1 )
+
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
{
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
@@ -770,6 +771,7 @@
__asm volatile ( "cpsie i" ::: "memory" );
}
}
+
#endif /* configUSE_TICKLESS_IDLE */
/*-----------------------------------------------------------*/
@@ -827,6 +829,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
{
uint32_t ulAccessPermissions = 0;
@@ -843,10 +846,12 @@
return ulAccessPermissions;
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
{
#if defined( __ARMCC_VERSION )
@@ -935,10 +940,12 @@
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_FPU == 1 )
+
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
{
#if ( configENABLE_TRUSTZONE == 1 )
@@ -960,6 +967,7 @@
* LSPEN = 1 ==> Enable lazy context save of FP state. */
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
}
+
#endif /* configENABLE_FPU */
/*-----------------------------------------------------------*/
@@ -1740,11 +1748,11 @@
/* Initialize the critical nesting count ready for the first task. */
ulCriticalNesting = 0;
- #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
{
xSchedulerRunning = pdTRUE;
}
- #endif
+ #endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
/* Start the first task. */
vStartFirstTask();
@@ -1772,6 +1780,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
const struct xMEMORY_REGION * const xRegions,
StackType_t * pxBottomOfStack,
@@ -1893,10 +1902,12 @@
lIndex++;
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
-#if ( configENABLE_MPU == 1 )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
+
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
uint32_t ulBufferLength,
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
@@ -1949,7 +1960,8 @@
return xAccessGranted;
}
-#endif /* configENABLE_MPU */
+
+#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/*-----------------------------------------------------------*/
BaseType_t xPortIsInsideInterrupt( void )
diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/port.c b/portable/GCC/ARM_CM23_NTZ/non_secure/port.c
index 7171a72..329de05 100644
--- a/portable/GCC/ARM_CM23_NTZ/non_secure/port.c
+++ b/portable/GCC/ARM_CM23_NTZ/non_secure/port.c
@@ -496,14 +496,14 @@
#endif /* configENABLE_MPU == 1 */
/*-----------------------------------------------------------*/
-#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
/**
* @brief This variable is set to pdTRUE when the scheduler is started.
*/
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
-#endif
+#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/**
* @brief Each task maintains its own interrupt status in the critical nesting
@@ -555,6 +555,7 @@
/*-----------------------------------------------------------*/
#if ( configUSE_TICKLESS_IDLE == 1 )
+
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
{
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
@@ -770,6 +771,7 @@
__asm volatile ( "cpsie i" ::: "memory" );
}
}
+
#endif /* configUSE_TICKLESS_IDLE */
/*-----------------------------------------------------------*/
@@ -827,6 +829,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
{
uint32_t ulAccessPermissions = 0;
@@ -843,10 +846,12 @@
return ulAccessPermissions;
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
{
#if defined( __ARMCC_VERSION )
@@ -935,10 +940,12 @@
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_FPU == 1 )
+
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
{
#if ( configENABLE_TRUSTZONE == 1 )
@@ -960,6 +967,7 @@
* LSPEN = 1 ==> Enable lazy context save of FP state. */
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
}
+
#endif /* configENABLE_FPU */
/*-----------------------------------------------------------*/
@@ -1740,11 +1748,11 @@
/* Initialize the critical nesting count ready for the first task. */
ulCriticalNesting = 0;
- #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
{
xSchedulerRunning = pdTRUE;
}
- #endif
+ #endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
/* Start the first task. */
vStartFirstTask();
@@ -1772,6 +1780,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
const struct xMEMORY_REGION * const xRegions,
StackType_t * pxBottomOfStack,
@@ -1893,10 +1902,12 @@
lIndex++;
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
-#if ( configENABLE_MPU == 1 )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
+
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
uint32_t ulBufferLength,
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
@@ -1949,7 +1960,8 @@
return xAccessGranted;
}
-#endif /* configENABLE_MPU */
+
+#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/*-----------------------------------------------------------*/
BaseType_t xPortIsInsideInterrupt( void )
diff --git a/portable/GCC/ARM_CM33/non_secure/port.c b/portable/GCC/ARM_CM33/non_secure/port.c
index 7171a72..329de05 100644
--- a/portable/GCC/ARM_CM33/non_secure/port.c
+++ b/portable/GCC/ARM_CM33/non_secure/port.c
@@ -496,14 +496,14 @@
#endif /* configENABLE_MPU == 1 */
/*-----------------------------------------------------------*/
-#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
/**
* @brief This variable is set to pdTRUE when the scheduler is started.
*/
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
-#endif
+#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/**
* @brief Each task maintains its own interrupt status in the critical nesting
@@ -555,6 +555,7 @@
/*-----------------------------------------------------------*/
#if ( configUSE_TICKLESS_IDLE == 1 )
+
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
{
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
@@ -770,6 +771,7 @@
__asm volatile ( "cpsie i" ::: "memory" );
}
}
+
#endif /* configUSE_TICKLESS_IDLE */
/*-----------------------------------------------------------*/
@@ -827,6 +829,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
{
uint32_t ulAccessPermissions = 0;
@@ -843,10 +846,12 @@
return ulAccessPermissions;
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
{
#if defined( __ARMCC_VERSION )
@@ -935,10 +940,12 @@
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_FPU == 1 )
+
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
{
#if ( configENABLE_TRUSTZONE == 1 )
@@ -960,6 +967,7 @@
* LSPEN = 1 ==> Enable lazy context save of FP state. */
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
}
+
#endif /* configENABLE_FPU */
/*-----------------------------------------------------------*/
@@ -1740,11 +1748,11 @@
/* Initialize the critical nesting count ready for the first task. */
ulCriticalNesting = 0;
- #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
{
xSchedulerRunning = pdTRUE;
}
- #endif
+ #endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
/* Start the first task. */
vStartFirstTask();
@@ -1772,6 +1780,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
const struct xMEMORY_REGION * const xRegions,
StackType_t * pxBottomOfStack,
@@ -1893,10 +1902,12 @@
lIndex++;
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
-#if ( configENABLE_MPU == 1 )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
+
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
uint32_t ulBufferLength,
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
@@ -1949,7 +1960,8 @@
return xAccessGranted;
}
-#endif /* configENABLE_MPU */
+
+#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/*-----------------------------------------------------------*/
BaseType_t xPortIsInsideInterrupt( void )
diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/port.c b/portable/GCC/ARM_CM33_NTZ/non_secure/port.c
index 7171a72..329de05 100644
--- a/portable/GCC/ARM_CM33_NTZ/non_secure/port.c
+++ b/portable/GCC/ARM_CM33_NTZ/non_secure/port.c
@@ -496,14 +496,14 @@
#endif /* configENABLE_MPU == 1 */
/*-----------------------------------------------------------*/
-#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
/**
* @brief This variable is set to pdTRUE when the scheduler is started.
*/
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
-#endif
+#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/**
* @brief Each task maintains its own interrupt status in the critical nesting
@@ -555,6 +555,7 @@
/*-----------------------------------------------------------*/
#if ( configUSE_TICKLESS_IDLE == 1 )
+
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
{
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
@@ -770,6 +771,7 @@
__asm volatile ( "cpsie i" ::: "memory" );
}
}
+
#endif /* configUSE_TICKLESS_IDLE */
/*-----------------------------------------------------------*/
@@ -827,6 +829,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
{
uint32_t ulAccessPermissions = 0;
@@ -843,10 +846,12 @@
return ulAccessPermissions;
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
{
#if defined( __ARMCC_VERSION )
@@ -935,10 +940,12 @@
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_FPU == 1 )
+
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
{
#if ( configENABLE_TRUSTZONE == 1 )
@@ -960,6 +967,7 @@
* LSPEN = 1 ==> Enable lazy context save of FP state. */
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
}
+
#endif /* configENABLE_FPU */
/*-----------------------------------------------------------*/
@@ -1740,11 +1748,11 @@
/* Initialize the critical nesting count ready for the first task. */
ulCriticalNesting = 0;
- #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
{
xSchedulerRunning = pdTRUE;
}
- #endif
+ #endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
/* Start the first task. */
vStartFirstTask();
@@ -1772,6 +1780,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
const struct xMEMORY_REGION * const xRegions,
StackType_t * pxBottomOfStack,
@@ -1893,10 +1902,12 @@
lIndex++;
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
-#if ( configENABLE_MPU == 1 )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
+
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
uint32_t ulBufferLength,
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
@@ -1949,7 +1960,8 @@
return xAccessGranted;
}
-#endif /* configENABLE_MPU */
+
+#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/*-----------------------------------------------------------*/
BaseType_t xPortIsInsideInterrupt( void )
diff --git a/portable/GCC/ARM_CM35P/non_secure/port.c b/portable/GCC/ARM_CM35P/non_secure/port.c
index 7171a72..329de05 100644
--- a/portable/GCC/ARM_CM35P/non_secure/port.c
+++ b/portable/GCC/ARM_CM35P/non_secure/port.c
@@ -496,14 +496,14 @@
#endif /* configENABLE_MPU == 1 */
/*-----------------------------------------------------------*/
-#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
/**
* @brief This variable is set to pdTRUE when the scheduler is started.
*/
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
-#endif
+#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/**
* @brief Each task maintains its own interrupt status in the critical nesting
@@ -555,6 +555,7 @@
/*-----------------------------------------------------------*/
#if ( configUSE_TICKLESS_IDLE == 1 )
+
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
{
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
@@ -770,6 +771,7 @@
__asm volatile ( "cpsie i" ::: "memory" );
}
}
+
#endif /* configUSE_TICKLESS_IDLE */
/*-----------------------------------------------------------*/
@@ -827,6 +829,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
{
uint32_t ulAccessPermissions = 0;
@@ -843,10 +846,12 @@
return ulAccessPermissions;
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
{
#if defined( __ARMCC_VERSION )
@@ -935,10 +940,12 @@
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_FPU == 1 )
+
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
{
#if ( configENABLE_TRUSTZONE == 1 )
@@ -960,6 +967,7 @@
* LSPEN = 1 ==> Enable lazy context save of FP state. */
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
}
+
#endif /* configENABLE_FPU */
/*-----------------------------------------------------------*/
@@ -1740,11 +1748,11 @@
/* Initialize the critical nesting count ready for the first task. */
ulCriticalNesting = 0;
- #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
{
xSchedulerRunning = pdTRUE;
}
- #endif
+ #endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
/* Start the first task. */
vStartFirstTask();
@@ -1772,6 +1780,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
const struct xMEMORY_REGION * const xRegions,
StackType_t * pxBottomOfStack,
@@ -1893,10 +1902,12 @@
lIndex++;
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
-#if ( configENABLE_MPU == 1 )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
+
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
uint32_t ulBufferLength,
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
@@ -1949,7 +1960,8 @@
return xAccessGranted;
}
-#endif /* configENABLE_MPU */
+
+#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/*-----------------------------------------------------------*/
BaseType_t xPortIsInsideInterrupt( void )
diff --git a/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c b/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c
index 7171a72..329de05 100644
--- a/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c
+++ b/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c
@@ -496,14 +496,14 @@
#endif /* configENABLE_MPU == 1 */
/*-----------------------------------------------------------*/
-#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
/**
* @brief This variable is set to pdTRUE when the scheduler is started.
*/
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
-#endif
+#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/**
* @brief Each task maintains its own interrupt status in the critical nesting
@@ -555,6 +555,7 @@
/*-----------------------------------------------------------*/
#if ( configUSE_TICKLESS_IDLE == 1 )
+
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
{
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
@@ -770,6 +771,7 @@
__asm volatile ( "cpsie i" ::: "memory" );
}
}
+
#endif /* configUSE_TICKLESS_IDLE */
/*-----------------------------------------------------------*/
@@ -827,6 +829,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
{
uint32_t ulAccessPermissions = 0;
@@ -843,10 +846,12 @@
return ulAccessPermissions;
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
{
#if defined( __ARMCC_VERSION )
@@ -935,10 +940,12 @@
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_FPU == 1 )
+
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
{
#if ( configENABLE_TRUSTZONE == 1 )
@@ -960,6 +967,7 @@
* LSPEN = 1 ==> Enable lazy context save of FP state. */
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
}
+
#endif /* configENABLE_FPU */
/*-----------------------------------------------------------*/
@@ -1740,11 +1748,11 @@
/* Initialize the critical nesting count ready for the first task. */
ulCriticalNesting = 0;
- #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
{
xSchedulerRunning = pdTRUE;
}
- #endif
+ #endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
/* Start the first task. */
vStartFirstTask();
@@ -1772,6 +1780,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
const struct xMEMORY_REGION * const xRegions,
StackType_t * pxBottomOfStack,
@@ -1893,10 +1902,12 @@
lIndex++;
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
-#if ( configENABLE_MPU == 1 )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
+
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
uint32_t ulBufferLength,
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
@@ -1949,7 +1960,8 @@
return xAccessGranted;
}
-#endif /* configENABLE_MPU */
+
+#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/*-----------------------------------------------------------*/
BaseType_t xPortIsInsideInterrupt( void )
diff --git a/portable/GCC/ARM_CM3_MPU/port.c b/portable/GCC/ARM_CM3_MPU/port.c
index fd76400..872882d 100644
--- a/portable/GCC/ARM_CM3_MPU/port.c
+++ b/portable/GCC/ARM_CM3_MPU/port.c
@@ -264,14 +264,14 @@
* switches can only occur when uxCriticalNesting is zero. */
static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
-#if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
/*
* This variable is set to pdTRUE when the scheduler is started.
*/
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
-#endif
+#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/*
* Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure
@@ -878,11 +878,11 @@
/* Initialise the critical nesting count ready for the first task. */
uxCriticalNesting = 0;
- #if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+ #if ( configUSE_MPU_WRAPPERS_V1 == 0 )
{
xSchedulerRunning = pdTRUE;
}
- #endif
+ #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/* Start the first task. */
__asm volatile (
@@ -1371,53 +1371,57 @@
}
/*-----------------------------------------------------------*/
-BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
- uint32_t ulBufferLength,
- uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
+#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
-{
- uint32_t i, ulBufferStartAddress, ulBufferEndAddress;
- BaseType_t xAccessGranted = pdFALSE;
- const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */
+ BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
+ uint32_t ulBufferLength,
+ uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
- if( xSchedulerRunning == pdFALSE )
{
- /* Grant access to all the kernel objects before the scheduler
- * is started. It is necessary because there is no task running
- * yet and therefore, we cannot use the permissions of any
- * task. */
- xAccessGranted = pdTRUE;
- }
- else if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG )
- {
- xAccessGranted = pdTRUE;
- }
- else
- {
- if( portADD_UINT32_WILL_OVERFLOW( ( ( uint32_t ) pvBuffer ), ( ulBufferLength - 1UL ) ) == pdFALSE )
+ uint32_t i, ulBufferStartAddress, ulBufferEndAddress;
+ BaseType_t xAccessGranted = pdFALSE;
+ const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */
+
+ if( xSchedulerRunning == pdFALSE )
{
- ulBufferStartAddress = ( uint32_t ) pvBuffer;
- ulBufferEndAddress = ( ( ( uint32_t ) pvBuffer ) + ulBufferLength - 1UL );
-
- for( i = 0; i < portTOTAL_NUM_REGIONS_IN_TCB; i++ )
+ /* Grant access to all the kernel objects before the scheduler
+ * is started. It is necessary because there is no task running
+ * yet and therefore, we cannot use the permissions of any
+ * task. */
+ xAccessGranted = pdTRUE;
+ }
+ else if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG )
+ {
+ xAccessGranted = pdTRUE;
+ }
+ else
+ {
+ if( portADD_UINT32_WILL_OVERFLOW( ( ( uint32_t ) pvBuffer ), ( ulBufferLength - 1UL ) ) == pdFALSE )
{
- if( portIS_ADDRESS_WITHIN_RANGE( ulBufferStartAddress,
- xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
- xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
- portIS_ADDRESS_WITHIN_RANGE( ulBufferEndAddress,
- xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
- xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
- portIS_AUTHORIZED( ulAccessRequested, xTaskMpuSettings->xRegionSettings[ i ].ulRegionPermissions ) )
+ ulBufferStartAddress = ( uint32_t ) pvBuffer;
+ ulBufferEndAddress = ( ( ( uint32_t ) pvBuffer ) + ulBufferLength - 1UL );
+
+ for( i = 0; i < portTOTAL_NUM_REGIONS_IN_TCB; i++ )
{
- xAccessGranted = pdTRUE;
- break;
+ if( portIS_ADDRESS_WITHIN_RANGE( ulBufferStartAddress,
+ xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
+ xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
+ portIS_ADDRESS_WITHIN_RANGE( ulBufferEndAddress,
+ xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
+ xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
+ portIS_AUTHORIZED( ulAccessRequested, xTaskMpuSettings->xRegionSettings[ i ].ulRegionPermissions ) )
+ {
+ xAccessGranted = pdTRUE;
+ break;
+ }
}
}
}
+
+ return xAccessGranted;
}
- return xAccessGranted;
-}
+#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/*-----------------------------------------------------------*/
#if ( configASSERT_DEFINED == 1 )
diff --git a/portable/GCC/ARM_CM4_MPU/port.c b/portable/GCC/ARM_CM4_MPU/port.c
index 04ed7aa..2101655 100644
--- a/portable/GCC/ARM_CM4_MPU/port.c
+++ b/portable/GCC/ARM_CM4_MPU/port.c
@@ -289,14 +289,14 @@
* switches can only occur when uxCriticalNesting is zero. */
static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
-#if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
/*
* This variable is set to pdTRUE when the scheduler is started.
*/
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
-#endif
+#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/*
* Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure
@@ -963,11 +963,11 @@
/* Initialise the critical nesting count ready for the first task. */
uxCriticalNesting = 0;
- #if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+ #if ( configUSE_MPU_WRAPPERS_V1 == 0 )
{
xSchedulerRunning = pdTRUE;
}
- #endif
+ #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/* Ensure the VFP is enabled - it should be anyway. */
vPortEnableVFP();
@@ -1514,53 +1514,57 @@
}
/*-----------------------------------------------------------*/
-BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
- uint32_t ulBufferLength,
- uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
+#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
-{
- uint32_t i, ulBufferStartAddress, ulBufferEndAddress;
- BaseType_t xAccessGranted = pdFALSE;
- const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */
+ BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
+ uint32_t ulBufferLength,
+ uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
- if( xSchedulerRunning == pdFALSE )
{
- /* Grant access to all the kernel objects before the scheduler
- * is started. It is necessary because there is no task running
- * yet and therefore, we cannot use the permissions of any
- * task. */
- xAccessGranted = pdTRUE;
- }
- else if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG )
- {
- xAccessGranted = pdTRUE;
- }
- else
- {
- if( portADD_UINT32_WILL_OVERFLOW( ( ( uint32_t ) pvBuffer ), ( ulBufferLength - 1UL ) ) == pdFALSE )
+ uint32_t i, ulBufferStartAddress, ulBufferEndAddress;
+ BaseType_t xAccessGranted = pdFALSE;
+ const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */
+
+ if( xSchedulerRunning == pdFALSE )
{
- ulBufferStartAddress = ( uint32_t ) pvBuffer;
- ulBufferEndAddress = ( ( ( uint32_t ) pvBuffer ) + ulBufferLength - 1UL );
-
- for( i = 0; i < portTOTAL_NUM_REGIONS_IN_TCB; i++ )
+ /* Grant access to all the kernel objects before the scheduler
+ * is started. It is necessary because there is no task running
+ * yet and therefore, we cannot use the permissions of any
+ * task. */
+ xAccessGranted = pdTRUE;
+ }
+ else if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG )
+ {
+ xAccessGranted = pdTRUE;
+ }
+ else
+ {
+ if( portADD_UINT32_WILL_OVERFLOW( ( ( uint32_t ) pvBuffer ), ( ulBufferLength - 1UL ) ) == pdFALSE )
{
- if( portIS_ADDRESS_WITHIN_RANGE( ulBufferStartAddress,
- xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
- xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
- portIS_ADDRESS_WITHIN_RANGE( ulBufferEndAddress,
- xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
- xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
- portIS_AUTHORIZED( ulAccessRequested, xTaskMpuSettings->xRegionSettings[ i ].ulRegionPermissions ) )
+ ulBufferStartAddress = ( uint32_t ) pvBuffer;
+ ulBufferEndAddress = ( ( ( uint32_t ) pvBuffer ) + ulBufferLength - 1UL );
+
+ for( i = 0; i < portTOTAL_NUM_REGIONS_IN_TCB; i++ )
{
- xAccessGranted = pdTRUE;
- break;
+ if( portIS_ADDRESS_WITHIN_RANGE( ulBufferStartAddress,
+ xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
+ xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
+ portIS_ADDRESS_WITHIN_RANGE( ulBufferEndAddress,
+ xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
+ xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
+ portIS_AUTHORIZED( ulAccessRequested, xTaskMpuSettings->xRegionSettings[ i ].ulRegionPermissions ) )
+ {
+ xAccessGranted = pdTRUE;
+ break;
+ }
}
}
}
+
+ return xAccessGranted;
}
- return xAccessGranted;
-}
+#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/*-----------------------------------------------------------*/
#if ( configASSERT_DEFINED == 1 )
diff --git a/portable/GCC/ARM_CM55/non_secure/port.c b/portable/GCC/ARM_CM55/non_secure/port.c
index 7171a72..329de05 100644
--- a/portable/GCC/ARM_CM55/non_secure/port.c
+++ b/portable/GCC/ARM_CM55/non_secure/port.c
@@ -496,14 +496,14 @@
#endif /* configENABLE_MPU == 1 */
/*-----------------------------------------------------------*/
-#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
/**
* @brief This variable is set to pdTRUE when the scheduler is started.
*/
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
-#endif
+#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/**
* @brief Each task maintains its own interrupt status in the critical nesting
@@ -555,6 +555,7 @@
/*-----------------------------------------------------------*/
#if ( configUSE_TICKLESS_IDLE == 1 )
+
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
{
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
@@ -770,6 +771,7 @@
__asm volatile ( "cpsie i" ::: "memory" );
}
}
+
#endif /* configUSE_TICKLESS_IDLE */
/*-----------------------------------------------------------*/
@@ -827,6 +829,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
{
uint32_t ulAccessPermissions = 0;
@@ -843,10 +846,12 @@
return ulAccessPermissions;
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
{
#if defined( __ARMCC_VERSION )
@@ -935,10 +940,12 @@
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_FPU == 1 )
+
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
{
#if ( configENABLE_TRUSTZONE == 1 )
@@ -960,6 +967,7 @@
* LSPEN = 1 ==> Enable lazy context save of FP state. */
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
}
+
#endif /* configENABLE_FPU */
/*-----------------------------------------------------------*/
@@ -1740,11 +1748,11 @@
/* Initialize the critical nesting count ready for the first task. */
ulCriticalNesting = 0;
- #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
{
xSchedulerRunning = pdTRUE;
}
- #endif
+ #endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
/* Start the first task. */
vStartFirstTask();
@@ -1772,6 +1780,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
const struct xMEMORY_REGION * const xRegions,
StackType_t * pxBottomOfStack,
@@ -1893,10 +1902,12 @@
lIndex++;
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
-#if ( configENABLE_MPU == 1 )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
+
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
uint32_t ulBufferLength,
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
@@ -1949,7 +1960,8 @@
return xAccessGranted;
}
-#endif /* configENABLE_MPU */
+
+#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/*-----------------------------------------------------------*/
BaseType_t xPortIsInsideInterrupt( void )
diff --git a/portable/GCC/ARM_CM55_NTZ/non_secure/port.c b/portable/GCC/ARM_CM55_NTZ/non_secure/port.c
index 7171a72..329de05 100644
--- a/portable/GCC/ARM_CM55_NTZ/non_secure/port.c
+++ b/portable/GCC/ARM_CM55_NTZ/non_secure/port.c
@@ -496,14 +496,14 @@
#endif /* configENABLE_MPU == 1 */
/*-----------------------------------------------------------*/
-#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
/**
* @brief This variable is set to pdTRUE when the scheduler is started.
*/
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
-#endif
+#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/**
* @brief Each task maintains its own interrupt status in the critical nesting
@@ -555,6 +555,7 @@
/*-----------------------------------------------------------*/
#if ( configUSE_TICKLESS_IDLE == 1 )
+
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
{
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
@@ -770,6 +771,7 @@
__asm volatile ( "cpsie i" ::: "memory" );
}
}
+
#endif /* configUSE_TICKLESS_IDLE */
/*-----------------------------------------------------------*/
@@ -827,6 +829,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
{
uint32_t ulAccessPermissions = 0;
@@ -843,10 +846,12 @@
return ulAccessPermissions;
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
{
#if defined( __ARMCC_VERSION )
@@ -935,10 +940,12 @@
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_FPU == 1 )
+
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
{
#if ( configENABLE_TRUSTZONE == 1 )
@@ -960,6 +967,7 @@
* LSPEN = 1 ==> Enable lazy context save of FP state. */
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
}
+
#endif /* configENABLE_FPU */
/*-----------------------------------------------------------*/
@@ -1740,11 +1748,11 @@
/* Initialize the critical nesting count ready for the first task. */
ulCriticalNesting = 0;
- #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
{
xSchedulerRunning = pdTRUE;
}
- #endif
+ #endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
/* Start the first task. */
vStartFirstTask();
@@ -1772,6 +1780,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
const struct xMEMORY_REGION * const xRegions,
StackType_t * pxBottomOfStack,
@@ -1893,10 +1902,12 @@
lIndex++;
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
-#if ( configENABLE_MPU == 1 )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
+
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
uint32_t ulBufferLength,
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
@@ -1949,7 +1960,8 @@
return xAccessGranted;
}
-#endif /* configENABLE_MPU */
+
+#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/*-----------------------------------------------------------*/
BaseType_t xPortIsInsideInterrupt( void )
diff --git a/portable/GCC/ARM_CM85/non_secure/port.c b/portable/GCC/ARM_CM85/non_secure/port.c
index 7171a72..329de05 100644
--- a/portable/GCC/ARM_CM85/non_secure/port.c
+++ b/portable/GCC/ARM_CM85/non_secure/port.c
@@ -496,14 +496,14 @@
#endif /* configENABLE_MPU == 1 */
/*-----------------------------------------------------------*/
-#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
/**
* @brief This variable is set to pdTRUE when the scheduler is started.
*/
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
-#endif
+#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/**
* @brief Each task maintains its own interrupt status in the critical nesting
@@ -555,6 +555,7 @@
/*-----------------------------------------------------------*/
#if ( configUSE_TICKLESS_IDLE == 1 )
+
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
{
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
@@ -770,6 +771,7 @@
__asm volatile ( "cpsie i" ::: "memory" );
}
}
+
#endif /* configUSE_TICKLESS_IDLE */
/*-----------------------------------------------------------*/
@@ -827,6 +829,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
{
uint32_t ulAccessPermissions = 0;
@@ -843,10 +846,12 @@
return ulAccessPermissions;
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
{
#if defined( __ARMCC_VERSION )
@@ -935,10 +940,12 @@
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_FPU == 1 )
+
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
{
#if ( configENABLE_TRUSTZONE == 1 )
@@ -960,6 +967,7 @@
* LSPEN = 1 ==> Enable lazy context save of FP state. */
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
}
+
#endif /* configENABLE_FPU */
/*-----------------------------------------------------------*/
@@ -1740,11 +1748,11 @@
/* Initialize the critical nesting count ready for the first task. */
ulCriticalNesting = 0;
- #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
{
xSchedulerRunning = pdTRUE;
}
- #endif
+ #endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
/* Start the first task. */
vStartFirstTask();
@@ -1772,6 +1780,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
const struct xMEMORY_REGION * const xRegions,
StackType_t * pxBottomOfStack,
@@ -1893,10 +1902,12 @@
lIndex++;
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
-#if ( configENABLE_MPU == 1 )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
+
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
uint32_t ulBufferLength,
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
@@ -1949,7 +1960,8 @@
return xAccessGranted;
}
-#endif /* configENABLE_MPU */
+
+#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/*-----------------------------------------------------------*/
BaseType_t xPortIsInsideInterrupt( void )
diff --git a/portable/GCC/ARM_CM85_NTZ/non_secure/port.c b/portable/GCC/ARM_CM85_NTZ/non_secure/port.c
index 7171a72..329de05 100644
--- a/portable/GCC/ARM_CM85_NTZ/non_secure/port.c
+++ b/portable/GCC/ARM_CM85_NTZ/non_secure/port.c
@@ -496,14 +496,14 @@
#endif /* configENABLE_MPU == 1 */
/*-----------------------------------------------------------*/
-#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
/**
* @brief This variable is set to pdTRUE when the scheduler is started.
*/
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
-#endif
+#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/**
* @brief Each task maintains its own interrupt status in the critical nesting
@@ -555,6 +555,7 @@
/*-----------------------------------------------------------*/
#if ( configUSE_TICKLESS_IDLE == 1 )
+
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
{
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
@@ -770,6 +771,7 @@
__asm volatile ( "cpsie i" ::: "memory" );
}
}
+
#endif /* configUSE_TICKLESS_IDLE */
/*-----------------------------------------------------------*/
@@ -827,6 +829,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
{
uint32_t ulAccessPermissions = 0;
@@ -843,10 +846,12 @@
return ulAccessPermissions;
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
{
#if defined( __ARMCC_VERSION )
@@ -935,10 +940,12 @@
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_FPU == 1 )
+
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
{
#if ( configENABLE_TRUSTZONE == 1 )
@@ -960,6 +967,7 @@
* LSPEN = 1 ==> Enable lazy context save of FP state. */
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
}
+
#endif /* configENABLE_FPU */
/*-----------------------------------------------------------*/
@@ -1740,11 +1748,11 @@
/* Initialize the critical nesting count ready for the first task. */
ulCriticalNesting = 0;
- #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
{
xSchedulerRunning = pdTRUE;
}
- #endif
+ #endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
/* Start the first task. */
vStartFirstTask();
@@ -1772,6 +1780,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
const struct xMEMORY_REGION * const xRegions,
StackType_t * pxBottomOfStack,
@@ -1893,10 +1902,12 @@
lIndex++;
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
-#if ( configENABLE_MPU == 1 )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
+
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
uint32_t ulBufferLength,
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
@@ -1949,7 +1960,8 @@
return xAccessGranted;
}
-#endif /* configENABLE_MPU */
+
+#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/*-----------------------------------------------------------*/
BaseType_t xPortIsInsideInterrupt( void )
diff --git a/portable/IAR/ARM_CM23/non_secure/port.c b/portable/IAR/ARM_CM23/non_secure/port.c
index 7171a72..329de05 100644
--- a/portable/IAR/ARM_CM23/non_secure/port.c
+++ b/portable/IAR/ARM_CM23/non_secure/port.c
@@ -496,14 +496,14 @@
#endif /* configENABLE_MPU == 1 */
/*-----------------------------------------------------------*/
-#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
/**
* @brief This variable is set to pdTRUE when the scheduler is started.
*/
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
-#endif
+#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/**
* @brief Each task maintains its own interrupt status in the critical nesting
@@ -555,6 +555,7 @@
/*-----------------------------------------------------------*/
#if ( configUSE_TICKLESS_IDLE == 1 )
+
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
{
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
@@ -770,6 +771,7 @@
__asm volatile ( "cpsie i" ::: "memory" );
}
}
+
#endif /* configUSE_TICKLESS_IDLE */
/*-----------------------------------------------------------*/
@@ -827,6 +829,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
{
uint32_t ulAccessPermissions = 0;
@@ -843,10 +846,12 @@
return ulAccessPermissions;
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
{
#if defined( __ARMCC_VERSION )
@@ -935,10 +940,12 @@
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_FPU == 1 )
+
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
{
#if ( configENABLE_TRUSTZONE == 1 )
@@ -960,6 +967,7 @@
* LSPEN = 1 ==> Enable lazy context save of FP state. */
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
}
+
#endif /* configENABLE_FPU */
/*-----------------------------------------------------------*/
@@ -1740,11 +1748,11 @@
/* Initialize the critical nesting count ready for the first task. */
ulCriticalNesting = 0;
- #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
{
xSchedulerRunning = pdTRUE;
}
- #endif
+ #endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
/* Start the first task. */
vStartFirstTask();
@@ -1772,6 +1780,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
const struct xMEMORY_REGION * const xRegions,
StackType_t * pxBottomOfStack,
@@ -1893,10 +1902,12 @@
lIndex++;
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
-#if ( configENABLE_MPU == 1 )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
+
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
uint32_t ulBufferLength,
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
@@ -1949,7 +1960,8 @@
return xAccessGranted;
}
-#endif /* configENABLE_MPU */
+
+#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/*-----------------------------------------------------------*/
BaseType_t xPortIsInsideInterrupt( void )
diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/port.c b/portable/IAR/ARM_CM23_NTZ/non_secure/port.c
index 7171a72..329de05 100644
--- a/portable/IAR/ARM_CM23_NTZ/non_secure/port.c
+++ b/portable/IAR/ARM_CM23_NTZ/non_secure/port.c
@@ -496,14 +496,14 @@
#endif /* configENABLE_MPU == 1 */
/*-----------------------------------------------------------*/
-#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
/**
* @brief This variable is set to pdTRUE when the scheduler is started.
*/
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
-#endif
+#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/**
* @brief Each task maintains its own interrupt status in the critical nesting
@@ -555,6 +555,7 @@
/*-----------------------------------------------------------*/
#if ( configUSE_TICKLESS_IDLE == 1 )
+
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
{
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
@@ -770,6 +771,7 @@
__asm volatile ( "cpsie i" ::: "memory" );
}
}
+
#endif /* configUSE_TICKLESS_IDLE */
/*-----------------------------------------------------------*/
@@ -827,6 +829,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
{
uint32_t ulAccessPermissions = 0;
@@ -843,10 +846,12 @@
return ulAccessPermissions;
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
{
#if defined( __ARMCC_VERSION )
@@ -935,10 +940,12 @@
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_FPU == 1 )
+
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
{
#if ( configENABLE_TRUSTZONE == 1 )
@@ -960,6 +967,7 @@
* LSPEN = 1 ==> Enable lazy context save of FP state. */
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
}
+
#endif /* configENABLE_FPU */
/*-----------------------------------------------------------*/
@@ -1740,11 +1748,11 @@
/* Initialize the critical nesting count ready for the first task. */
ulCriticalNesting = 0;
- #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
{
xSchedulerRunning = pdTRUE;
}
- #endif
+ #endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
/* Start the first task. */
vStartFirstTask();
@@ -1772,6 +1780,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
const struct xMEMORY_REGION * const xRegions,
StackType_t * pxBottomOfStack,
@@ -1893,10 +1902,12 @@
lIndex++;
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
-#if ( configENABLE_MPU == 1 )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
+
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
uint32_t ulBufferLength,
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
@@ -1949,7 +1960,8 @@
return xAccessGranted;
}
-#endif /* configENABLE_MPU */
+
+#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/*-----------------------------------------------------------*/
BaseType_t xPortIsInsideInterrupt( void )
diff --git a/portable/IAR/ARM_CM33/non_secure/port.c b/portable/IAR/ARM_CM33/non_secure/port.c
index 7171a72..329de05 100644
--- a/portable/IAR/ARM_CM33/non_secure/port.c
+++ b/portable/IAR/ARM_CM33/non_secure/port.c
@@ -496,14 +496,14 @@
#endif /* configENABLE_MPU == 1 */
/*-----------------------------------------------------------*/
-#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
/**
* @brief This variable is set to pdTRUE when the scheduler is started.
*/
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
-#endif
+#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/**
* @brief Each task maintains its own interrupt status in the critical nesting
@@ -555,6 +555,7 @@
/*-----------------------------------------------------------*/
#if ( configUSE_TICKLESS_IDLE == 1 )
+
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
{
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
@@ -770,6 +771,7 @@
__asm volatile ( "cpsie i" ::: "memory" );
}
}
+
#endif /* configUSE_TICKLESS_IDLE */
/*-----------------------------------------------------------*/
@@ -827,6 +829,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
{
uint32_t ulAccessPermissions = 0;
@@ -843,10 +846,12 @@
return ulAccessPermissions;
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
{
#if defined( __ARMCC_VERSION )
@@ -935,10 +940,12 @@
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_FPU == 1 )
+
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
{
#if ( configENABLE_TRUSTZONE == 1 )
@@ -960,6 +967,7 @@
* LSPEN = 1 ==> Enable lazy context save of FP state. */
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
}
+
#endif /* configENABLE_FPU */
/*-----------------------------------------------------------*/
@@ -1740,11 +1748,11 @@
/* Initialize the critical nesting count ready for the first task. */
ulCriticalNesting = 0;
- #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
{
xSchedulerRunning = pdTRUE;
}
- #endif
+ #endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
/* Start the first task. */
vStartFirstTask();
@@ -1772,6 +1780,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
const struct xMEMORY_REGION * const xRegions,
StackType_t * pxBottomOfStack,
@@ -1893,10 +1902,12 @@
lIndex++;
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
-#if ( configENABLE_MPU == 1 )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
+
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
uint32_t ulBufferLength,
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
@@ -1949,7 +1960,8 @@
return xAccessGranted;
}
-#endif /* configENABLE_MPU */
+
+#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/*-----------------------------------------------------------*/
BaseType_t xPortIsInsideInterrupt( void )
diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/port.c b/portable/IAR/ARM_CM33_NTZ/non_secure/port.c
index 7171a72..329de05 100644
--- a/portable/IAR/ARM_CM33_NTZ/non_secure/port.c
+++ b/portable/IAR/ARM_CM33_NTZ/non_secure/port.c
@@ -496,14 +496,14 @@
#endif /* configENABLE_MPU == 1 */
/*-----------------------------------------------------------*/
-#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
/**
* @brief This variable is set to pdTRUE when the scheduler is started.
*/
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
-#endif
+#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/**
* @brief Each task maintains its own interrupt status in the critical nesting
@@ -555,6 +555,7 @@
/*-----------------------------------------------------------*/
#if ( configUSE_TICKLESS_IDLE == 1 )
+
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
{
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
@@ -770,6 +771,7 @@
__asm volatile ( "cpsie i" ::: "memory" );
}
}
+
#endif /* configUSE_TICKLESS_IDLE */
/*-----------------------------------------------------------*/
@@ -827,6 +829,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
{
uint32_t ulAccessPermissions = 0;
@@ -843,10 +846,12 @@
return ulAccessPermissions;
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
{
#if defined( __ARMCC_VERSION )
@@ -935,10 +940,12 @@
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_FPU == 1 )
+
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
{
#if ( configENABLE_TRUSTZONE == 1 )
@@ -960,6 +967,7 @@
* LSPEN = 1 ==> Enable lazy context save of FP state. */
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
}
+
#endif /* configENABLE_FPU */
/*-----------------------------------------------------------*/
@@ -1740,11 +1748,11 @@
/* Initialize the critical nesting count ready for the first task. */
ulCriticalNesting = 0;
- #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
{
xSchedulerRunning = pdTRUE;
}
- #endif
+ #endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
/* Start the first task. */
vStartFirstTask();
@@ -1772,6 +1780,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
const struct xMEMORY_REGION * const xRegions,
StackType_t * pxBottomOfStack,
@@ -1893,10 +1902,12 @@
lIndex++;
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
-#if ( configENABLE_MPU == 1 )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
+
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
uint32_t ulBufferLength,
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
@@ -1949,7 +1960,8 @@
return xAccessGranted;
}
-#endif /* configENABLE_MPU */
+
+#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/*-----------------------------------------------------------*/
BaseType_t xPortIsInsideInterrupt( void )
diff --git a/portable/IAR/ARM_CM35P/non_secure/port.c b/portable/IAR/ARM_CM35P/non_secure/port.c
index 7171a72..329de05 100644
--- a/portable/IAR/ARM_CM35P/non_secure/port.c
+++ b/portable/IAR/ARM_CM35P/non_secure/port.c
@@ -496,14 +496,14 @@
#endif /* configENABLE_MPU == 1 */
/*-----------------------------------------------------------*/
-#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
/**
* @brief This variable is set to pdTRUE when the scheduler is started.
*/
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
-#endif
+#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/**
* @brief Each task maintains its own interrupt status in the critical nesting
@@ -555,6 +555,7 @@
/*-----------------------------------------------------------*/
#if ( configUSE_TICKLESS_IDLE == 1 )
+
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
{
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
@@ -770,6 +771,7 @@
__asm volatile ( "cpsie i" ::: "memory" );
}
}
+
#endif /* configUSE_TICKLESS_IDLE */
/*-----------------------------------------------------------*/
@@ -827,6 +829,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
{
uint32_t ulAccessPermissions = 0;
@@ -843,10 +846,12 @@
return ulAccessPermissions;
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
{
#if defined( __ARMCC_VERSION )
@@ -935,10 +940,12 @@
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_FPU == 1 )
+
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
{
#if ( configENABLE_TRUSTZONE == 1 )
@@ -960,6 +967,7 @@
* LSPEN = 1 ==> Enable lazy context save of FP state. */
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
}
+
#endif /* configENABLE_FPU */
/*-----------------------------------------------------------*/
@@ -1740,11 +1748,11 @@
/* Initialize the critical nesting count ready for the first task. */
ulCriticalNesting = 0;
- #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
{
xSchedulerRunning = pdTRUE;
}
- #endif
+ #endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
/* Start the first task. */
vStartFirstTask();
@@ -1772,6 +1780,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
const struct xMEMORY_REGION * const xRegions,
StackType_t * pxBottomOfStack,
@@ -1893,10 +1902,12 @@
lIndex++;
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
-#if ( configENABLE_MPU == 1 )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
+
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
uint32_t ulBufferLength,
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
@@ -1949,7 +1960,8 @@
return xAccessGranted;
}
-#endif /* configENABLE_MPU */
+
+#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/*-----------------------------------------------------------*/
BaseType_t xPortIsInsideInterrupt( void )
diff --git a/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c b/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c
index 7171a72..329de05 100644
--- a/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c
+++ b/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c
@@ -496,14 +496,14 @@
#endif /* configENABLE_MPU == 1 */
/*-----------------------------------------------------------*/
-#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
/**
* @brief This variable is set to pdTRUE when the scheduler is started.
*/
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
-#endif
+#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/**
* @brief Each task maintains its own interrupt status in the critical nesting
@@ -555,6 +555,7 @@
/*-----------------------------------------------------------*/
#if ( configUSE_TICKLESS_IDLE == 1 )
+
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
{
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
@@ -770,6 +771,7 @@
__asm volatile ( "cpsie i" ::: "memory" );
}
}
+
#endif /* configUSE_TICKLESS_IDLE */
/*-----------------------------------------------------------*/
@@ -827,6 +829,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
{
uint32_t ulAccessPermissions = 0;
@@ -843,10 +846,12 @@
return ulAccessPermissions;
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
{
#if defined( __ARMCC_VERSION )
@@ -935,10 +940,12 @@
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_FPU == 1 )
+
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
{
#if ( configENABLE_TRUSTZONE == 1 )
@@ -960,6 +967,7 @@
* LSPEN = 1 ==> Enable lazy context save of FP state. */
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
}
+
#endif /* configENABLE_FPU */
/*-----------------------------------------------------------*/
@@ -1740,11 +1748,11 @@
/* Initialize the critical nesting count ready for the first task. */
ulCriticalNesting = 0;
- #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
{
xSchedulerRunning = pdTRUE;
}
- #endif
+ #endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
/* Start the first task. */
vStartFirstTask();
@@ -1772,6 +1780,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
const struct xMEMORY_REGION * const xRegions,
StackType_t * pxBottomOfStack,
@@ -1893,10 +1902,12 @@
lIndex++;
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
-#if ( configENABLE_MPU == 1 )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
+
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
uint32_t ulBufferLength,
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
@@ -1949,7 +1960,8 @@
return xAccessGranted;
}
-#endif /* configENABLE_MPU */
+
+#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/*-----------------------------------------------------------*/
BaseType_t xPortIsInsideInterrupt( void )
diff --git a/portable/IAR/ARM_CM4F_MPU/port.c b/portable/IAR/ARM_CM4F_MPU/port.c
index 622af0f..f5772c1 100644
--- a/portable/IAR/ARM_CM4F_MPU/port.c
+++ b/portable/IAR/ARM_CM4F_MPU/port.c
@@ -300,14 +300,14 @@
* variable. */
static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
-#if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
/*
* This variable is set to pdTRUE when the scheduler is started.
*/
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
-#endif
+#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/*
* Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure
@@ -858,11 +858,11 @@
/* Initialise the critical nesting count ready for the first task. */
uxCriticalNesting = 0;
- #if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+ #if ( configUSE_MPU_WRAPPERS_V1 == 0 )
{
xSchedulerRunning = pdTRUE;
}
- #endif
+ #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/* Ensure the VFP is enabled - it should be anyway. */
vPortEnableVFP();
@@ -1244,53 +1244,57 @@
}
/*-----------------------------------------------------------*/
-BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
- uint32_t ulBufferLength,
- uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
+#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
-{
- uint32_t i, ulBufferStartAddress, ulBufferEndAddress;
- BaseType_t xAccessGranted = pdFALSE;
- const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */
+ BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
+ uint32_t ulBufferLength,
+ uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
- if( xSchedulerRunning == pdFALSE )
{
- /* Grant access to all the kernel objects before the scheduler
- * is started. It is necessary because there is no task running
- * yet and therefore, we cannot use the permissions of any
- * task. */
- xAccessGranted = pdTRUE;
- }
- else if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG )
- {
- xAccessGranted = pdTRUE;
- }
- else
- {
- if( portADD_UINT32_WILL_OVERFLOW( ( ( uint32_t ) pvBuffer ), ( ulBufferLength - 1UL ) ) == pdFALSE )
+ uint32_t i, ulBufferStartAddress, ulBufferEndAddress;
+ BaseType_t xAccessGranted = pdFALSE;
+ const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */
+
+ if( xSchedulerRunning == pdFALSE )
{
- ulBufferStartAddress = ( uint32_t ) pvBuffer;
- ulBufferEndAddress = ( ( ( uint32_t ) pvBuffer ) + ulBufferLength - 1UL );
-
- for( i = 0; i < portTOTAL_NUM_REGIONS_IN_TCB; i++ )
+ /* Grant access to all the kernel objects before the scheduler
+ * is started. It is necessary because there is no task running
+ * yet and therefore, we cannot use the permissions of any
+ * task. */
+ xAccessGranted = pdTRUE;
+ }
+ else if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG )
+ {
+ xAccessGranted = pdTRUE;
+ }
+ else
+ {
+ if( portADD_UINT32_WILL_OVERFLOW( ( ( uint32_t ) pvBuffer ), ( ulBufferLength - 1UL ) ) == pdFALSE )
{
- if( portIS_ADDRESS_WITHIN_RANGE( ulBufferStartAddress,
- xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
- xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
- portIS_ADDRESS_WITHIN_RANGE( ulBufferEndAddress,
- xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
- xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
- portIS_AUTHORIZED( ulAccessRequested, xTaskMpuSettings->xRegionSettings[ i ].ulRegionPermissions ) )
+ ulBufferStartAddress = ( uint32_t ) pvBuffer;
+ ulBufferEndAddress = ( ( ( uint32_t ) pvBuffer ) + ulBufferLength - 1UL );
+
+ for( i = 0; i < portTOTAL_NUM_REGIONS_IN_TCB; i++ )
{
- xAccessGranted = pdTRUE;
- break;
+ if( portIS_ADDRESS_WITHIN_RANGE( ulBufferStartAddress,
+ xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
+ xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
+ portIS_ADDRESS_WITHIN_RANGE( ulBufferEndAddress,
+ xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
+ xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
+ portIS_AUTHORIZED( ulAccessRequested, xTaskMpuSettings->xRegionSettings[ i ].ulRegionPermissions ) )
+ {
+ xAccessGranted = pdTRUE;
+ break;
+ }
}
}
}
+
+ return xAccessGranted;
}
- return xAccessGranted;
-}
+#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/*-----------------------------------------------------------*/
diff --git a/portable/IAR/ARM_CM55/non_secure/port.c b/portable/IAR/ARM_CM55/non_secure/port.c
index 7171a72..329de05 100644
--- a/portable/IAR/ARM_CM55/non_secure/port.c
+++ b/portable/IAR/ARM_CM55/non_secure/port.c
@@ -496,14 +496,14 @@
#endif /* configENABLE_MPU == 1 */
/*-----------------------------------------------------------*/
-#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
/**
* @brief This variable is set to pdTRUE when the scheduler is started.
*/
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
-#endif
+#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/**
* @brief Each task maintains its own interrupt status in the critical nesting
@@ -555,6 +555,7 @@
/*-----------------------------------------------------------*/
#if ( configUSE_TICKLESS_IDLE == 1 )
+
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
{
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
@@ -770,6 +771,7 @@
__asm volatile ( "cpsie i" ::: "memory" );
}
}
+
#endif /* configUSE_TICKLESS_IDLE */
/*-----------------------------------------------------------*/
@@ -827,6 +829,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
{
uint32_t ulAccessPermissions = 0;
@@ -843,10 +846,12 @@
return ulAccessPermissions;
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
{
#if defined( __ARMCC_VERSION )
@@ -935,10 +940,12 @@
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_FPU == 1 )
+
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
{
#if ( configENABLE_TRUSTZONE == 1 )
@@ -960,6 +967,7 @@
* LSPEN = 1 ==> Enable lazy context save of FP state. */
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
}
+
#endif /* configENABLE_FPU */
/*-----------------------------------------------------------*/
@@ -1740,11 +1748,11 @@
/* Initialize the critical nesting count ready for the first task. */
ulCriticalNesting = 0;
- #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
{
xSchedulerRunning = pdTRUE;
}
- #endif
+ #endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
/* Start the first task. */
vStartFirstTask();
@@ -1772,6 +1780,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
const struct xMEMORY_REGION * const xRegions,
StackType_t * pxBottomOfStack,
@@ -1893,10 +1902,12 @@
lIndex++;
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
-#if ( configENABLE_MPU == 1 )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
+
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
uint32_t ulBufferLength,
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
@@ -1949,7 +1960,8 @@
return xAccessGranted;
}
-#endif /* configENABLE_MPU */
+
+#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/*-----------------------------------------------------------*/
BaseType_t xPortIsInsideInterrupt( void )
diff --git a/portable/IAR/ARM_CM55_NTZ/non_secure/port.c b/portable/IAR/ARM_CM55_NTZ/non_secure/port.c
index 7171a72..329de05 100644
--- a/portable/IAR/ARM_CM55_NTZ/non_secure/port.c
+++ b/portable/IAR/ARM_CM55_NTZ/non_secure/port.c
@@ -496,14 +496,14 @@
#endif /* configENABLE_MPU == 1 */
/*-----------------------------------------------------------*/
-#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
/**
* @brief This variable is set to pdTRUE when the scheduler is started.
*/
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
-#endif
+#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/**
* @brief Each task maintains its own interrupt status in the critical nesting
@@ -555,6 +555,7 @@
/*-----------------------------------------------------------*/
#if ( configUSE_TICKLESS_IDLE == 1 )
+
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
{
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
@@ -770,6 +771,7 @@
__asm volatile ( "cpsie i" ::: "memory" );
}
}
+
#endif /* configUSE_TICKLESS_IDLE */
/*-----------------------------------------------------------*/
@@ -827,6 +829,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
{
uint32_t ulAccessPermissions = 0;
@@ -843,10 +846,12 @@
return ulAccessPermissions;
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
{
#if defined( __ARMCC_VERSION )
@@ -935,10 +940,12 @@
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_FPU == 1 )
+
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
{
#if ( configENABLE_TRUSTZONE == 1 )
@@ -960,6 +967,7 @@
* LSPEN = 1 ==> Enable lazy context save of FP state. */
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
}
+
#endif /* configENABLE_FPU */
/*-----------------------------------------------------------*/
@@ -1740,11 +1748,11 @@
/* Initialize the critical nesting count ready for the first task. */
ulCriticalNesting = 0;
- #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
{
xSchedulerRunning = pdTRUE;
}
- #endif
+ #endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
/* Start the first task. */
vStartFirstTask();
@@ -1772,6 +1780,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
const struct xMEMORY_REGION * const xRegions,
StackType_t * pxBottomOfStack,
@@ -1893,10 +1902,12 @@
lIndex++;
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
-#if ( configENABLE_MPU == 1 )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
+
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
uint32_t ulBufferLength,
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
@@ -1949,7 +1960,8 @@
return xAccessGranted;
}
-#endif /* configENABLE_MPU */
+
+#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/*-----------------------------------------------------------*/
BaseType_t xPortIsInsideInterrupt( void )
diff --git a/portable/IAR/ARM_CM85/non_secure/port.c b/portable/IAR/ARM_CM85/non_secure/port.c
index 7171a72..329de05 100644
--- a/portable/IAR/ARM_CM85/non_secure/port.c
+++ b/portable/IAR/ARM_CM85/non_secure/port.c
@@ -496,14 +496,14 @@
#endif /* configENABLE_MPU == 1 */
/*-----------------------------------------------------------*/
-#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
/**
* @brief This variable is set to pdTRUE when the scheduler is started.
*/
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
-#endif
+#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/**
* @brief Each task maintains its own interrupt status in the critical nesting
@@ -555,6 +555,7 @@
/*-----------------------------------------------------------*/
#if ( configUSE_TICKLESS_IDLE == 1 )
+
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
{
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
@@ -770,6 +771,7 @@
__asm volatile ( "cpsie i" ::: "memory" );
}
}
+
#endif /* configUSE_TICKLESS_IDLE */
/*-----------------------------------------------------------*/
@@ -827,6 +829,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
{
uint32_t ulAccessPermissions = 0;
@@ -843,10 +846,12 @@
return ulAccessPermissions;
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
{
#if defined( __ARMCC_VERSION )
@@ -935,10 +940,12 @@
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_FPU == 1 )
+
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
{
#if ( configENABLE_TRUSTZONE == 1 )
@@ -960,6 +967,7 @@
* LSPEN = 1 ==> Enable lazy context save of FP state. */
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
}
+
#endif /* configENABLE_FPU */
/*-----------------------------------------------------------*/
@@ -1740,11 +1748,11 @@
/* Initialize the critical nesting count ready for the first task. */
ulCriticalNesting = 0;
- #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
{
xSchedulerRunning = pdTRUE;
}
- #endif
+ #endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
/* Start the first task. */
vStartFirstTask();
@@ -1772,6 +1780,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
const struct xMEMORY_REGION * const xRegions,
StackType_t * pxBottomOfStack,
@@ -1893,10 +1902,12 @@
lIndex++;
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
-#if ( configENABLE_MPU == 1 )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
+
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
uint32_t ulBufferLength,
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
@@ -1949,7 +1960,8 @@
return xAccessGranted;
}
-#endif /* configENABLE_MPU */
+
+#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/*-----------------------------------------------------------*/
BaseType_t xPortIsInsideInterrupt( void )
diff --git a/portable/IAR/ARM_CM85_NTZ/non_secure/port.c b/portable/IAR/ARM_CM85_NTZ/non_secure/port.c
index 7171a72..329de05 100644
--- a/portable/IAR/ARM_CM85_NTZ/non_secure/port.c
+++ b/portable/IAR/ARM_CM85_NTZ/non_secure/port.c
@@ -496,14 +496,14 @@
#endif /* configENABLE_MPU == 1 */
/*-----------------------------------------------------------*/
-#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
/**
* @brief This variable is set to pdTRUE when the scheduler is started.
*/
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
-#endif
+#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/**
* @brief Each task maintains its own interrupt status in the critical nesting
@@ -555,6 +555,7 @@
/*-----------------------------------------------------------*/
#if ( configUSE_TICKLESS_IDLE == 1 )
+
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
{
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
@@ -770,6 +771,7 @@
__asm volatile ( "cpsie i" ::: "memory" );
}
}
+
#endif /* configUSE_TICKLESS_IDLE */
/*-----------------------------------------------------------*/
@@ -827,6 +829,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static uint32_t prvGetRegionAccessPermissions( uint32_t ulRBARValue ) /* PRIVILEGED_FUNCTION */
{
uint32_t ulAccessPermissions = 0;
@@ -843,10 +846,12 @@
return ulAccessPermissions;
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
static void prvSetupMPU( void ) /* PRIVILEGED_FUNCTION */
{
#if defined( __ARMCC_VERSION )
@@ -935,10 +940,12 @@
portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
#if ( configENABLE_FPU == 1 )
+
static void prvSetupFPU( void ) /* PRIVILEGED_FUNCTION */
{
#if ( configENABLE_TRUSTZONE == 1 )
@@ -960,6 +967,7 @@
* LSPEN = 1 ==> Enable lazy context save of FP state. */
*( portFPCCR ) |= ( portFPCCR_ASPEN_MASK | portFPCCR_LSPEN_MASK );
}
+
#endif /* configENABLE_FPU */
/*-----------------------------------------------------------*/
@@ -1740,11 +1748,11 @@
/* Initialize the critical nesting count ready for the first task. */
ulCriticalNesting = 0;
- #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+ #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
{
xSchedulerRunning = pdTRUE;
}
- #endif
+ #endif /* ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
/* Start the first task. */
vStartFirstTask();
@@ -1772,6 +1780,7 @@
/*-----------------------------------------------------------*/
#if ( configENABLE_MPU == 1 )
+
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
const struct xMEMORY_REGION * const xRegions,
StackType_t * pxBottomOfStack,
@@ -1893,10 +1902,12 @@
lIndex++;
}
}
+
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/
-#if ( configENABLE_MPU == 1 )
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
+
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
uint32_t ulBufferLength,
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
@@ -1949,7 +1960,8 @@
return xAccessGranted;
}
-#endif /* configENABLE_MPU */
+
+#endif /* #if ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/*-----------------------------------------------------------*/
BaseType_t xPortIsInsideInterrupt( void )
diff --git a/portable/RVDS/ARM_CM4_MPU/port.c b/portable/RVDS/ARM_CM4_MPU/port.c
index af4bf5e..37d13e8 100644
--- a/portable/RVDS/ARM_CM4_MPU/port.c
+++ b/portable/RVDS/ARM_CM4_MPU/port.c
@@ -149,14 +149,14 @@
* switches can only occur when uxCriticalNesting is zero. */
PRIVILEGED_DATA static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
-#if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
/*
* This variable is set to pdTRUE when the scheduler is started.
*/
PRIVILEGED_DATA static BaseType_t xSchedulerRunning = pdFALSE;
-#endif
+#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/*
* Setup the timer to generate the tick interrupts.
@@ -963,11 +963,11 @@
/* Initialise the critical nesting count ready for the first task. */
uxCriticalNesting = 0;
- #if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+ #if ( configUSE_MPU_WRAPPERS_V1 == 0 )
{
xSchedulerRunning = pdTRUE;
}
- #endif
+ #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/* Ensure the VFP is enabled - it should be anyway. */
vPortEnableVFP();
@@ -1499,54 +1499,58 @@
}
/*-----------------------------------------------------------*/
-BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
- uint32_t ulBufferLength,
- uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
+#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
-{
- uint32_t i, ulBufferStartAddress, ulBufferEndAddress;
- BaseType_t xAccessGranted = pdFALSE;
- const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */
+ BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
+ uint32_t ulBufferLength,
+ uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
+
+ {
+ uint32_t i, ulBufferStartAddress, ulBufferEndAddress;
+ BaseType_t xAccessGranted = pdFALSE;
+ const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */
- if( xSchedulerRunning == pdFALSE )
- {
- /* Grant access to all the kernel objects before the scheduler
- * is started. It is necessary because there is no task running
- * yet and therefore, we cannot use the permissions of any
- * task. */
- xAccessGranted = pdTRUE;
- }
- else if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG )
- {
- xAccessGranted = pdTRUE;
- }
- else
- {
- if( portADD_UINT32_WILL_OVERFLOW( ( ( uint32_t ) pvBuffer ), ( ulBufferLength - 1UL ) ) == pdFALSE )
+ if( xSchedulerRunning == pdFALSE )
{
- ulBufferStartAddress = ( uint32_t ) pvBuffer;
- ulBufferEndAddress = ( ( ( uint32_t ) pvBuffer ) + ulBufferLength - 1UL );
-
- for( i = 0; i < portTOTAL_NUM_REGIONS_IN_TCB; i++ )
+ /* Grant access to all the kernel objects before the scheduler
+ * is started. It is necessary because there is no task running
+ * yet and therefore, we cannot use the permissions of any
+ * task. */
+ xAccessGranted = pdTRUE;
+ }
+ else if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG )
+ {
+ xAccessGranted = pdTRUE;
+ }
+ else
+ {
+ if( portADD_UINT32_WILL_OVERFLOW( ( ( uint32_t ) pvBuffer ), ( ulBufferLength - 1UL ) ) == pdFALSE )
{
- if( portIS_ADDRESS_WITHIN_RANGE( ulBufferStartAddress,
- xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
- xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
- portIS_ADDRESS_WITHIN_RANGE( ulBufferEndAddress,
- xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
- xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
- portIS_AUTHORIZED( ulAccessRequested, xTaskMpuSettings->xRegionSettings[ i ].ulRegionPermissions ) )
+ ulBufferStartAddress = ( uint32_t ) pvBuffer;
+ ulBufferEndAddress = ( ( ( uint32_t ) pvBuffer ) + ulBufferLength - 1UL );
+
+ for( i = 0; i < portTOTAL_NUM_REGIONS_IN_TCB; i++ )
{
- xAccessGranted = pdTRUE;
- break;
+ if( portIS_ADDRESS_WITHIN_RANGE( ulBufferStartAddress,
+ xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
+ xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
+ portIS_ADDRESS_WITHIN_RANGE( ulBufferEndAddress,
+ xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
+ xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
+ portIS_AUTHORIZED( ulAccessRequested, xTaskMpuSettings->xRegionSettings[ i ].ulRegionPermissions ) )
+ {
+ xAccessGranted = pdTRUE;
+ break;
+ }
}
}
}
+
+ return xAccessGranted;
}
- return xAccessGranted;
-}
+#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
/*-----------------------------------------------------------*/
__asm uint32_t prvPortGetIPSR( void )
