)]}'
{
  "commit": "4d9cd906d3f7c339ee3d6d64a00c416d58a8b003",
  "tree": "81355ff1757ddbed1b60852ba4b01c1878e38918",
  "parents": [
    "742729ed2925aa1f6746fe3fe1ac74ffdef89e19"
  ],
  "author": {
    "name": "Jonathan Cubides",
    "email": "92931721+cubidesj@users.noreply.github.com",
    "time": "Thu Mar 06 19:34:48 2025 +0100"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Thu Mar 06 10:34:48 2025 -0800"
  },
  "message": "RISCV Add FPU context save (#1250)\n\n* port: riscv: Split the number of registers and the size of the context\n\n* port: riscv: Create some macros for the FPU context\n\n* port: riscv: Add a couple of macros that store fpu context\n\n* port: riscv: Update the stack init function to include the fpu context size\n\n* port: riscv: Add a chip_specific_extensions file that includes the F extension\n\n* Update dictionary to include some risc-v instructions\n\n* port: riscv: Fix a few typos\n\n* port: riscv: Apply @aggarg\u0027s sugestions",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "3582741e3bc7c88d3d71001e19de95d7bcc9822c",
      "old_mode": 33188,
      "old_path": ".github/.cSpellWords.txt",
      "new_id": "27fb0fc336b4dee650ad0896082609a00faa5a83",
      "new_mode": 33188,
      "new_path": ".github/.cSpellWords.txt"
    },
    {
      "type": "modify",
      "old_id": "4d8a5fb537e759f9ea2dc2b3f1161c48cef4171e",
      "old_mode": 33188,
      "old_path": "portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h",
      "new_id": "c10869eb4b1fbd258a11e6aaf5749bb43dfc98df",
      "new_mode": 33188,
      "new_path": "portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h"
    },
    {
      "type": "modify",
      "old_id": "99613ada6faac05a6be273f70f063ba6065840af",
      "old_mode": 33188,
      "old_path": "portable/GCC/RISC-V/portASM.S",
      "new_id": "1fe50f67cda5701de1838998c474d5ea1f1e3ca6",
      "new_mode": 33188,
      "new_path": "portable/GCC/RISC-V/portASM.S"
    },
    {
      "type": "modify",
      "old_id": "6baae753d1af9d15f03e1cb02f233faca7a4c23d",
      "old_mode": 33188,
      "old_path": "portable/GCC/RISC-V/portContext.h",
      "new_id": "9afe6eef38f28d0a372a5175bf0cf4e6a658728e",
      "new_mode": 33188,
      "new_path": "portable/GCC/RISC-V/portContext.h"
    }
  ]
}