tree fa8ffb2e1378f768da5e2c1ff992d4884d735a02
parent 56428a9831775a202a21a00ddf9be84ddcc1c4e2
author Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> 1624413118 -0700
committer GitHub <noreply@github.com> 1624413118 -0700
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Add Cortex-A53 port with system register interface for CPU interface access (#357)

The difference between this port and portable/GCC/ARM_CA53_64_BIT is
that this port uses System Register interface to access CPU interface
while the other one uses Memory-mapped interface.

Signed-off-by: Gaurav Aggarwal 
Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>