Demo/ARM7_AT91SAM7X256_Eclipse/RTOSDemo/USB/USBSample.h

/*
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*/

#ifndef USB_DEMO_H
#define USB_DEMO_H


/*-----------------------------------------------------------*/

#define usbQUEUE_LENGTH						( 0x3 )	/* Must have all bits set! */
#define usbEND_POINT_0						( 0 )
#define usbEND_POINT_1						( 1 )
#define usbRX_COUNT_MASK					( ( unsigned portLONG ) 0x7ff )
#define AT91C_UDP_STALLSENT					AT91C_UDP_ISOERROR

/* Structure used to take a snapshot of the USB status from within the ISR. */
typedef struct X_ISR_STATUS
{
	unsigned portLONG ulISR;
	unsigned portLONG ulCSR0;
	unsigned portCHAR ucFifoData[ 8 ];
} xISRStatus;

/* Macros to manipulate the control and status registers.  These registers 
cannot be accessed using a direct read modify write operation outside of the 
ISR as some bits are left unchanged by writing with a 0, and some are left 
unchanged by writing with a 1. */

#define usbCSR_SET_BIT( pulValueNow, ulBit )											\
{																						\
	/* Set TXCOMP, RX_DATA_BK0, RXSETUP, */												\
	/* STALLSENT and RX_DATA_BK1 to 1 so the */											\
	/* write has no effect. */															\
	( * ( ( unsigned portLONG * ) pulValueNow ) ) |= ( unsigned portLONG ) 0x4f;		\
																						\
	/* Clear the FORCE_STALL and TXPKTRDY bits */										\
	/* so the write has no effect. */													\
	( * ( ( unsigned portLONG * ) pulValueNow ) ) &= ( unsigned portLONG ) 0xffffffcf;	\
																						\
	/* Set whichever bit we want set. */												\
	( * ( ( unsigned portLONG * ) pulValueNow ) ) |= ( ulBit );							\
}

/*
 * Creates the queue used to communicate between the USB task and the USB ISR, then
 * createst the task that manages the USB peripheral.
 */
void vStartUSBTask( unsigned portBASE_TYPE uxPriority );

#endif