)]}'
{
  "commit": "630cfb5b79dee06faaeedf2b69893b68a97c4c70",
  "tree": "254287a42a1869f675fabc968627710375eb2eb6",
  "parents": [
    "ff0989e46b15dca255b57cecaff22795bff9df85"
  ],
  "author": {
    "name": "Marouen Ghodhbane",
    "email": "marouen.ghodhbane@nxp.com",
    "time": "Wed Oct 09 18:34:55 2024 +0200"
  },
  "committer": {
    "name": "Archit Gupta",
    "email": "archigup@amazon.com",
    "time": "Wed Jan 22 17:00:50 2025 -0800"
  },
  "message": "portable: aarch64_sre: add the configuration and status registers to the fpu saved context\n\nFPSR and FPCR are two 64-bits registers where only the lower 32 bits are defined.\nSave them when doing context switch with FPU context saving enabled.\n\nSigned-off-by: Marouen Ghodhbane \u003cmarouen.ghodhbane@nxp.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "8cebcaf54e77bf8f679868e60a26ab57b94d98c6",
      "old_mode": 33188,
      "old_path": "portable/GCC/ARM_AARCH64_SRE/port.c",
      "new_id": "ffc34d746df3b28b128ebd0a2731606e4e2a596b",
      "new_mode": 33188,
      "new_path": "portable/GCC/ARM_AARCH64_SRE/port.c"
    },
    {
      "type": "modify",
      "old_id": "ed3c031d09e8e269af7afc3e193b16f4e8db0486",
      "old_mode": 33188,
      "old_path": "portable/GCC/ARM_AARCH64_SRE/portASM.S",
      "new_id": "8d69b2aa1a4a3ea1c18eb2fdac03a55ef12a13d5",
      "new_mode": 33188,
      "new_path": "portable/GCC/ARM_AARCH64_SRE/portASM.S"
    }
  ]
}
