tree 81ee7c6205172cf1a08fed1a63027f9b1921bb0a
parent 563c57e7dab713aa1e289795c44549239f732a43
author Paul Bartell <pbartell@amazon.com> 1678119568 -0800
committer GitHub <noreply@github.com> 1678119568 +0530
gpgsig -----BEGIN PGP SIGNATURE-----
 
 wsBcBAABCAAQBQJkBhKQCRBK7hj4Ov3rIwAASR8IAKIJPPo+ZDiwhsMxfPQW4hBU
 va5ZLwkzs5qM4XvngYVOVkYQ92SAF1o0uFYDgKSpI7S9vjhwox3ALTh6204i4Trt
 RDwEQXa7yQSfim3VMKxGxs2uv7e+ExiM1L/5D8Ch01Q1kKYPihMOoooUydGCMuco
 tgVbE/w1oa219M8e7dPSBkvVsFKA4Q5SibFL6rZpeKAR2sj7up2xfY7jvASTZ90+
 vN1qNzM0S8HzRitVLoQ9uR4rfmm5NGo38sEPU/4u+VV0N+cu0dHwo4EHNpNK6yF3
 KBSdT+BIN2HKqUVhozdN4WAfS3fDk9osqiwBbUif6VYukocbxRurGnmM7RO0qFk=
 =JVxz
 -----END PGP SIGNATURE-----
 

Enable building the GCC Cortex-R5 port without an FPU (#586)

* Ensure configUSE_TASK_FPU_SUPPORT option is set correctly

If one does enable the FPU of the Cortex-R5 processor, then the GCC
compiler will define the macro __ARM_FP. This can be used to ensure,
that the configUSE_TASK_FPU_SUPPORT is set accordingly.

* Enable the implementation of vPortTaskUsesFPU only if configUSE_TASK_FPU_SUPPORT is set to 1

* Remove error case in pxPortInitialiseStack

The case of configUSE_TASK_FPU_SUPPORT is 0 is now handled

* Enable access to FPU registers only if FPU is enabled

* Make minor formating changes

* Format ARM Cortex-R5 port

* Address review comments from @ChristosZosi

* Minor code review suggestions

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>