diff --git a/portable/GCC/ARM_CM4_MPU/port.c b/portable/GCC/ARM_CM4_MPU/port.c
index ea3514b..46d65fa 100644
--- a/portable/GCC/ARM_CM4_MPU/port.c
+++ b/portable/GCC/ARM_CM4_MPU/port.c
@@ -69,7 +69,7 @@
 #define portMPU_REGION_BASE_ADDRESS_REG           ( *( ( volatile uint32_t * ) 0xe000ed9C ) )
 #define portMPU_REGION_ATTRIBUTE_REG              ( *( ( volatile uint32_t * ) 0xe000edA0 ) )
 #define portMPU_CTRL_REG                          ( *( ( volatile uint32_t * ) 0xe000ed94 ) )
-#define portEXPECTED_MPU_TYPE_VALUE               ( 8UL << 8UL ) /* 8 regions, unified. */
+#define portEXPECTED_MPU_TYPE_VALUE               ( portTOTAL_NUM_REGIONS << 8UL )
 #define portMPU_ENABLE                            ( 0x01UL )
 #define portMPU_BACKGROUND_ENABLE                 ( 1UL << 2UL )
 #define portPRIVILEGED_EXECUTION_START_ADDRESS    ( 0UL )
@@ -360,8 +360,15 @@
         "	str r3, [r2]					\n"/* Disable MPU. */
         "									\n"
         "	ldr r2, =0xe000ed9c				\n"/* Region Base Address register. */
-        "	ldmia r1!, {r4-r11}				\n"/* Read 4 sets of MPU registers from TCB. */
-        "	stmia r2!, {r4-r11}				\n"/* Write 4 sets of MPU registers. */
+        "	ldmia r1!, {r4-r11}				\n" /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
+        "	stmia r2, {r4-r11}				\n" /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
+        "									\n"
+        #if ( portTOTAL_NUM_REGIONS == 16 )
+        "	ldmia r1!, {r4-r11}				\n" /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
+        "	stmia r2, {r4-r11}				\n" /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
+        "	ldmia r1!, {r4-r11}				\n" /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
+        "	stmia r2, {r4-r11}				\n" /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
+        #endif /* portTOTAL_NUM_REGIONS == 16. */
         "									\n"
         "	ldr r2, =0xe000ed94				\n"/* MPU_CTRL register. */
         "	ldr r3, [r2]					\n"/* Read the value of MPU_CTRL. */
@@ -577,8 +584,15 @@
         "	str r3, [r2]						\n"/* Disable MPU. */
         "										\n"
         "	ldr r2, =0xe000ed9c					\n"/* Region Base Address register. */
-        "	ldmia r1!, {r4-r11}					\n"/* Read 4 sets of MPU registers from TCB. */
-        "	stmia r2!, {r4-r11}					\n"/* Write 4 sets of MPU registers. */
+        "	ldmia r1!, {r4-r11}					\n" /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
+        "	stmia r2, {r4-r11}					\n" /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
+        "										\n"
+        #if ( portTOTAL_NUM_REGIONS == 16 )
+        "	ldmia r1!, {r4-r11}					\n" /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
+        "	stmia r2, {r4-r11}					\n" /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
+        "	ldmia r1!, {r4-r11}					\n" /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
+        "	stmia r2, {r4-r11}					\n" /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
+        #endif /* portTOTAL_NUM_REGIONS == 16. */
         "										\n"
         "	ldr r2, =0xe000ed94					\n"/* MPU_CTRL register. */
         "	ldr r3, [r2]						\n"/* Read the value of MPU_CTRL. */
@@ -674,6 +688,12 @@
         extern uint32_t __privileged_data_end__[];
     #endif /* if defined( __ARMCC_VERSION ) */
 
+    /* The only permitted number of regions are 8 or 16. */
+    configASSERT( ( portTOTAL_NUM_REGIONS == 8 ) || ( portTOTAL_NUM_REGIONS == 16 ) );
+
+    /* Ensure that the configTOTAL_MPU_REGIONS is configured correctly. */
+    configASSERT( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE );
+
     /* Check the expected MPU is present. */
     if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
     {
diff --git a/portable/GCC/ARM_CM4_MPU/portmacro.h b/portable/GCC/ARM_CM4_MPU/portmacro.h
index 3df29df..a774559 100644
--- a/portable/GCC/ARM_CM4_MPU/portmacro.h
+++ b/portable/GCC/ARM_CM4_MPU/portmacro.h
@@ -81,15 +81,21 @@
     #define portMPU_REGION_CACHEABLE_BUFFERABLE                      ( 0x07UL << 16UL )
     #define portMPU_REGION_EXECUTE_NEVER                             ( 0x01UL << 28UL )
 
+    /* MPU settings that can be overriden in FreeRTOSConfig.h. */
+    #ifndef configTOTAL_MPU_REGIONS
+        /* Define to 8 for backward compatibility. */
+        #define configTOTAL_MPU_REGIONS                              ( 8UL )
+    #endif
+
     #define portUNPRIVILEGED_FLASH_REGION                            ( 0UL )
     #define portPRIVILEGED_FLASH_REGION                              ( 1UL )
     #define portPRIVILEGED_RAM_REGION                                ( 2UL )
     #define portGENERAL_PERIPHERALS_REGION                           ( 3UL )
     #define portSTACK_REGION                                         ( 4UL )
     #define portFIRST_CONFIGURABLE_REGION                            ( 5UL )
-    #define portLAST_CONFIGURABLE_REGION                             ( 7UL )
-    #define portNUM_CONFIGURABLE_REGIONS                             ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
-    #define portTOTAL_NUM_REGIONS                                    ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
+    #define portTOTAL_NUM_REGIONS                                    ( configTOTAL_MPU_REGIONS )
+    #define portNUM_CONFIGURABLE_REGIONS                             ( portTOTAL_NUM_REGIONS - portFIRST_CONFIGURABLE_REGION )
+    #define portLAST_CONFIGURABLE_REGION                             ( portTOTAL_NUM_REGIONS - 1 )
 
     #define portSWITCH_TO_USER_MODE()    __asm volatile ( " mrs r0, control \n orr r0, #1 \n msr control, r0 " ::: "r0", "memory" )
 
diff --git a/portable/IAR/ARM_CM4F_MPU/port.c b/portable/IAR/ARM_CM4F_MPU/port.c
index 233af39..ba83d86 100644
--- a/portable/IAR/ARM_CM4F_MPU/port.c
+++ b/portable/IAR/ARM_CM4F_MPU/port.c
@@ -76,7 +76,7 @@
 #define portMPU_REGION_BASE_ADDRESS_REG           ( *( ( volatile uint32_t * ) 0xe000ed9C ) )
 #define portMPU_REGION_ATTRIBUTE_REG              ( *( ( volatile uint32_t * ) 0xe000edA0 ) )
 #define portMPU_CTRL_REG                          ( *( ( volatile uint32_t * ) 0xe000ed94 ) )
-#define portEXPECTED_MPU_TYPE_VALUE               ( 8UL << 8UL ) /* 8 regions, unified. */
+#define portEXPECTED_MPU_TYPE_VALUE               ( portTOTAL_NUM_REGIONS << 8UL )
 #define portMPU_ENABLE                            ( 0x01UL )
 #define portMPU_BACKGROUND_ENABLE                 ( 1UL << 2UL )
 #define portPRIVILEGED_EXECUTION_START_ADDRESS    ( 0UL )
@@ -527,6 +527,12 @@
     extern uint32_t __privileged_data_start__[];
     extern uint32_t __privileged_data_end__[];
 
+    /* The only permitted number of regions are 8 or 16. */
+    configASSERT( ( portTOTAL_NUM_REGIONS == 8 ) || ( portTOTAL_NUM_REGIONS == 16 ) );
+
+    /* Ensure that the configTOTAL_MPU_REGIONS is configured correctly. */
+    configASSERT( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE );
+
     /* Check the expected MPU is present. */
     if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
     {
diff --git a/portable/IAR/ARM_CM4F_MPU/portasm.s b/portable/IAR/ARM_CM4F_MPU/portasm.s
index c8bca88..3417667 100644
--- a/portable/IAR/ARM_CM4F_MPU/portasm.s
+++ b/portable/IAR/ARM_CM4F_MPU/portasm.s
@@ -91,10 +91,23 @@
 
 	/* Region Base Address register. */
 	ldr r2, =0xe000ed9c
-	/* Read 4 sets of MPU registers. */
+	/* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
 	ldmia r1!, {r4-r11}
-	/* Write 4 sets of MPU registers. */
-	stmia r2!, {r4-r11}
+	/* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
+	stmia r2, {r4-r11}
+
+	#ifdef configTOTAL_MPU_REGIONS
+		#if ( configTOTAL_MPU_REGIONS == 16 )
+			/* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
+			ldmia r1!, {r4-r11}
+			/* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
+			stmia r2, {r4-r11}
+			/* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
+			ldmia r1!, {r4-r11}
+			/* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
+			stmia r2, {r4-r11}
+		#endif /* configTOTAL_MPU_REGIONS == 16. */
+	#endif /* configTOTAL_MPU_REGIONS */
 
 	ldr r2, =0xe000ed94	/* MPU_CTRL register. */
 	ldr r3, [r2]		/* Read the value of MPU_CTRL. */
@@ -178,10 +191,23 @@
 
 	/* Region Base Address register. */
 	ldr r2, =0xe000ed9c
-	/* Read 4 sets of MPU registers. */
+	/* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
 	ldmia r1!, {r4-r11}
-	/* Write 4 sets of MPU registers. */
-	stmia r2!, {r4-r11}
+	/* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
+	stmia r2, {r4-r11}
+
+	#ifdef configTOTAL_MPU_REGIONS
+		#if ( configTOTAL_MPU_REGIONS == 16 )
+			/* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
+			ldmia r1!, {r4-r11}
+			/* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
+			stmia r2, {r4-r11}
+			/* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
+			ldmia r1!, {r4-r11}
+			/* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
+			stmia r2, {r4-r11}
+		#endif /* configTOTAL_MPU_REGIONS == 16. */
+	#endif /* configTOTAL_MPU_REGIONS */
 
 	ldr r2, =0xe000ed94	/* MPU_CTRL register. */
 	ldr r3, [r2]		/* Read the value of MPU_CTRL. */
diff --git a/portable/IAR/ARM_CM4F_MPU/portmacro.h b/portable/IAR/ARM_CM4F_MPU/portmacro.h
index d73c3f2..3214a17 100644
--- a/portable/IAR/ARM_CM4F_MPU/portmacro.h
+++ b/portable/IAR/ARM_CM4F_MPU/portmacro.h
@@ -84,15 +84,21 @@
     #define portMPU_REGION_CACHEABLE_BUFFERABLE                      ( 0x07UL << 16UL )
     #define portMPU_REGION_EXECUTE_NEVER                             ( 0x01UL << 28UL )
 
+    /* MPU settings that can be overriden in FreeRTOSConfig.h. */
+    #ifndef configTOTAL_MPU_REGIONS
+        /* Define to 8 for backward compatibility. */
+        #define configTOTAL_MPU_REGIONS                              ( 8UL )
+    #endif
+
     #define portUNPRIVILEGED_FLASH_REGION                            ( 0UL )
     #define portPRIVILEGED_FLASH_REGION                              ( 1UL )
     #define portPRIVILEGED_RAM_REGION                                ( 2UL )
     #define portGENERAL_PERIPHERALS_REGION                           ( 3UL )
     #define portSTACK_REGION                                         ( 4UL )
     #define portFIRST_CONFIGURABLE_REGION                            ( 5UL )
-    #define portLAST_CONFIGURABLE_REGION                             ( 7UL )
-    #define portNUM_CONFIGURABLE_REGIONS                             ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
-    #define portTOTAL_NUM_REGIONS                                    ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
+    #define portTOTAL_NUM_REGIONS                                    ( configTOTAL_MPU_REGIONS )
+    #define portNUM_CONFIGURABLE_REGIONS                             ( portTOTAL_NUM_REGIONS - portFIRST_CONFIGURABLE_REGION )
+    #define portLAST_CONFIGURABLE_REGION                             ( portTOTAL_NUM_REGIONS - 1UL )
 
     #define portSWITCH_TO_USER_MODE()    __asm volatile ( " mrs r0, control \n orr r0, r0, #1 \n msr control, r0 " ::: "r0", "memory" )
 
diff --git a/portable/RVDS/ARM_CM4_MPU/port.c b/portable/RVDS/ARM_CM4_MPU/port.c
index fc3c503..ec7c286 100644
--- a/portable/RVDS/ARM_CM4_MPU/port.c
+++ b/portable/RVDS/ARM_CM4_MPU/port.c
@@ -58,7 +58,7 @@
 #define portMPU_REGION_BASE_ADDRESS_REG           ( *( ( volatile uint32_t * ) 0xe000ed9C ) )
 #define portMPU_REGION_ATTRIBUTE_REG              ( *( ( volatile uint32_t * ) 0xe000edA0 ) )
 #define portMPU_CTRL_REG                          ( *( ( volatile uint32_t * ) 0xe000ed94 ) )
-#define portEXPECTED_MPU_TYPE_VALUE               ( 8UL << 8UL ) /* 8 regions, unified. */
+#define portEXPECTED_MPU_TYPE_VALUE               ( portTOTAL_NUM_REGIONS << 8UL )
 #define portMPU_ENABLE                            ( 0x01UL )
 #define portMPU_BACKGROUND_ENABLE                 ( 1UL << 2UL )
 #define portPRIVILEGED_EXECUTION_START_ADDRESS    ( 0UL )
@@ -310,7 +310,7 @@
 {
     extern prvSVCHandler
 
-        PRESERVE8
+    PRESERVE8
 
     /* Assumes psp was in use. */
     #ifndef USE_PROCESS_STACK   /* Code should not be required if a main() is using the process stack. */
@@ -321,6 +321,7 @@
     #else
         mrs r0, psp
     #endif
+
     b prvSVCHandler
 }
 /*-----------------------------------------------------------*/
@@ -329,44 +330,45 @@
 {
     PRESERVE8
 
-    ldr r0, = 0xE000ED08 /* Use the NVIC offset register to locate the stack. */
-              ldr r0, [ r0 ]
+    ldr r0, = 0xE000ED08        /* Use the NVIC offset register to locate the stack. */
     ldr r0, [ r0 ]
-    msr msp, r0              /* Set the msp back to the start of the stack. */
-    ldr r3, = pxCurrentTCB   /* Restore the context. */
-              ldr r1, [ r3 ]
-    ldr r0, [ r1 ]           /* The first item in the TCB is the task top of stack. */
-    add r1, r1, # 4          /* Move onto the second item in the TCB... */
+    ldr r0, [ r0 ]
+    msr msp, r0                 /* Set the msp back to the start of the stack. */
+    ldr r3, = pxCurrentTCB      /* Restore the context. */
+    ldr r1, [ r3 ]
+    ldr r0, [ r1 ]              /* The first item in the TCB is the task top of stack. */
+    add r1, r1, # 4             /* Move onto the second item in the TCB... */
 
-    dmb                      /* Complete outstanding transfers before disabling MPU. */
-    ldr r2, = 0xe000ed94     /* MPU_CTRL register. */
-              ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */
-    bic r3, r3, # 1          /* r3 = r3 & ~1 i.e. Clear the bit 0 in r3. */
-    str r3, [ r2 ]           /* Disable MPU. */
+    dmb                         /* Complete outstanding transfers before disabling MPU. */
+    ldr r2, = 0xe000ed94        /* MPU_CTRL register. */
+    ldr r3, [ r2 ]              /* Read the value of MPU_CTRL. */
+    bic r3, r3, # 1             /* r3 = r3 & ~1 i.e. Clear the bit 0 in r3. */
+    str r3, [ r2 ]              /* Disable MPU. */
 
-    ldr r2, = 0xe000ed9c     /* Region Base Address register. */
-              ldmia r1 !, {
-        r4 - r11
-    } /* Read 4 sets of MPU registers. */
-    stmia r2 !, {
-        r4 - r11
-    } /* Write 4 sets of MPU registers. */
+    ldr r2, = 0xe000ed9c        /* Region Base Address register. */
+    ldmia r1!, {r4-r11}         /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
+    stmia r2, {r4-r11}          /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
 
-    ldr r2, = 0xe000ed94 /* MPU_CTRL register. */
-              ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */
-    orr r3, r3, # 1          /* r3 = r3 | 1 i.e. Set the bit 0 in r3. */
-    str r3, [ r2 ]           /* Enable MPU. */
-    dsb                      /* Force memory writes before continuing. */
+#if ( portTOTAL_NUM_REGIONS == 16 )
+    ldmia r1!, {r4-r11}         /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
+    stmia r2, {r4-r11}          /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
+    ldmia r1!, {r4-r11}         /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
+    stmia r2, {r4-r11}          /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
+#endif /* portTOTAL_NUM_REGIONS == 16. */
 
-    ldmia r0 !, {
-        r3 - r11, r14
-    } /* Pop the registers that are not automatically saved on exception entry. */
+    ldr r2, = 0xe000ed94        /* MPU_CTRL register. */
+    ldr r3, [ r2 ]              /* Read the value of MPU_CTRL. */
+    orr r3, r3, # 1             /* r3 = r3 | 1 i.e. Set the bit 0 in r3. */
+    str r3, [ r2 ]              /* Enable MPU. */
+    dsb                         /* Force memory writes before continuing. */
+
+    ldmia r0!, {r3-r11, r14}    /* Pop the registers that are not automatically saved on exception entry. */
     msr control, r3
-    msr psp, r0 /* Restore the task stack pointer. */
+    msr psp, r0                 /* Restore the task stack pointer. */
     mov r0, # 0
     msr basepri, r0
     bx r14
-        nop
+    nop
 }
 /*-----------------------------------------------------------*/
 
@@ -478,7 +480,7 @@
 
     /* Use the NVIC offset register to locate the stack. */
     ldr r0, = 0xE000ED08
-              ldr r0, [ r0 ]
+    ldr r0, [ r0 ]
     ldr r0, [ r0 ]
     /* Set the msp back to the start of the stack. */
     msr msp, r0
@@ -496,7 +498,7 @@
     isb
     svc portSVC_START_SCHEDULER /* System call to start first task. */
     nop
-        nop
+    nop
 }
 
 void vPortEndScheduler( void )
@@ -544,24 +546,18 @@
 
     mrs r0, psp
 
-    ldr r3, = pxCurrentTCB /* Get the location of the current TCB. */
-              ldr r2, [ r3 ]
+    ldr r3, = pxCurrentTCB          /* Get the location of the current TCB. */
+    ldr r2, [ r3 ]
 
-    tst r14, # 0x10 /* Is the task using the FPU context?  If so, push high vfp registers. */
+    tst r14, # 0x10                 /* Is the task using the FPU context?  If so, push high vfp registers. */
     it eq
-    vstmdbeq r0 !, {
-        s16 - s31
-    }
+    vstmdbeq r0!, {s16-s31}
 
     mrs r1, control
-    stmdb r0 !, {
-        r1, r4 - r11, r14
-    } /* Save the remaining registers. */
-    str r0, [ r2 ] /* Save the new top of stack into the first member of the TCB. */
+    stmdb r0!, {r1, r4-r11, r14}    /* Save the remaining registers. */
+    str r0, [ r2 ]                  /* Save the new top of stack into the first member of the TCB. */
 
-    stmdb sp !, {
-        r0, r3
-    }
+    stmdb sp!, {r0, r3}
     mov r0, # configMAX_SYSCALL_INTERRUPT_PRIORITY
     msr basepri, r0
     dsb
@@ -569,48 +565,45 @@
     bl vTaskSwitchContext
     mov r0, # 0
     msr basepri, r0
-    ldmia sp !, {
-        r0, r3
-    }
+    ldmia sp!, {r0, r3}
     /* Restore the context. */
     ldr r1, [ r3 ]
-    ldr r0, [ r1 ]           /* The first item in the TCB is the task top of stack. */
-    add r1, r1, # 4          /* Move onto the second item in the TCB... */
+    ldr r0, [ r1 ]                  /* The first item in the TCB is the task top of stack. */
+    add r1, r1, # 4                 /* Move onto the second item in the TCB... */
 
-    dmb                      /* Complete outstanding transfers before disabling MPU. */
-    ldr r2, = 0xe000ed94     /* MPU_CTRL register. */
-              ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */
-    bic r3, r3, # 1          /* r3 = r3 & ~1 i.e. Clear the bit 0 in r3. */
-    str r3, [ r2 ]           /* Disable MPU. */
+    dmb                             /* Complete outstanding transfers before disabling MPU. */
+    ldr r2, = 0xe000ed94            /* MPU_CTRL register. */
+    ldr r3, [ r2 ]                  /* Read the value of MPU_CTRL. */
+    bic r3, r3, # 1                 /* r3 = r3 & ~1 i.e. Clear the bit 0 in r3. */
+    str r3, [ r2 ]                  /* Disable MPU. */
 
-    ldr r2, = 0xe000ed9c     /* Region Base Address register. */
-              ldmia r1 !, {
-        r4 - r11
-    } /* Read 4 sets of MPU registers. */
-    stmia r2 !, {
-        r4 - r11
-    } /* Write 4 sets of MPU registers. */
+    ldr r2, = 0xe000ed9c            /* Region Base Address register. */
+    ldmia r1!, {r4-r11}             /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
+    stmia r2, {r4-r11}              /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
 
-    ldr r2, = 0xe000ed94 /* MPU_CTRL register. */
-              ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */
-    orr r3, r3, # 1          /* r3 = r3 | 1 i.e. Set the bit 0 in r3. */
-    str r3, [ r2 ]           /* Enable MPU. */
-    dsb                      /* Force memory writes before continuing. */
+#if ( portTOTAL_NUM_REGIONS == 16 )
+    ldmia r1!, {r4-r11}             /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
+    stmia r2, {r4-r11}              /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
+    ldmia r1!, {r4-r11}             /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
+    stmia r2, {r4-r11}              /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
+#endif /* portTOTAL_NUM_REGIONS == 16. */
 
-    ldmia r0 !, {
-        r3 - r11, r14
-    } /* Pop the registers that are not automatically saved on exception entry. */
+    ldr r2, = 0xe000ed94            /* MPU_CTRL register. */
+    ldr r3, [ r2 ]                  /* Read the value of MPU_CTRL. */
+    orr r3, r3, #1                  /* r3 = r3 | 1 i.e. Set the bit 0 in r3. */
+    str r3, [ r2 ]                  /* Enable MPU. */
+    dsb                             /* Force memory writes before continuing. */
+
+    ldmia r0!, {r3-r11, r14}        /* Pop the registers that are not automatically saved on exception entry. */
     msr control, r3
 
-    tst r14, # 0x10 /* Is the task using the FPU context?  If so, pop the high vfp registers too. */
+    tst r14, # 0x10                 /* Is the task using the FPU context?  If so, pop the high vfp registers too. */
     it eq
-    vldmiaeq r0 !, {
-        s16 - s31
-    }
+    vldmiaeq r0!, {s16-s31}
 
     msr psp, r0
     bx r14
-        nop
+    nop
 }
 /*-----------------------------------------------------------*/
 
@@ -663,7 +656,7 @@
     PRESERVE8
 
     ldr.w r0, = 0xE000ED88 /* The FPU enable bits are in the CPACR. */
-                ldr r1, [ r0 ]
+    ldr r1, [ r0 ]
 
     orr r1, r1, # ( 0xf << 20 ) /* Enable CP10 and CP11 coprocessors, then save back. */
     str r1, [ r0 ]
@@ -682,6 +675,12 @@
     extern uint32_t __privileged_data_start__;
     extern uint32_t __privileged_data_end__;
 
+    /* The only permitted number of regions are 8 or 16. */
+    configASSERT( ( portTOTAL_NUM_REGIONS == 8 ) || ( portTOTAL_NUM_REGIONS == 16 ) );
+
+    /* Ensure that the configTOTAL_MPU_REGIONS is configured correctly. */
+    configASSERT( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE );
+
     /* Check the expected MPU is present. */
     if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
     {
diff --git a/portable/RVDS/ARM_CM4_MPU/portmacro.h b/portable/RVDS/ARM_CM4_MPU/portmacro.h
index cb9c99c..1cbb8b6 100644
--- a/portable/RVDS/ARM_CM4_MPU/portmacro.h
+++ b/portable/RVDS/ARM_CM4_MPU/portmacro.h
@@ -81,15 +81,21 @@
     #define portMPU_REGION_CACHEABLE_BUFFERABLE                      ( 0x07UL << 16UL )
     #define portMPU_REGION_EXECUTE_NEVER                             ( 0x01UL << 28UL )
 
+    /* MPU settings that can be overriden in FreeRTOSConfig.h. */
+    #ifndef configTOTAL_MPU_REGIONS
+        /* Define to 8 for backward compatibility. */
+        #define configTOTAL_MPU_REGIONS                              ( 8UL )
+    #endif
+
     #define portUNPRIVILEGED_FLASH_REGION                            ( 0UL )
     #define portPRIVILEGED_FLASH_REGION                              ( 1UL )
     #define portPRIVILEGED_RAM_REGION                                ( 2UL )
     #define portGENERAL_PERIPHERALS_REGION                           ( 3UL )
     #define portSTACK_REGION                                         ( 4UL )
     #define portFIRST_CONFIGURABLE_REGION                            ( 5UL )
-    #define portLAST_CONFIGURABLE_REGION                             ( 7UL )
-    #define portNUM_CONFIGURABLE_REGIONS                             ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
-    #define portTOTAL_NUM_REGIONS                                    ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
+    #define portTOTAL_NUM_REGIONS                                    ( configTOTAL_MPU_REGIONS )
+    #define portNUM_CONFIGURABLE_REGIONS                             ( portTOTAL_NUM_REGIONS - portFIRST_CONFIGURABLE_REGION )
+    #define portLAST_CONFIGURABLE_REGION                             ( portTOTAL_NUM_REGIONS - 1 )
 
     void vPortSwitchToUserMode( void );
     #define portSWITCH_TO_USER_MODE()    vPortSwitchToUserMode()