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pigweed / third_party / github / FreeRTOS / FreeRTOS-Kernel / 9c0c37ab9b56f2c90085b78df2f58b5833e473db / . / FreeRTOS / Demo / PPC440_Xilinx_Virtex5_GCC / __xps / system.xml
blob: bcd8c1da036da0c9a69ea3059aea0400438362e7 [file] [log] [blame]
<EDKSYSTEM EDKVERSION="11.2" EDWVERSION="1.1" TIMESTAMP="Tue Jun 30 20:53:27 2009">
<SYSTEMINFO ARCH="virtex5" DEVICE="5vfx70t" PACKAGE="ff1136" PART="5vfx70tff1136-1" SOURCE="C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/" SPEEDGRADE="-1"/>
<EXTERNALPORTS>
<PORT DIR="I" MHS_INDEX="0" NAME="fpga_0_RS232_Uart_1_RX_pin" SIGNAME="fpga_0_RS232_Uart_1_RX_pin"/>
<PORT DIR="O" MHS_INDEX="1" NAME="fpga_0_RS232_Uart_1_TX_pin" SIGNAME="fpga_0_RS232_Uart_1_TX_pin"/>
<PORT DIR="IO" ENDIAN="LITTLE" LSB="0" MHS_INDEX="2" MSB="7" NAME="fpga_0_LEDs_8Bit_GPIO_IO_pin" SIGNAME="fpga_0_LEDs_8Bit_GPIO_IO_pin"/>
<PORT DIR="IO" ENDIAN="LITTLE" LSB="0" MHS_INDEX="3" MSB="4" NAME="fpga_0_LEDs_Positions_GPIO_IO_pin" SIGNAME="fpga_0_LEDs_Positions_GPIO_IO_pin"/>
<PORT DIR="IO" ENDIAN="LITTLE" LSB="0" MHS_INDEX="4" MSB="4" NAME="fpga_0_Push_Buttons_5Bit_GPIO_IO_pin" SIGNAME="fpga_0_Push_Buttons_5Bit_GPIO_IO_pin"/>
<PORT DIR="IO" ENDIAN="LITTLE" LSB="0" MHS_INDEX="5" MSB="7" NAME="fpga_0_DIP_Switches_8Bit_GPIO_IO_pin" SIGNAME="fpga_0_DIP_Switches_8Bit_GPIO_IO_pin"/>
<PORT DIR="IO" MHS_INDEX="6" NAME="fpga_0_IIC_EEPROM_Sda_pin" SIGNAME="fpga_0_IIC_EEPROM_Sda_pin"/>
<PORT DIR="IO" MHS_INDEX="7" NAME="fpga_0_IIC_EEPROM_Scl_pin" SIGNAME="fpga_0_IIC_EEPROM_Scl_pin"/>
<PORT DIR="O" ENDIAN="LITTLE" LSB="7" MHS_INDEX="8" MSB="30" NAME="fpga_0_SRAM_Mem_A_pin" SIGNAME="fpga_0_SRAM_Mem_A_pin_vslice_7_30_concat"/>
<PORT DIR="O" MHS_INDEX="9" NAME="fpga_0_SRAM_Mem_CEN_pin" SIGNAME="fpga_0_SRAM_Mem_CEN_pin"/>
<PORT DIR="O" MHS_INDEX="10" NAME="fpga_0_SRAM_Mem_OEN_pin" SIGNAME="fpga_0_SRAM_Mem_OEN_pin"/>
<PORT DIR="O" MHS_INDEX="11" NAME="fpga_0_SRAM_Mem_WEN_pin" SIGNAME="fpga_0_SRAM_Mem_WEN_pin"/>
<PORT DIR="O" ENDIAN="LITTLE" LSB="0" MHS_INDEX="12" MSB="3" NAME="fpga_0_SRAM_Mem_BEN_pin" SIGNAME="fpga_0_SRAM_Mem_BEN_pin"/>
<PORT DIR="O" MHS_INDEX="13" NAME="fpga_0_SRAM_Mem_ADV_LDN_pin" SIGNAME="fpga_0_SRAM_Mem_ADV_LDN_pin"/>
<PORT DIR="IO" ENDIAN="LITTLE" LSB="0" MHS_INDEX="14" MSB="31" NAME="fpga_0_SRAM_Mem_DQ_pin" SIGNAME="fpga_0_SRAM_Mem_DQ_pin"/>
<PORT DIR="O" MHS_INDEX="15" NAME="fpga_0_SRAM_ZBT_CLK_OUT_pin" SIGIS="CLK" SIGNAME="SRAM_CLK_OUT_s"/>
<PORT CLKFREQUENCY="125000000" DIR="I" MHS_INDEX="16" NAME="fpga_0_SRAM_ZBT_CLK_FB_pin" SIGIS="CLK" SIGNAME="SRAM_CLK_FB_s"/>
<PORT DIR="I" MHS_INDEX="17" NAME="fpga_0_PCIe_Bridge_RXN_pin" SIGNAME="fpga_0_PCIe_Bridge_RXN_pin"/>
<PORT DIR="I" MHS_INDEX="18" NAME="fpga_0_PCIe_Bridge_RXP_pin" SIGNAME="fpga_0_PCIe_Bridge_RXP_pin"/>
<PORT DIR="O" MHS_INDEX="19" NAME="fpga_0_PCIe_Bridge_TXN_pin" SIGNAME="fpga_0_PCIe_Bridge_TXN_pin"/>
<PORT DIR="O" MHS_INDEX="20" NAME="fpga_0_PCIe_Bridge_TXP_pin" SIGNAME="fpga_0_PCIe_Bridge_TXP_pin"/>
<PORT DIR="I" MHS_INDEX="21" NAME="fpga_0_Ethernet_MAC_PHY_tx_clk_pin" SIGNAME="fpga_0_Ethernet_MAC_PHY_tx_clk_pin"/>
<PORT DIR="I" MHS_INDEX="22" NAME="fpga_0_Ethernet_MAC_PHY_rx_clk_pin" SIGNAME="fpga_0_Ethernet_MAC_PHY_rx_clk_pin"/>
<PORT DIR="I" MHS_INDEX="23" NAME="fpga_0_Ethernet_MAC_PHY_crs_pin" SIGNAME="fpga_0_Ethernet_MAC_PHY_crs_pin"/>
<PORT DIR="I" MHS_INDEX="24" NAME="fpga_0_Ethernet_MAC_PHY_dv_pin" SIGNAME="fpga_0_Ethernet_MAC_PHY_dv_pin"/>
<PORT DIR="I" ENDIAN="LITTLE" LSB="3" MHS_INDEX="25" MSB="0" NAME="fpga_0_Ethernet_MAC_PHY_rx_data_pin" SIGNAME="fpga_0_Ethernet_MAC_PHY_rx_data_pin"/>
<PORT DIR="I" MHS_INDEX="26" NAME="fpga_0_Ethernet_MAC_PHY_col_pin" SIGNAME="fpga_0_Ethernet_MAC_PHY_col_pin"/>
<PORT DIR="I" MHS_INDEX="27" NAME="fpga_0_Ethernet_MAC_PHY_rx_er_pin" SIGNAME="fpga_0_Ethernet_MAC_PHY_rx_er_pin"/>
<PORT DIR="O" MHS_INDEX="28" NAME="fpga_0_Ethernet_MAC_PHY_rst_n_pin" SIGNAME="fpga_0_Ethernet_MAC_PHY_rst_n_pin"/>
<PORT DIR="O" MHS_INDEX="29" NAME="fpga_0_Ethernet_MAC_PHY_tx_en_pin" SIGNAME="fpga_0_Ethernet_MAC_PHY_tx_en_pin"/>
<PORT DIR="O" ENDIAN="LITTLE" LSB="3" MHS_INDEX="30" MSB="0" NAME="fpga_0_Ethernet_MAC_PHY_tx_data_pin" SIGNAME="fpga_0_Ethernet_MAC_PHY_tx_data_pin"/>
<PORT DIR="I" MHS_INDEX="31" NAME="fpga_0_Ethernet_MAC_MDINT_pin" SENSITIVITY="LEVEL_LOW" SIGIS="INTERRUPT" SIGNAME="fpga_0_Ethernet_MAC_MDINT_pin"/>
<PORT DIR="IO" ENDIAN="BIG" LSB="63" MHS_INDEX="32" MSB="0" NAME="fpga_0_DDR2_SDRAM_DDR2_DQ_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_DQ_pin"/>
<PORT DIR="IO" ENDIAN="LITTLE" LSB="7" MHS_INDEX="33" MSB="0" NAME="fpga_0_DDR2_SDRAM_DDR2_DQS_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_DQS_pin"/>
<PORT DIR="IO" ENDIAN="BIG" LSB="7" MHS_INDEX="34" MSB="0" NAME="fpga_0_DDR2_SDRAM_DDR2_DQS_N_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_DQS_N_pin"/>
<PORT DIR="O" ENDIAN="LITTLE" LSB="12" MHS_INDEX="35" MSB="0" NAME="fpga_0_DDR2_SDRAM_DDR2_A_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_A_pin"/>
<PORT DIR="O" ENDIAN="BIG" LSB="1" MHS_INDEX="36" MSB="0" NAME="fpga_0_DDR2_SDRAM_DDR2_BA_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_BA_pin"/>
<PORT DIR="O" MHS_INDEX="37" NAME="fpga_0_DDR2_SDRAM_DDR2_RAS_N_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_RAS_N_pin"/>
<PORT DIR="O" MHS_INDEX="38" NAME="fpga_0_DDR2_SDRAM_DDR2_CAS_N_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_CAS_N_pin"/>
<PORT DIR="O" MHS_INDEX="39" NAME="fpga_0_DDR2_SDRAM_DDR2_WE_N_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_WE_N_pin"/>
<PORT DIR="O" MHS_INDEX="40" NAME="fpga_0_DDR2_SDRAM_DDR2_CS_N_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_CS_N_pin"/>
<PORT DIR="O" ENDIAN="LITTLE" LSB="1" MHS_INDEX="41" MSB="0" NAME="fpga_0_DDR2_SDRAM_DDR2_ODT_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_ODT_pin"/>
<PORT DIR="O" MHS_INDEX="42" NAME="fpga_0_DDR2_SDRAM_DDR2_CKE_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_CKE_pin"/>
<PORT DIR="O" ENDIAN="BIG" LSB="7" MHS_INDEX="43" MSB="0" NAME="fpga_0_DDR2_SDRAM_DDR2_DM_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_DM_pin"/>
<PORT DIR="O" ENDIAN="LITTLE" LSB="1" MHS_INDEX="44" MSB="0" NAME="fpga_0_DDR2_SDRAM_DDR2_CK_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_CK_pin"/>
<PORT DIR="O" ENDIAN="BIG" LSB="1" MHS_INDEX="45" MSB="0" NAME="fpga_0_DDR2_SDRAM_DDR2_CK_N_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_CK_N_pin"/>
<PORT DIR="O" ENDIAN="LITTLE" LSB="6" MHS_INDEX="46" MSB="0" NAME="fpga_0_SysACE_CompactFlash_SysACE_MPA_pin" SIGNAME="fpga_0_SysACE_CompactFlash_SysACE_MPA_pin"/>
<PORT DIR="I" MHS_INDEX="47" NAME="fpga_0_SysACE_CompactFlash_SysACE_CLK_pin" SIGNAME="fpga_0_SysACE_CompactFlash_SysACE_CLK_pin"/>
<PORT DIR="I" MHS_INDEX="48" NAME="fpga_0_SysACE_CompactFlash_SysACE_MPIRQ_pin" SIGNAME="fpga_0_SysACE_CompactFlash_SysACE_MPIRQ_pin"/>
<PORT DIR="O" MHS_INDEX="49" NAME="fpga_0_SysACE_CompactFlash_SysACE_CEN_pin" SIGNAME="fpga_0_SysACE_CompactFlash_SysACE_CEN_pin"/>
<PORT DIR="O" MHS_INDEX="50" NAME="fpga_0_SysACE_CompactFlash_SysACE_OEN_pin" SIGNAME="fpga_0_SysACE_CompactFlash_SysACE_OEN_pin"/>
<PORT DIR="O" MHS_INDEX="51" NAME="fpga_0_SysACE_CompactFlash_SysACE_WEN_pin" SIGNAME="fpga_0_SysACE_CompactFlash_SysACE_WEN_pin"/>
<PORT DIR="IO" ENDIAN="BIG" LSB="15" MHS_INDEX="52" MSB="0" NAME="fpga_0_SysACE_CompactFlash_SysACE_MPD_pin" SIGNAME="fpga_0_SysACE_CompactFlash_SysACE_MPD_pin"/>
<PORT CLKFREQUENCY="100000000" DIR="I" MHS_INDEX="53" NAME="fpga_0_clk_1_sys_clk_pin" SIGIS="CLK" SIGNAME="dcm_clk_s"/>
<PORT DIR="I" MHS_INDEX="54" NAME="fpga_0_rst_1_sys_rst_pin" RSTPOLARITY="0" SIGIS="RST" SIGNAME="sys_rst_s"/>
<PORT DIR="I" MHS_INDEX="55" NAME="fpga_0_PCIe_Diff_Clk_IBUF_DS_P_pin" SIGIS="CLK" SIGNAME="PCIe_Diff_Clk"/>
<PORT DIR="I" MHS_INDEX="56" NAME="fpga_0_PCIe_Diff_Clk_IBUF_DS_N_pin" SIGIS="CLK" SIGNAME="PCIe_Diff_Clk"/>
</EXTERNALPORTS>
<MODULES>
<MODULE HWVERSION="1.01.a" INSTANCE="ppc440_0" IPTYPE="PROCESSOR" MHS_INDEX="0" MODCLASS="PROCESSOR" MODTYPE="ppc440_virtex5" PROCTYPE="PPC440">
<DESCRIPTION TYPE="SHORT">PowerPC 440 Virtex-5</DESCRIPTION>
<DESCRIPTION TYPE="LONG">A wrapper to instantiate the PowerPC 440 Processor Block primitive</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/ppc440_virtex5_v1_01_a/doc/ppc440_virtex5.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETER MPD_INDEX="0" NAME="C_PIR" TYPE="std_logic_vector(28 to 31)" VALUE="0b1111">
<DESCRIPTION>Unique Processor ID</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="1" NAME="C_ENDIAN_RESET" TYPE="std_logic" VALUE="0">
<DESCRIPTION>Reset Value for Endian Storage Byte Ordering</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="2" NAME="C_USER_RESET" TYPE="std_logic_vector(0 to 3)" VALUE="0b0000">
<DESCRIPTION>Reset Value for User Defined Storage Attributes: Tattribute[4:7]</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="3" NAME="C_INTERCONNECT_IMASK" TYPE="BIT_VECTOR(0 to 31)" VALUE="0xffffffff">
<DESCRIPTION>Interrupt Mask for Crossbar-related Interrupts</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="4" NAME="C_ICU_RD_FETCH_PLB_PRIO" TYPE="std_logic_vector(0 to 1)" VALUE="0b00">
<DESCRIPTION>Arbitration Priority for all CPU Fetch Requests</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="5" NAME="C_ICU_RD_SPEC_PLB_PRIO" TYPE="std_logic_vector(0 to 1)" VALUE="0b00">
<DESCRIPTION>Arbitration Priority for all Speculative CPU Fetch Requests</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="6" NAME="C_ICU_RD_TOUCH_PLB_PRIO" TYPE="std_logic_vector(0 to 1)" VALUE="0b00">
<DESCRIPTION>Arbitration Priority for all CPU Fetch Requests Initiated by ICBT Instructions</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="7" NAME="C_DCU_RD_LD_CACHE_PLB_PRIO" TYPE="std_logic_vector(0 to 1)" VALUE="0b00">
<DESCRIPTION>Arbitration Priority for all CPU Cacheable Load Requests</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="8" NAME="C_DCU_RD_NONCACHE_PLB_PRIO" TYPE="std_logic_vector(0 to 1)" VALUE="0b00">
<DESCRIPTION>Arbitration Priority for CPU Non-cacheable Load Requests</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="9" NAME="C_DCU_RD_TOUCH_PLB_PRIO" TYPE="std_logic_vector(0 to 1)" VALUE="0b00">
<DESCRIPTION>Arbitration Priority for all CPU Load Requests Initiated by DCBT Instructions</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="10" NAME="C_DCU_RD_URGENT_PLB_PRIO" TYPE="std_logic_vector(0 to 1)" VALUE="0b00">
<DESCRIPTION>Arbitration Priority for an Urgent CPU Load Request</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="11" NAME="C_DCU_WR_FLUSH_PLB_PRIO" TYPE="std_logic_vector(0 to 1)" VALUE="0b00">
<DESCRIPTION>Arbitration Priority for CPU Write Requests Initiated by flush Instruction</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="12" NAME="C_DCU_WR_STORE_PLB_PRIO" TYPE="std_logic_vector(0 to 1)" VALUE="0b00">
<DESCRIPTION>Arbitration Priority for CPU Write Requests Initiated by store Instructions</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="13" NAME="C_DCU_WR_URGENT_PLB_PRIO" TYPE="std_logic_vector(0 to 1)" VALUE="0b00">
<DESCRIPTION>Arbitration Priority for an Urgent CPU Write Request</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="14" NAME="C_DMA0_PLB_PRIO" TYPE="bit_vector(0 to 1)" VALUE="0b00">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="15" NAME="C_DMA1_PLB_PRIO" TYPE="bit_vector(0 to 1)" VALUE="0b00">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="16" NAME="C_DMA2_PLB_PRIO" TYPE="bit_vector(0 to 1)" VALUE="0b00">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="17" NAME="C_DMA3_PLB_PRIO" TYPE="bit_vector(0 to 1)" VALUE="0b00">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="18" NAME="C_IDCR_BASEADDR" TYPE="std_logic_vector(0 to 9)" VALUE="0b0000000000">
<DESCRIPTION>Internal DCR Register Base Address</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="19" NAME="C_IDCR_HIGHADDR" TYPE="std_logic_vector(0 to 9)" VALUE="0b0011111111">
<DESCRIPTION>Internal DCR Register High Address</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="20" NAME="C_APU_CONTROL" TYPE="BIT_VECTOR(0 to 16)" VALUE="0b00010000000000000">
<DESCRIPTION>APU Controller Configuration Register Value</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="21" NAME="C_APU_UDI_0" TYPE="BIT_VECTOR(0 to 23)" VALUE="0b000000000000000000000000">
<DESCRIPTION>UDI Configuration Register 0 Value</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="22" NAME="C_APU_UDI_1" TYPE="BIT_VECTOR(0 to 23)" VALUE="0b000000000000000000000000">
<DESCRIPTION>UDI Configuration Register 1 Value</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="23" NAME="C_APU_UDI_2" TYPE="BIT_VECTOR(0 to 23)" VALUE="0b000000000000000000000000">
<DESCRIPTION>UDI Configuration Register 2 Value</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="24" NAME="C_APU_UDI_3" TYPE="BIT_VECTOR(0 to 23)" VALUE="0b000000000000000000000000">
<DESCRIPTION>UDI Configuration Register 3 Value</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="25" NAME="C_APU_UDI_4" TYPE="BIT_VECTOR(0 to 23)" VALUE="0b000000000000000000000000">
<DESCRIPTION>UDI Configuration Register 4 Value</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="26" NAME="C_APU_UDI_5" TYPE="BIT_VECTOR(0 to 23)" VALUE="0b000000000000000000000000">
<DESCRIPTION>UDI Configuration Register 5 Value</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="27" NAME="C_APU_UDI_6" TYPE="BIT_VECTOR(0 to 23)" VALUE="0b000000000000000000000000">
<DESCRIPTION>UDI Configuration Register 6 Value</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="28" NAME="C_APU_UDI_7" TYPE="BIT_VECTOR(0 to 23)" VALUE="0b000000000000000000000000">
<DESCRIPTION>UDI Configuration Register 7 Value</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="29" NAME="C_APU_UDI_8" TYPE="BIT_VECTOR(0 to 23)" VALUE="0b000000000000000000000000">
<DESCRIPTION>UDI Configuration Register 8 Value</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="30" NAME="C_APU_UDI_9" TYPE="BIT_VECTOR(0 to 23)" VALUE="0b000000000000000000000000">
<DESCRIPTION>UDI Configuration Register 9 Value</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="31" NAME="C_APU_UDI_10" TYPE="BIT_VECTOR(0 to 23)" VALUE="0b000000000000000000000000">
<DESCRIPTION>UDI Configuration Register 10 Value</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="32" NAME="C_APU_UDI_11" TYPE="BIT_VECTOR(0 to 23)" VALUE="0b000000000000000000000000">
<DESCRIPTION>UDI Configuration Register 11 Value</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="33" NAME="C_APU_UDI_12" TYPE="BIT_VECTOR(0 to 23)" VALUE="0b000000000000000000000000">
<DESCRIPTION>UDI Configuration Register 12 Value</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="34" NAME="C_APU_UDI_13" TYPE="BIT_VECTOR(0 to 23)" VALUE="0b000000000000000000000000">
<DESCRIPTION>UDI Configuration Register 13 Value</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="35" NAME="C_APU_UDI_14" TYPE="BIT_VECTOR(0 to 23)" VALUE="0b000000000000000000000000">
<DESCRIPTION>UDI Configuration Register 14 Value</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="36" NAME="C_APU_UDI_15" TYPE="BIT_VECTOR(0 to 23)" VALUE="0b000000000000000000000000">
<DESCRIPTION>UDI Configuration Register 15 Value</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="37" NAME="C_PPC440MC_ADDR_BASE" TYPE="std_logic_vector(0 to 31)" VALUE="0x00000000">
<DESCRIPTION>Base Address of Memory</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="38" NAME="C_PPC440MC_ADDR_HIGH" TYPE="std_logic_vector(0 to 31)" VALUE="0x0fffffff">
<DESCRIPTION>High Address of Memory </DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="39" NAME="C_PPC440MC_ROW_CONFLICT_MASK" TYPE="BIT_VECTOR(0 to 31)" VALUE="0x003FFE00">
<DESCRIPTION>Mask Used to Determine a Row Conflict</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="40" NAME="C_PPC440MC_BANK_CONFLICT_MASK" TYPE="BIT_VECTOR(0 to 31)" VALUE="0x00C00000">
<DESCRIPTION>Mask Used to Determine a Bank Conflict</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="41" NAME="C_PPC440MC_CONTROL" TYPE="BIT_VECTOR(0 to 31)" VALUE="0xF810008F">
<DESCRIPTION>Control and Configuration for the MC Interface</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="42" NAME="C_PPC440MC_PRIO_ICU" TYPE="integer" VALUE="4">
<DESCRIPTION>Secondary Arbitration Priority for all Instruction Fetches from CPU</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="43" NAME="C_PPC440MC_PRIO_DCUW" TYPE="integer" VALUE="3">
<DESCRIPTION>Secondary Arbitration Priority for all Data Writes from CPU</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="44" NAME="C_PPC440MC_PRIO_DCUR" TYPE="integer" VALUE="2">
<DESCRIPTION>Secondary Arbitration Priority for all Data Reads from CPU</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="45" NAME="C_PPC440MC_PRIO_SPLB1" TYPE="integer" VALUE="0">
<DESCRIPTION>Secondary Arbitration Priority for SPLB1, DMA2 and DMA3</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="46" NAME="C_PPC440MC_PRIO_SPLB0" TYPE="integer" VALUE="1">
<DESCRIPTION>Secondary Arbitration Priority for SPLB0, DMA0 and DMA1</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="47" NAME="C_PPC440MC_ARB_MODE" TYPE="integer" VALUE="0">
<DESCRIPTION>Memory Control Interface Arbitration Mode</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="48" NAME="C_PPC440MC_MAX_BURST" TYPE="integer" VALUE="8">
<DESCRIPTION>Max Number of Quad-words per Burst thru Xbar to MC Interface</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="49" NAME="C_MPLB_AWIDTH" TYPE="integer" VALUE="32">
<DESCRIPTION>C_MPLB_AWIDTH</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="50" NAME="C_MPLB_DWIDTH" TYPE="integer" VALUE="128">
<DESCRIPTION>C_MPLB_DWIDTH</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="51" NAME="C_MPLB_NATIVE_DWIDTH" TYPE="integer" VALUE="128">
<DESCRIPTION>C_MPLB_NATIVE_DWIDTH</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="52" NAME="C_MPLB_COUNTER" TYPE="BIT_VECTOR(0 to 31)" VALUE="0x00000500">
<DESCRIPTION>Watchdog Counter Threshold</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="53" NAME="C_MPLB_PRIO_ICU" TYPE="integer" VALUE="4">
<DESCRIPTION>Secondary Arbitration Prio for Instr Fetches</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="54" NAME="C_MPLB_PRIO_DCUW" TYPE="integer" VALUE="3">
<DESCRIPTION>Secondary Arbitration Prio for Data Writes</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="55" NAME="C_MPLB_PRIO_DCUR" TYPE="integer" VALUE="2">
<DESCRIPTION>Secondary Arbitration Prio for Data Reads</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="56" NAME="C_MPLB_PRIO_SPLB1" TYPE="integer" VALUE="0">
<DESCRIPTION>Secondary Arbitration Prio for SPLB1, DMA2, DMA3</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="57" NAME="C_MPLB_PRIO_SPLB0" TYPE="integer" VALUE="1">
<DESCRIPTION>Secondary Arbitration Prio for SPLB0, DMA0, DMA1</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="58" NAME="C_MPLB_ARB_MODE" TYPE="integer" VALUE="0">
<DESCRIPTION>MPLB Arbitration Mode</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="59" NAME="C_MPLB_SYNC_TATTRIBUTE" TYPE="integer" VALUE="0">
<DESCRIPTION>Allow MBusy to Block MPLB</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="60" NAME="C_MPLB_MAX_BURST" TYPE="integer" VALUE="8">
<DESCRIPTION>Max Num of Quad-words in Bursts</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="61" NAME="C_MPLB_ALLOW_LOCK_XFER" TYPE="integer" VALUE="1">
<DESCRIPTION>Allow Locked Transfer</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="62" NAME="C_MPLB_READ_PIPE_ENABLE" TYPE="integer" VALUE="1">
<DESCRIPTION>Allow Read Addr Pipelining</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="63" NAME="C_MPLB_WRITE_PIPE_ENABLE" TYPE="integer" VALUE="1">
<DESCRIPTION>Allow Write Addr Pipelining</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="64" NAME="C_MPLB_WRITE_POST_ENABLE" TYPE="integer" VALUE="1">
<DESCRIPTION>Allow Posted Writes</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="65" NAME="C_MPLB_P2P" TYPE="integer" VALUE="0">
<DESCRIPTION>C_MPLB_P2P</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="66" NAME="C_MPLB_WDOG_ENABLE" TYPE="integer" VALUE="1">
<DESCRIPTION>Enable Watchdog Timer</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="67" NAME="C_SPLB0_AWIDTH" TYPE="integer" VALUE="32">
<DESCRIPTION>C_SPLB0_AWIDTH</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="68" NAME="C_SPLB0_DWIDTH" TYPE="integer" VALUE="128">
<DESCRIPTION>C_SPLB0_DWIDTH</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="69" NAME="C_SPLB0_NATIVE_DWIDTH" TYPE="integer" VALUE="128">
<DESCRIPTION>C_SPLB0_NATIVE_DWIDTH</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="70" NAME="C_SPLB0_SUPPORT_BURSTS" TYPE="integer" VALUE="1">
<DESCRIPTION>SPLB Support Bursts</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="71" NAME="C_SPLB0_USE_MPLB_ADDR" TYPE="integer" VALUE="1">
<DESCRIPTION>Allow SPLB0 to Access MPLB Addr</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="72" NAME="C_SPLB0_NUM_MPLB_ADDR_RNG" TYPE="integer" VALUE="1">
<DESCRIPTION>Number of MPLB Addr Ranges</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="73" NAME="C_SPLB0_RNG_MC_BASEADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x00000000">
<DESCRIPTION>Base Addr </DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="74" NAME="C_SPLB0_RNG_MC_HIGHADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x0fffffff">
<DESCRIPTION>High Addr </DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" CHANGEDBY="USER" MPD_INDEX="75" NAME="C_SPLB0_RNG0_MPLB_BASEADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x80000000">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" CHANGEDBY="USER" MPD_INDEX="76" NAME="C_SPLB0_RNG0_MPLB_HIGHADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0xffffffff">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" MPD_INDEX="77" NAME="C_SPLB0_RNG1_MPLB_BASEADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0xffffffff">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" MPD_INDEX="78" NAME="C_SPLB0_RNG1_MPLB_HIGHADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x00000000">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" MPD_INDEX="79" NAME="C_SPLB0_RNG2_MPLB_BASEADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0xffffffff">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" MPD_INDEX="80" NAME="C_SPLB0_RNG2_MPLB_HIGHADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x00000000">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" MPD_INDEX="81" NAME="C_SPLB0_RNG3_MPLB_BASEADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0xffffffff">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" MPD_INDEX="82" NAME="C_SPLB0_RNG3_MPLB_HIGHADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x00000000">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="83" NAME="C_SPLB0_NUM_MASTERS" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Number of Masters</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="84" NAME="C_SPLB0_MID_WIDTH" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Mid Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="85" NAME="C_SPLB0_ALLOW_LOCK_XFER" TYPE="integer" VALUE="1">
<DESCRIPTION>SPLB Allow Locked Transfer</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="86" NAME="C_SPLB0_READ_PIPE_ENABLE" TYPE="integer" VALUE="1">
<DESCRIPTION>Enable SPLB Read Pipeline</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="87" NAME="C_SPLB0_PROPAGATE_MIRQ" TYPE="integer" VALUE="0">
<DESCRIPTION>Propagate MIRQ Signals from Xbar onto SPLB </DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="88" NAME="C_SPLB0_P2P" TYPE="integer" VALUE="0">
<DESCRIPTION>Use P2P</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="89" NAME="C_SPLB1_AWIDTH" TYPE="integer" VALUE="32">
<DESCRIPTION>C_SPLB1_AWIDTH</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="90" NAME="C_SPLB1_DWIDTH" TYPE="integer" VALUE="128">
<DESCRIPTION>C_SPLB1_DWIDTH</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="91" NAME="C_SPLB1_NATIVE_DWIDTH" TYPE="integer" VALUE="128">
<DESCRIPTION>C_SPLB1_NATIVE_DWIDTH</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="92" NAME="C_SPLB1_SUPPORT_BURSTS" TYPE="integer" VALUE="1">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="93" NAME="C_SPLB1_USE_MPLB_ADDR" TYPE="integer" VALUE="0">
<DESCRIPTION>Allow SPLB1 to Access MPLB Addr</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="94" NAME="C_SPLB1_NUM_MPLB_ADDR_RNG" TYPE="integer" VALUE="0">
<DESCRIPTION>Number of MPLB Address Ranges</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" MPD_INDEX="95" NAME="C_SPLB1_RNG_MC_BASEADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0xffffffff">
<DESCRIPTION>Base Addr </DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" MPD_INDEX="96" NAME="C_SPLB1_RNG_MC_HIGHADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x00000000">
<DESCRIPTION>High Addr</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" MPD_INDEX="97" NAME="C_SPLB1_RNG0_MPLB_BASEADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0xffffffff">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" MPD_INDEX="98" NAME="C_SPLB1_RNG0_MPLB_HIGHADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x00000000">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" MPD_INDEX="99" NAME="C_SPLB1_RNG1_MPLB_BASEADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0xffffffff">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" MPD_INDEX="100" NAME="C_SPLB1_RNG1_MPLB_HIGHADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x00000000">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" MPD_INDEX="101" NAME="C_SPLB1_RNG2_MPLB_BASEADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0xffffffff">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" MPD_INDEX="102" NAME="C_SPLB1_RNG2_MPLB_HIGHADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x00000000">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" MPD_INDEX="103" NAME="C_SPLB1_RNG3_MPLB_BASEADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0xffffffff">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" MPD_INDEX="104" NAME="C_SPLB1_RNG3_MPLB_HIGHADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x00000000">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="105" NAME="C_SPLB1_NUM_MASTERS" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Number of Masters</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="106" NAME="C_SPLB1_MID_WIDTH" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Mid Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="107" NAME="C_SPLB1_ALLOW_LOCK_XFER" TYPE="integer" VALUE="1">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="108" NAME="C_SPLB1_READ_PIPE_ENABLE" TYPE="integer" VALUE="1">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="109" NAME="C_SPLB1_PROPAGATE_MIRQ" TYPE="integer" VALUE="0">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="110" NAME="C_SPLB1_P2P" TYPE="integer" VALUE="-1">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="111" NAME="C_NUM_DMA" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Number of DMA Channel</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="112" NAME="C_DMA0_TXCHANNELCTRL" TYPE="BIT_VECTOR(0 to 31)" VALUE="0x01010000">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="113" NAME="C_DMA0_RXCHANNELCTRL" TYPE="BIT_VECTOR(0 to 31)" VALUE="0x01010000">
<DESCRIPTION> DMA 0 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="114" NAME="C_DMA0_CONTROL" TYPE="BIT_VECTOR(0 to 7)" VALUE="0b00000000">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="115" NAME="C_DMA0_TXIRQTIMER" TYPE="BIT_VECTOR(0 to 9)" VALUE="0b1111111111">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="116" NAME="C_DMA0_RXIRQTIMER" TYPE="BIT_VECTOR(0 to 9)" VALUE="0b1111111111">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="117" NAME="C_DMA1_TXCHANNELCTRL" TYPE="BIT_VECTOR(0 to 31)" VALUE="0x01010000">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="118" NAME="C_DMA1_RXCHANNELCTRL" TYPE="BIT_VECTOR(0 to 31)" VALUE="0x01010000">
<DESCRIPTION> DMA 1</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="119" NAME="C_DMA1_CONTROL" TYPE="BIT_VECTOR(0 to 7)" VALUE="0b00000000">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="120" NAME="C_DMA1_TXIRQTIMER" TYPE="BIT_VECTOR(0 to 9)" VALUE="0b1111111111">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="121" NAME="C_DMA1_RXIRQTIMER" TYPE="BIT_VECTOR(0 to 9)" VALUE="0b1111111111">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="122" NAME="C_DMA2_TXCHANNELCTRL" TYPE="BIT_VECTOR(0 to 31)" VALUE="0x01010000">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="123" NAME="C_DMA2_RXCHANNELCTRL" TYPE="BIT_VECTOR(0 to 31)" VALUE="0x01010000">
<DESCRIPTION> DMA 2</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="124" NAME="C_DMA2_CONTROL" TYPE="BIT_VECTOR(0 to 7)" VALUE="0b00000000">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="125" NAME="C_DMA2_TXIRQTIMER" TYPE="BIT_VECTOR(0 to 9)" VALUE="0b1111111111">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="126" NAME="C_DMA2_RXIRQTIMER" TYPE="BIT_VECTOR(0 to 9)" VALUE="0b1111111111">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="127" NAME="C_DMA3_TXCHANNELCTRL" TYPE="BIT_VECTOR(0 to 31)" VALUE="0x01010000">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="128" NAME="C_DMA3_RXCHANNELCTRL" TYPE="BIT_VECTOR(0 to 31)" VALUE="0x01010000">
<DESCRIPTION> DMA 3</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="129" NAME="C_DMA3_CONTROL" TYPE="BIT_VECTOR(0 to 7)" VALUE="0b00000000">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="130" NAME="C_DMA3_TXIRQTIMER" TYPE="BIT_VECTOR(0 to 9)" VALUE="0b1111111111">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="131" NAME="C_DMA3_RXIRQTIMER" TYPE="BIT_VECTOR(0 to 9)" VALUE="0b1111111111">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="132" NAME="C_DCR_AUTOLOCK_ENABLE" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Enable the Auto-lock Feature for the DCR Indirect Mode</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="133" NAME="C_PPCDM_ASYNCMODE" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Synchronization Mode for the External MDCR Interface</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="134" NAME="C_PPCDS_ASYNCMODE" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Synchronization Mode for the External SDCR Interface</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="135" NAME="C_GENERATE_PLB_TIMESPECS" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Generate Timing Constraint to Resynchronize SPLB MBusy Outputs</DESCRIPTION>
</PARAMETER>
<MEMORYMAP>
<MEMRANGE BASEDECIMAL="0" BASENAME="C_IDCR_BASEADDR" BASEVALUE="0b0000000000" HIGHDECIMAL="255" HIGHNAME="C_IDCR_HIGHADDR" HIGHVALUE="0b0011111111" MEMTYPE="REGISTER" MINSIZE="0x100" SIZE="256" SIZEABRV="256">
<SLVINTERFACES>
<BUSINTERFACE NAME="SDCR"/>
<BUSINTERFACE NAME="MDCR"/>
</SLVINTERFACES>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="0" BASENAME="C_SPLB0_RNG_MC_BASEADDR" BASEVALUE="0x00000000" HIGHDECIMAL="268435455" HIGHNAME="C_SPLB0_RNG_MC_HIGHADDR" HIGHVALUE="0x0fffffff" MEMTYPE="REGISTER" MINSIZE="0x08000000" SIZE="268435456" SIZEABRV="256M">
<SLVINTERFACES>
<BUSINTERFACE NAME="SPLB0"/>
</SLVINTERFACES>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="2147483648" BASENAME="C_SPLB0_RNG0_MPLB_BASEADDR" BASEVALUE="0x80000000" HIGHDECIMAL="4294967295" HIGHNAME="C_SPLB0_RNG0_MPLB_HIGHADDR" HIGHVALUE="0xffffffff" MEMTYPE="BRIDGE" MINSIZE="0x08000000" SIZE="-2147483648" SIZEABRV="2G">
<SLVINTERFACES>
<BUSINTERFACE NAME="SPLB0"/>
</SLVINTERFACES>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_SPLB0_RNG1_MPLB_BASEADDR" BASEVALUE="0xffffffff" HIGHDECIMAL="0" HIGHNAME="C_SPLB0_RNG1_MPLB_HIGHADDR" HIGHVALUE="0x00000000" IS_VALID="FALSE" MEMTYPE="BRIDGE" MINSIZE="0x08000000" SIZE="0" SIZEABRV="U">
<SLVINTERFACES>
<BUSINTERFACE NAME="SPLB0"/>
</SLVINTERFACES>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_SPLB0_RNG2_MPLB_BASEADDR" BASEVALUE="0xffffffff" HIGHDECIMAL="0" HIGHNAME="C_SPLB0_RNG2_MPLB_HIGHADDR" HIGHVALUE="0x00000000" IS_VALID="FALSE" MEMTYPE="BRIDGE" MINSIZE="0x08000000" SIZE="0" SIZEABRV="U">
<SLVINTERFACES>
<BUSINTERFACE NAME="SPLB0"/>
</SLVINTERFACES>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_SPLB0_RNG3_MPLB_BASEADDR" BASEVALUE="0xffffffff" HIGHDECIMAL="0" HIGHNAME="C_SPLB0_RNG3_MPLB_HIGHADDR" HIGHVALUE="0x00000000" IS_VALID="FALSE" MEMTYPE="BRIDGE" MINSIZE="0x08000000" SIZE="0" SIZEABRV="U">
<SLVINTERFACES>
<BUSINTERFACE NAME="SPLB0"/>
</SLVINTERFACES>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_SPLB1_RNG_MC_BASEADDR" BASEVALUE="0xffffffff" HIGHDECIMAL="0" HIGHNAME="C_SPLB1_RNG_MC_HIGHADDR" HIGHVALUE="0x00000000" MEMTYPE="REGISTER" MINSIZE="0x08000000" SIZE="0" SIZEABRV="U">
<SLVINTERFACES>
<BUSINTERFACE NAME="SPLB1"/>
</SLVINTERFACES>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_SPLB1_RNG0_MPLB_BASEADDR" BASEVALUE="0xffffffff" HIGHDECIMAL="0" HIGHNAME="C_SPLB1_RNG0_MPLB_HIGHADDR" HIGHVALUE="0x00000000" IS_VALID="FALSE" MEMTYPE="BRIDGE" MINSIZE="0x08000000" SIZE="0" SIZEABRV="U">
<SLVINTERFACES>
<BUSINTERFACE NAME="SPLB1"/>
</SLVINTERFACES>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_SPLB1_RNG1_MPLB_BASEADDR" BASEVALUE="0xffffffff" HIGHDECIMAL="0" HIGHNAME="C_SPLB1_RNG1_MPLB_HIGHADDR" HIGHVALUE="0x00000000" IS_VALID="FALSE" MEMTYPE="BRIDGE" MINSIZE="0x08000000" SIZE="0" SIZEABRV="U">
<SLVINTERFACES>
<BUSINTERFACE NAME="SPLB1"/>
</SLVINTERFACES>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_SPLB1_RNG2_MPLB_BASEADDR" BASEVALUE="0xffffffff" HIGHDECIMAL="0" HIGHNAME="C_SPLB1_RNG2_MPLB_HIGHADDR" HIGHVALUE="0x00000000" IS_VALID="FALSE" MEMTYPE="BRIDGE" MINSIZE="0x08000000" SIZE="0" SIZEABRV="U">
<SLVINTERFACES>
<BUSINTERFACE NAME="SPLB1"/>
</SLVINTERFACES>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_SPLB1_RNG3_MPLB_BASEADDR" BASEVALUE="0xffffffff" HIGHDECIMAL="0" HIGHNAME="C_SPLB1_RNG3_MPLB_HIGHADDR" HIGHVALUE="0x00000000" IS_VALID="FALSE" MEMTYPE="BRIDGE" MINSIZE="0x08000000" SIZE="0" SIZEABRV="U">
<SLVINTERFACES>
<BUSINTERFACE NAME="SPLB1"/>
</SLVINTERFACES>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="4294959104" BASENAME="C_BASEADDR" BASEVALUE="0xffffe000" HIGHDECIMAL="4294967295" HIGHNAME="C_HIGHADDR" HIGHVALUE="0xffffffff" INSTANCE="xps_bram_if_cntlr_1" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="MEMORY" SIZE="8192" SIZEABRV="8K">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
</ACCESSROUTE>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="2214592512" BASENAME="C_BASEADDR" BASEVALUE="0x84000000" HIGHDECIMAL="2214658047" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8400ffff" INSTANCE="RS232_Uart_1" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
</ACCESSROUTE>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="2168717312" BASENAME="C_BASEADDR" BASEVALUE="0x81440000" HIGHDECIMAL="2168782847" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8144ffff" INSTANCE="LEDs_8Bit" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
</ACCESSROUTE>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="2168586240" BASENAME="C_BASEADDR" BASEVALUE="0x81420000" HIGHDECIMAL="2168651775" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8142ffff" INSTANCE="LEDs_Positions" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
</ACCESSROUTE>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="2168455168" BASENAME="C_BASEADDR" BASEVALUE="0x81400000" HIGHDECIMAL="2168520703" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8140ffff" INSTANCE="Push_Buttons_5Bit" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
</ACCESSROUTE>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="2168848384" BASENAME="C_BASEADDR" BASEVALUE="0x81460000" HIGHDECIMAL="2168913919" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8146ffff" INSTANCE="DIP_Switches_8Bit" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
</ACCESSROUTE>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="2170552320" BASENAME="C_BASEADDR" BASEVALUE="0x81600000" HIGHDECIMAL="2170617855" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8160ffff" INSTANCE="IIC_EEPROM" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
</ACCESSROUTE>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="4160749568" BASENAME="C_MEM0_BASEADDR" BASEVALUE="0xf8000000" HIGHDECIMAL="4161798143" HIGHNAME="C_MEM0_HIGHADDR" HIGHVALUE="0xf80fffff" INSTANCE="SRAM" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="MEMORY" SIZE="1048576" SIZEABRV="1M">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
</ACCESSROUTE>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="2243952640" BASENAME="C_BASEADDR" BASEVALUE="0x85c00000" HIGHDECIMAL="2244018175" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x85c0ffff" INSTANCE="PCIe_Bridge" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
</ACCESSROUTE>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="3221225472" BASENAME="C_IPIFBAR_0" BASEVALUE="0xc0000000" HIGHDECIMAL="3758096383" HIGHNAME="C_IPIFBAR_HIGHADDR_0" HIGHVALUE="0xdfffffff" INSTANCE="PCIe_Bridge" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="BRIDGE" SIZE="536870912" SIZEABRV="512M">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
</ACCESSROUTE>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="3758096384" BASENAME="C_IPIFBAR_1" BASEVALUE="0xe0000000" HIGHDECIMAL="4026531839" HIGHNAME="C_IPIFBAR_HIGHADDR_1" HIGHVALUE="0xefffffff" INSTANCE="PCIe_Bridge" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="BRIDGE" SIZE="268435456" SIZEABRV="256M">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
</ACCESSROUTE>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="2164260864" BASENAME="C_BASEADDR" BASEVALUE="0x81000000" HIGHDECIMAL="2164326399" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8100ffff" INSTANCE="Ethernet_MAC" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
</ACCESSROUTE>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="2204106752" BASENAME="C_BASEADDR" BASEVALUE="0x83600000" HIGHDECIMAL="2204172287" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8360ffff" INSTANCE="SysACE_CompactFlash" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
</ACCESSROUTE>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="2172649472" BASENAME="C_BASEADDR" BASEVALUE="0x81800000" HIGHDECIMAL="2172715007" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8180ffff" INSTANCE="xps_intc_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
</ACCESSROUTE>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="0" BASENAME="C_MEM_BASEADDR" BASEVALUE="0x00000000" HIGHDECIMAL="268435455" HIGHNAME="C_MEM_HIGHADDR" HIGHVALUE="0x0fffffff" INSTANCE="DDR2_SDRAM" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="MEMORY" SIZE="268435456" SIZEABRV="256M">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="ppc440_0_PPC440MC"/>
</ACCESSROUTE>
</MEMRANGE>
</MEMORYMAP>
<PORT CLKFREQUENCY="125000000" DIR="I" IS_INMHS="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="CPMC440CLK" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0"/>
<PORT CLKFREQUENCY="125000000" DIR="I" IS_INMHS="TRUE" MHS_INDEX="1" MPD_INDEX="2" NAME="CPMINTERCONNECTCLK" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0"/>
<PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="2" MPD_INDEX="4" NAME="CPMINTERCONNECTCLKNTO1" SIGNAME="net_vcc"/>
<PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="3" MPD_INDEX="24" NAME="EICC440EXTIRQ" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="ppc440_0_EICC440EXTIRQ"/>
<PORT CLKFREQUENCY="125000000" DIR="I" IS_INMHS="TRUE" MHS_INDEX="4" MPD_INDEX="78" NAME="CPMMCCLK" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
<PORT BUS="MPLB" CLKFREQUENCY="125000000" DEF_SIGNAME="__BUS__" DIR="I" IS_INMHS="TRUE" MHS_INDEX="5" MPD_INDEX="91" NAME="CPMPPCMPLBCLK" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
<PORT BUS="SPLB0" CLKFREQUENCY="125000000" DEF_SIGNAME="__BUS__" DIR="I" IS_INMHS="TRUE" MHS_INDEX="6" MPD_INDEX="127" NAME="CPMPPCS0PLBCLK" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
<PORT DIR="I" MPD_INDEX="1" NAME="CPMC440CLKEN" SIGNAME="__NOC__"/>
<PORT DIR="I" MPD_INDEX="3" NAME="CPMINTERCONNECTCLKEN" SIGNAME="__NOC__"/>
<PORT DIR="I" MPD_INDEX="5" NAME="CPMC440CORECLOCKINACTIVE" SIGNAME="__NOC__"/>
<PORT DIR="I" MPD_INDEX="6" NAME="CPMC440TIMERCLOCK" SIGIS="CLK" SIGNAME="__NOC__"/>
<PORT DIR="O" MPD_INDEX="7" NAME="C440MACHINECHECK" SIGNAME="__NOC__"/>
<PORT DIR="O" MPD_INDEX="8" NAME="C440CPMCORESLEEPREQ" SIGNAME="__NOC__"/>
<PORT DIR="O" MPD_INDEX="9" NAME="C440CPMDECIRPTREQ" SIGNAME="__NOC__"/>
<PORT DIR="O" MPD_INDEX="10" NAME="C440CPMFITIRPTREQ" SIGNAME="__NOC__"/>
<PORT DIR="O" MPD_INDEX="11" NAME="C440CPMMSRCE" SIGNAME="__NOC__"/>
<PORT DIR="O" MPD_INDEX="12" NAME="C440CPMMSREE" SIGNAME="__NOC__"/>
<PORT DIR="O" MPD_INDEX="13" NAME="C440CPMTIMERRESETREQ" SIGNAME="__NOC__"/>
<PORT DIR="O" MPD_INDEX="14" NAME="C440CPMWDIRPTREQ" SIGNAME="__NOC__"/>
<PORT DIR="O" MPD_INDEX="15" NAME="PPCCPMINTERCONNECTBUSY" SIGNAME="__NOC__"/>
<PORT DIR="I" MPD_INDEX="16" NAME="DBGC440DEBUGHALT" SIGNAME="__NOC__">
<DESCRIPTION>JTAG HALT</DESCRIPTION>
</PORT>
<PORT DIR="I" MPD_INDEX="17" NAME="DBGC440DEBUGHALTNEG" SIGNAME="__NOC__">
<DESCRIPTION>JTAG HALT INV</DESCRIPTION>
</PORT>
<PORT DIR="I" MPD_INDEX="18" NAME="DBGC440SYSTEMSTATUS" SIGNAME="__NOC__" VECFORMULA="[0:4]"/>
<PORT DIR="I" MPD_INDEX="19" NAME="DBGC440UNCONDDEBUGEVENT" SIGNAME="__NOC__"/>
<PORT DIR="O" MPD_INDEX="20" NAME="C440DBGSYSTEMCONTROL" SIGNAME="__NOC__" VECFORMULA="[0:7]"/>
<PORT DIR="O" MPD_INDEX="21" NAME="SPLB0_Error" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
<PORT DIR="O" MPD_INDEX="22" NAME="SPLB1_Error" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
<PORT DIR="I" MPD_INDEX="23" NAME="EICC440CRITIRQ" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
<PORT DIR="O" MPD_INDEX="25" NAME="PPCEICINTERCONNECTIRQ" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
<PORT DIR="I" MPD_INDEX="26" NAME="CPMDCRCLK" SIGIS="CLK" SIGNAME="__NOC__"/>
<PORT BUS="MDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="27" NAME="DCRPPCDMACK" SIGNAME="__NOC__"/>
<PORT BUS="MDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="28" NAME="DCRPPCDMDBUSIN" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
<PORT BUS="MDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="29" NAME="DCRPPCDMTIMEOUTWAIT" SIGNAME="__NOC__"/>
<PORT BUS="MDCR" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="30" NAME="PPCDMDCRREAD" SIGNAME="__NOC__"/>
<PORT BUS="MDCR" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="31" NAME="PPCDMDCRWRITE" SIGNAME="__NOC__"/>
<PORT BUS="MDCR" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="32" NAME="PPCDMDCRABUS" SIGNAME="__NOC__" VECFORMULA="[0:9]"/>
<PORT BUS="MDCR" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="33" NAME="PPCDMDCRDBUSOUT" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
<PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="34" NAME="DCRPPCDSREAD" SIGNAME="__NOC__"/>
<PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="35" NAME="DCRPPCDSWRITE" SIGNAME="__NOC__"/>
<PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="36" NAME="DCRPPCDSABUS" SIGNAME="__NOC__" VECFORMULA="[0:9]"/>
<PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="37" NAME="DCRPPCDSDBUSOUT" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
<PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="38" NAME="PPCDSDCRACK" SIGNAME="__NOC__"/>
<PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="39" NAME="PPCDSDCRDBUSIN" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
<PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="40" NAME="PPCDSDCRTIMEOUTWAIT" SIGNAME="__NOC__"/>
<PORT BUS="MFCB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="41" NAME="CPMFCMCLK" SIGIS="CLK" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="42" NAME="FCMAPUCR" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="43" NAME="FCMAPUDONE" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="44" NAME="FCMAPUEXCEPTION" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="45" NAME="FCMAPUFPSCRFEX" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="46" NAME="FCMAPURESULT" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="47" NAME="FCMAPURESULTVALID" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="48" NAME="FCMAPUSLEEPNOTREADY" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="49" NAME="FCMAPUCONFIRMINSTR" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="50" NAME="FCMAPUSTOREDATA" SIGNAME="__NOC__" VECFORMULA="[0:127]"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="51" NAME="APUFCMDECNONAUTON" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="52" NAME="APUFCMDECFPUOP" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="53" NAME="APUFCMDECLDSTXFERSIZE" SIGNAME="__NOC__" VECFORMULA="[0:2]"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="54" NAME="APUFCMDECLOAD" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="55" NAME="APUFCMNEXTINSTRREADY" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="56" NAME="APUFCMDECSTORE" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="57" NAME="APUFCMDECUDI" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="58" NAME="APUFCMDECUDIVALID" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="59" NAME="APUFCMENDIAN" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="60" NAME="APUFCMFLUSH" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="61" NAME="APUFCMINSTRUCTION" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="62" NAME="APUFCMINSTRVALID" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="63" NAME="APUFCMLOADBYTEADDR" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="64" NAME="APUFCMLOADDATA" SIGNAME="__NOC__" VECFORMULA="[0:127]"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="65" NAME="APUFCMLOADDVALID" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="66" NAME="APUFCMOPERANDVALID" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="67" NAME="APUFCMRADATA" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="68" NAME="APUFCMRBDATA" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="69" NAME="APUFCMWRITEBACKOK" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="70" NAME="APUFCMMSRFE0" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="71" NAME="APUFCMMSRFE1" SIGNAME="__NOC__"/>
<PORT BUS="JTAGPPC" DEF_SIGNAME="ppc440_0_jtagppc_bus_JTGC405TCK" DIR="I" MPD_INDEX="72" NAME="JTGC440TCK" SIGNAME="ppc440_0_jtagppc_bus_JTGC405TCK">
<DESCRIPTION>JTAG TCK</DESCRIPTION>
</PORT>
<PORT BUS="JTAGPPC" DEF_SIGNAME="ppc440_0_jtagppc_bus_JTGC405TDI" DIR="I" MPD_INDEX="73" NAME="JTGC440TDI" SIGNAME="ppc440_0_jtagppc_bus_JTGC405TDI">
<DESCRIPTION>JTAG TDI</DESCRIPTION>
</PORT>
<PORT BUS="JTAGPPC" DEF_SIGNAME="ppc440_0_jtagppc_bus_JTGC405TMS" DIR="I" MPD_INDEX="74" NAME="JTGC440TMS" SIGNAME="ppc440_0_jtagppc_bus_JTGC405TMS">
<DESCRIPTION>JTAG TMS</DESCRIPTION>
</PORT>
<PORT BUS="JTAGPPC" DEF_SIGNAME="ppc440_0_jtagppc_bus_JTGC405TRSTNEG" DIR="I" MPD_INDEX="75" NAME="JTGC440TRSTNEG" SIGNAME="ppc440_0_jtagppc_bus_JTGC405TRSTNEG">
<DESCRIPTION>JTAG TRST</DESCRIPTION>
</PORT>
<PORT BUS="JTAGPPC" DEF_SIGNAME="ppc440_0_jtagppc_bus_C405JTGTDO" DIR="O" MPD_INDEX="76" NAME="C440JTGTDO" SIGNAME="ppc440_0_jtagppc_bus_C405JTGTDO">
<DESCRIPTION>JTAG TDO</DESCRIPTION>
</PORT>
<PORT BUS="JTAGPPC" DEF_SIGNAME="ppc440_0_jtagppc_bus_C405JTGTDOEN" DIR="O" MPD_INDEX="77" NAME="C440JTGTDOEN" SIGNAME="ppc440_0_jtagppc_bus_C405JTGTDOEN"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MCMIREADDATA" DIR="I" MPD_INDEX="79" NAME="MCMIREADDATA" SIGNAME="ppc440_0_PPC440MC_MCMIREADDATA" VECFORMULA="[0:127]"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MCMIREADDATAVALID" DIR="I" MPD_INDEX="80" NAME="MCMIREADDATAVALID" SIGNAME="ppc440_0_PPC440MC_MCMIREADDATAVALID"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MCMIREADDATAERR" DIR="I" MPD_INDEX="81" NAME="MCMIREADDATAERR" SIGNAME="ppc440_0_PPC440MC_MCMIREADDATAERR"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MCMIADDRREADYTOACCEPT" DIR="I" MPD_INDEX="82" NAME="MCMIADDRREADYTOACCEPT" SIGNAME="ppc440_0_PPC440MC_MCMIADDRREADYTOACCEPT"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MIMCREADNOTWRITE" DIR="O" MPD_INDEX="83" NAME="MIMCREADNOTWRITE" SIGNAME="ppc440_0_PPC440MC_MIMCREADNOTWRITE"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MIMCADDRESS" DIR="O" MPD_INDEX="84" NAME="MIMCADDRESS" SIGNAME="ppc440_0_PPC440MC_MIMCADDRESS" VECFORMULA="[0:35]"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MIMCADDRESSVALID" DIR="O" MPD_INDEX="85" NAME="MIMCADDRESSVALID" SIGNAME="ppc440_0_PPC440MC_MIMCADDRESSVALID"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MIMCWRITEDATA" DIR="O" MPD_INDEX="86" NAME="MIMCWRITEDATA" SIGNAME="ppc440_0_PPC440MC_MIMCWRITEDATA" VECFORMULA="[0:127]"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MIMCWRITEDATAVALID" DIR="O" MPD_INDEX="87" NAME="MIMCWRITEDATAVALID" SIGNAME="ppc440_0_PPC440MC_MIMCWRITEDATAVALID"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MIMCBYTEENABLE" DIR="O" MPD_INDEX="88" NAME="MIMCBYTEENABLE" SIGNAME="ppc440_0_PPC440MC_MIMCBYTEENABLE" VECFORMULA="[0:15]"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MIMCBANKCONFLICT" DIR="O" MPD_INDEX="89" NAME="MIMCBANKCONFLICT" SIGNAME="ppc440_0_PPC440MC_MIMCBANKCONFLICT"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MIMCROWCONFLICT" DIR="O" MPD_INDEX="90" NAME="MIMCROWCONFLICT" SIGNAME="ppc440_0_PPC440MC_MIMCROWCONFLICT"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MBusy" DIR="I" MPD_INDEX="92" NAME="PLBPPCMMBUSY" SIGNAME="plb_v46_0_PLB_MBusy"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MIRQ" DIR="I" MPD_INDEX="93" NAME="PLBPPCMMIRQ" SIGNAME="plb_v46_0_PLB_MIRQ"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MRdErr" DIR="I" MPD_INDEX="94" NAME="PLBPPCMMRDERR" SIGNAME="plb_v46_0_PLB_MRdErr"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MWrErr" DIR="I" MPD_INDEX="95" NAME="PLBPPCMMWRERR" SIGNAME="plb_v46_0_PLB_MWrErr"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MAddrAck" DIR="I" MPD_INDEX="96" NAME="PLBPPCMADDRACK" SIGNAME="plb_v46_0_PLB_MAddrAck"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MRdBTerm" DIR="I" MPD_INDEX="97" NAME="PLBPPCMRDBTERM" SIGNAME="plb_v46_0_PLB_MRdBTerm"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MRdDAck" DIR="I" MPD_INDEX="98" NAME="PLBPPCMRDDACK" SIGNAME="plb_v46_0_PLB_MRdDAck"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MRdDBus" DIR="I" MPD_INDEX="99" NAME="PLBPPCMRDDBUS" SIGNAME="plb_v46_0_PLB_MRdDBus" VECFORMULA="[0:127]"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MRdWdAddr" DIR="I" MPD_INDEX="100" NAME="PLBPPCMRDWDADDR" SIGNAME="plb_v46_0_PLB_MRdWdAddr" VECFORMULA="[0:3]"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MRearbitrate" DIR="I" MPD_INDEX="101" NAME="PLBPPCMREARBITRATE" SIGNAME="plb_v46_0_PLB_MRearbitrate"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MSSize" DIR="I" MPD_INDEX="102" NAME="PLBPPCMSSIZE" SIGNAME="plb_v46_0_PLB_MSSize" VECFORMULA="[0:1]"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MTimeout" DIR="I" MPD_INDEX="103" NAME="PLBPPCMTIMEOUT" SIGNAME="plb_v46_0_PLB_MTimeout"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MWrBTerm" DIR="I" MPD_INDEX="104" NAME="PLBPPCMWRBTERM" SIGNAME="plb_v46_0_PLB_MWrBTerm"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MWrDAck" DIR="I" MPD_INDEX="105" NAME="PLBPPCMWRDACK" SIGNAME="plb_v46_0_PLB_MWrDAck"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendPri" DIR="I" MPD_INDEX="106" NAME="PLBPPCMRDPENDPRI" SIGNAME="plb_v46_0_PLB_rdPendPri" VECFORMULA="[0:1]"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendReq" DIR="I" MPD_INDEX="107" NAME="PLBPPCMRDPENDREQ" SIGNAME="plb_v46_0_PLB_rdPendReq"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_reqPri" DIR="I" MPD_INDEX="108" NAME="PLBPPCMREQPRI" SIGNAME="plb_v46_0_PLB_reqPri" VECFORMULA="[0:1]"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendPri" DIR="I" MPD_INDEX="109" NAME="PLBPPCMWRPENDPRI" SIGNAME="plb_v46_0_PLB_wrPendPri" VECFORMULA="[0:1]"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendReq" DIR="I" MPD_INDEX="110" NAME="PLBPPCMWRPENDREQ" SIGNAME="plb_v46_0_PLB_wrPendReq"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_abort" DIR="O" MPD_INDEX="111" NAME="PPCMPLBABORT" SIGNAME="plb_v46_0_M_abort"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_ABus" DIR="O" MPD_INDEX="112" NAME="PPCMPLBABUS" SIGNAME="plb_v46_0_M_ABus" VECFORMULA="[0:31]"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_BE" DIR="O" MPD_INDEX="113" NAME="PPCMPLBBE" SIGNAME="plb_v46_0_M_BE" VECFORMULA="[0:15]"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_busLock" DIR="O" MPD_INDEX="114" NAME="PPCMPLBBUSLOCK" SIGNAME="plb_v46_0_M_busLock"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_lockErr" DIR="O" MPD_INDEX="115" NAME="PPCMPLBLOCKERR" SIGNAME="plb_v46_0_M_lockErr"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_MSize" DIR="O" MPD_INDEX="116" NAME="PPCMPLBMSIZE" SIGNAME="plb_v46_0_M_MSize" VECFORMULA="[0:1]"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_priority" DIR="O" MPD_INDEX="117" NAME="PPCMPLBPRIORITY" SIGNAME="plb_v46_0_M_priority" VECFORMULA="[0:1]"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_rdBurst" DIR="O" MPD_INDEX="118" NAME="PPCMPLBRDBURST" SIGNAME="plb_v46_0_M_rdBurst"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_request" DIR="O" MPD_INDEX="119" NAME="PPCMPLBREQUEST" SIGNAME="plb_v46_0_M_request"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_RNW" DIR="O" MPD_INDEX="120" NAME="PPCMPLBRNW" SIGNAME="plb_v46_0_M_RNW"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_size" DIR="O" MPD_INDEX="121" NAME="PPCMPLBSIZE" SIGNAME="plb_v46_0_M_size" VECFORMULA="[0:3]"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_TAttribute" DIR="O" MPD_INDEX="122" NAME="PPCMPLBTATTRIBUTE" SIGNAME="plb_v46_0_M_TAttribute" VECFORMULA="[0:15]"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_type" DIR="O" MPD_INDEX="123" NAME="PPCMPLBTYPE" SIGNAME="plb_v46_0_M_type" VECFORMULA="[0:2]"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_UABus" DIR="O" MPD_INDEX="124" NAME="PPCMPLBUABUS" SIGNAME="plb_v46_0_M_UABus" VECFORMULA="[0:31]"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_wrBurst" DIR="O" MPD_INDEX="125" NAME="PPCMPLBWRBURST" SIGNAME="plb_v46_0_M_wrBurst"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_wrDBus" DIR="O" MPD_INDEX="126" NAME="PPCMPLBWRDBUS" SIGNAME="plb_v46_0_M_wrDBus" VECFORMULA="[0:127]"/>
<PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_masterID" DIR="I" MPD_INDEX="128" NAME="PLBPPCS0MASTERID" SIGNAME="ppc440_0_SPLB0_PLB_masterID" VECFORMULA="[0:(C_SPLB0_MID_WIDTH-1)]"/>
<PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_PAValid" DIR="I" MPD_INDEX="129" NAME="PLBPPCS0PAVALID" SIGNAME="ppc440_0_SPLB0_PLB_PAValid"/>
<PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_SAValid" DIR="I" MPD_INDEX="130" NAME="PLBPPCS0SAVALID" SIGNAME="ppc440_0_SPLB0_PLB_SAValid"/>
<PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_rdPendReq" DIR="I" MPD_INDEX="131" NAME="PLBPPCS0RDPENDREQ" SIGNAME="ppc440_0_SPLB0_PLB_rdPendReq"/>
<PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_wrPendReq" DIR="I" MPD_INDEX="132" NAME="PLBPPCS0WRPENDREQ" SIGNAME="ppc440_0_SPLB0_PLB_wrPendReq"/>
<PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_rdPendPri" DIR="I" MPD_INDEX="133" NAME="PLBPPCS0RDPENDPRI" SIGNAME="ppc440_0_SPLB0_PLB_rdPendPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_wrPendPri" DIR="I" MPD_INDEX="134" NAME="PLBPPCS0WRPENDPRI" SIGNAME="ppc440_0_SPLB0_PLB_wrPendPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_reqPri" DIR="I" MPD_INDEX="135" NAME="PLBPPCS0REQPRI" SIGNAME="ppc440_0_SPLB0_PLB_reqPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_rdPrim" DIR="I" MPD_INDEX="136" NAME="PLBPPCS0RDPRIM" SIGNAME="ppc440_0_SPLB0_PLB_rdPrim"/>
<PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_wrPrim" DIR="I" MPD_INDEX="137" NAME="PLBPPCS0WRPRIM" SIGNAME="ppc440_0_SPLB0_PLB_wrPrim"/>
<PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_busLock" DIR="I" MPD_INDEX="138" NAME="PLBPPCS0BUSLOCK" SIGNAME="ppc440_0_SPLB0_PLB_busLock"/>
<PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_abort" DIR="I" MPD_INDEX="139" NAME="PLBPPCS0ABORT" SIGNAME="ppc440_0_SPLB0_PLB_abort"/>
<PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_RNW" DIR="I" MPD_INDEX="140" NAME="PLBPPCS0RNW" SIGNAME="ppc440_0_SPLB0_PLB_RNW"/>
<PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_BE" DIR="I" MPD_INDEX="141" NAME="PLBPPCS0BE" SIGNAME="ppc440_0_SPLB0_PLB_BE" VECFORMULA="[0:15]"/>
<PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_size" DIR="I" MPD_INDEX="142" NAME="PLBPPCS0SIZE" SIGNAME="ppc440_0_SPLB0_PLB_size" VECFORMULA="[0:3]"/>
<PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_type" DIR="I" MPD_INDEX="143" NAME="PLBPPCS0TYPE" SIGNAME="ppc440_0_SPLB0_PLB_type" VECFORMULA="[0:2]"/>
<PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_TAttribute" DIR="I" MPD_INDEX="144" NAME="PLBPPCS0TATTRIBUTE" SIGNAME="ppc440_0_SPLB0_PLB_TAttribute" VECFORMULA="[0:15]"/>
<PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_lockErr" DIR="I" MPD_INDEX="145" NAME="PLBPPCS0LOCKERR" SIGNAME="ppc440_0_SPLB0_PLB_lockErr"/>
<PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_MSize" DIR="I" MPD_INDEX="146" NAME="PLBPPCS0MSIZE" SIGNAME="ppc440_0_SPLB0_PLB_MSize" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_UABus" DIR="I" MPD_INDEX="147" NAME="PLBPPCS0UABUS" SIGNAME="ppc440_0_SPLB0_PLB_UABus" VECFORMULA="[0:31]"/>
<PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_ABus" DIR="I" MPD_INDEX="148" NAME="PLBPPCS0ABUS" SIGNAME="ppc440_0_SPLB0_PLB_ABus" VECFORMULA="[0:31]"/>
<PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_PLB_wrDBus" DIR="I" MPD_INDEX="149" NAME="PLBPPCS0WRDBUS" SIGNAME="ppc440_0_SPLB0_PLB_wrDBus" VECFORMULA="[0:127]"/>
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<PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_Sl_wrDAck" DIR="O" MPD_INDEX="155" NAME="PPCS0PLBWRDACK" SIGNAME="ppc440_0_SPLB0_Sl_wrDAck"/>
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<PORT BUS="SPLB0" DEF_SIGNAME="ppc440_0_SPLB0_Sl_MIRQ" DIR="O" MPD_INDEX="166" NAME="PPCS0PLBMIRQ" SIGNAME="ppc440_0_SPLB0_Sl_MIRQ" VECFORMULA="[0:(C_SPLB0_NUM_MASTERS-1)]"/>
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<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="168" NAME="CPMPPCS1PLBCLK" SIGIS="CLK" SIGNAME="__NOC__"/>
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<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="172" NAME="PLBPPCS1RDPENDREQ" SIGNAME="__NOC__"/>
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<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="180" NAME="PLBPPCS1ABORT" SIGNAME="__NOC__"/>
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<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="186" NAME="PLBPPCS1LOCKERR" SIGNAME="__NOC__"/>
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<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="189" NAME="PLBPPCS1ABUS" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
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<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="191" NAME="PLBPPCS1WRBURST" SIGNAME="__NOC__"/>
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<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="228" NAME="DMA0TXIRQ" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="229" NAME="DMA0RXIRQ" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
<PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="230" NAME="CPMDMA1LLCLK" SIGIS="CLK" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="231" NAME="LLDMA1TXDSTRDYN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="232" NAME="LLDMA1RXD" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
<PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="233" NAME="LLDMA1RXREM" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
<PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="234" NAME="LLDMA1RXSOFN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="235" NAME="LLDMA1RXEOFN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="236" NAME="LLDMA1RXSOPN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="237" NAME="LLDMA1RXEOPN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="238" NAME="LLDMA1RXSRCRDYN" SIGNAME="__NOC__"/>
<PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="239" NAME="LLDMA1RSTENGINEREQ" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="240" NAME="DMA1LLTXD" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
<PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="241" NAME="DMA1LLTXREM" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
<PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="242" NAME="DMA1LLTXSOFN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="243" NAME="DMA1LLTXEOFN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="244" NAME="DMA1LLTXSOPN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="245" NAME="DMA1LLTXEOPN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="246" NAME="DMA1LLTXSRCRDYN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="247" NAME="DMA1LLRXDSTRDYN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="O" IS_VALID="FALSE" MPD_INDEX="248" NAME="DMA1LLRSTENGINEACK" SIGNAME="__NOC__"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="249" NAME="DMA1TXIRQ" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="250" NAME="DMA1RXIRQ" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
<PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="251" NAME="CPMDMA2LLCLK" SIGIS="CLK" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="252" NAME="LLDMA2TXDSTRDYN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="253" NAME="LLDMA2RXD" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
<PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="254" NAME="LLDMA2RXREM" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
<PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="255" NAME="LLDMA2RXSOFN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="256" NAME="LLDMA2RXEOFN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="257" NAME="LLDMA2RXSOPN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="258" NAME="LLDMA2RXEOPN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="259" NAME="LLDMA2RXSRCRDYN" SIGNAME="__NOC__"/>
<PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="260" NAME="LLDMA2RSTENGINEREQ" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="261" NAME="DMA2LLTXD" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
<PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="262" NAME="DMA2LLTXREM" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
<PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="263" NAME="DMA2LLTXSOFN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="264" NAME="DMA2LLTXEOFN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="265" NAME="DMA2LLTXSOPN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="266" NAME="DMA2LLTXEOPN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="267" NAME="DMA2LLTXSRCRDYN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="268" NAME="DMA2LLRXDSTRDYN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="O" IS_VALID="FALSE" MPD_INDEX="269" NAME="DMA2LLRSTENGINEACK" SIGNAME="__NOC__"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="270" NAME="DMA2TXIRQ" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="271" NAME="DMA2RXIRQ" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
<PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="272" NAME="CPMDMA3LLCLK" SIGIS="CLK" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="273" NAME="LLDMA3TXDSTRDYN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="274" NAME="LLDMA3RXD" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
<PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="275" NAME="LLDMA3RXREM" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
<PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="276" NAME="LLDMA3RXSOFN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="277" NAME="LLDMA3RXEOFN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="278" NAME="LLDMA3RXSOPN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="279" NAME="LLDMA3RXEOPN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="280" NAME="LLDMA3RXSRCRDYN" SIGNAME="__NOC__"/>
<PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="281" NAME="LLDMA3RSTENGINEREQ" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="282" NAME="DMA3LLTXD" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
<PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="283" NAME="DMA3LLTXREM" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
<PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="284" NAME="DMA3LLTXSOFN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="285" NAME="DMA3LLTXEOFN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="286" NAME="DMA3LLTXSOPN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="287" NAME="DMA3LLTXEOPN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="288" NAME="DMA3LLTXSRCRDYN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="289" NAME="DMA3LLRXDSTRDYN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="O" IS_VALID="FALSE" MPD_INDEX="290" NAME="DMA3LLRSTENGINEACK" SIGNAME="__NOC__"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="291" NAME="DMA3TXIRQ" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="292" NAME="DMA3RXIRQ" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
<PORT BUS="RESETPPC" DEF_SIGNAME="ppc_reset_bus_RstcPPCresetcore" DIR="I" MPD_INDEX="293" NAME="RSTC440RESETCORE" SIGIS="RST" SIGNAME="ppc_reset_bus_RstcPPCresetcore"/>
<PORT BUS="RESETPPC" DEF_SIGNAME="ppc_reset_bus_RstsPPCresetchip" DIR="I" MPD_INDEX="294" NAME="RSTC440RESETCHIP" SIGIS="RST" SIGNAME="ppc_reset_bus_RstsPPCresetchip"/>
<PORT BUS="RESETPPC" DEF_SIGNAME="ppc_reset_bus_RstcPPCresetsys" DIR="I" MPD_INDEX="295" NAME="RSTC440RESETSYSTEM" SIGIS="RST" SIGNAME="ppc_reset_bus_RstcPPCresetsys"/>
<PORT BUS="RESETPPC" DEF_SIGNAME="ppc_reset_bus_Core_Reset_Req" DIR="O" MPD_INDEX="296" NAME="C440RSTCORERESETREQ" SIGIS="RST" SIGNAME="ppc_reset_bus_Core_Reset_Req"/>
<PORT BUS="RESETPPC" DEF_SIGNAME="ppc_reset_bus_Chip_Reset_Req" DIR="O" MPD_INDEX="297" NAME="C440RSTCHIPRESETREQ" SIGIS="RST" SIGNAME="ppc_reset_bus_Chip_Reset_Req"/>
<PORT BUS="RESETPPC" DEF_SIGNAME="ppc_reset_bus_System_Reset_Req" DIR="O" MPD_INDEX="298" NAME="C440RSTSYSTEMRESETREQ" SIGIS="RST" SIGNAME="ppc_reset_bus_System_Reset_Req"/>
<PORT DIR="I" MPD_INDEX="299" NAME="TRCC440TRACEDISABLE" SIGNAME="__NOC__"/>
<PORT DIR="I" MPD_INDEX="300" NAME="TRCC440TRIGGEREVENTIN" SIGNAME="__NOC__">
<DESCRIPTION>Trace Trigger Event In</DESCRIPTION>
</PORT>
<PORT DIR="O" MPD_INDEX="301" NAME="C440TRCBRANCHSTATUS" SIGNAME="__NOC__" VECFORMULA="[0:2]">
<DESCRIPTION>Trace Branch Status</DESCRIPTION>
</PORT>
<PORT DIR="O" MPD_INDEX="302" NAME="C440TRCCYCLE" SIGNAME="__NOC__">
<DESCRIPTION>Trace Clock</DESCRIPTION>
</PORT>
<PORT DIR="O" MPD_INDEX="303" NAME="C440TRCEXECUTIONSTATUS" SIGNAME="__NOC__" VECFORMULA="[0:4]">
<DESCRIPTION>Trace Execution Status</DESCRIPTION>
</PORT>
<PORT DIR="O" MPD_INDEX="304" NAME="C440TRCTRACESTATUS" SIGNAME="__NOC__" VECFORMULA="[0:6]">
<DESCRIPTION>Trace Status</DESCRIPTION>
</PORT>
<PORT DIR="O" MPD_INDEX="305" NAME="C440TRCTRIGGEREVENTOUT" SIGNAME="__NOC__">
<DESCRIPTION>Trace Trigger Event Out</DESCRIPTION>
</PORT>
<PORT DIR="O" MPD_INDEX="306" NAME="C440TRCTRIGGEREVENTTYPE" SIGNAME="__NOC__" VECFORMULA="[0:13]"/>
<BUSINTERFACE BUSNAME="plb_v46_0" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_DATA="TRUE" IS_INMHS="TRUE" IS_INSTRUCTION="TRUE" MPD_INDEX="0" NAME="MPLB" TYPE="MASTER"/>
<BUSINTERFACE BUSNAME="ppc440_0_SPLB0" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_INMHS="TRUE" MPD_INDEX="1" NAME="SPLB0" TYPE="SLAVE"/>
<BUSINTERFACE BUSNAME="ppc440_0_PPC440MC" BUSSTD="XIL" BUSSTD_PSF="XIL_PPC440MC" IS_DATA="TRUE" IS_INMHS="TRUE" IS_INSTRUCTION="TRUE" MPD_INDEX="3" NAME="PPC440MC" TYPE="INITIATOR"/>
<BUSINTERFACE BUSNAME="ppc440_0_jtagppc_bus" BUSSTD="XIL" BUSSTD_PSF="XIL_JTAGPPC" IS_INMHS="TRUE" MPD_INDEX="12" NAME="JTAGPPC" TYPE="TARGET"/>
<BUSINTERFACE BUSNAME="ppc_reset_bus" BUSSTD="XIL" BUSSTD_PSF="XIL_RESETPPC" IS_INMHS="TRUE" MPD_INDEX="13" NAME="RESETPPC" TYPE="TARGET"/>
<BUSINTERFACE BUSNAME="__NOC__" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" MPD_INDEX="2" NAME="SPLB1" TYPE="SLAVE"/>
<BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_LL_DMA" IS_VALID="FALSE" MPD_INDEX="4" NAME="LLDMA0" TYPE="TARGET"/>
<BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_LL_DMA" IS_VALID="FALSE" MPD_INDEX="5" NAME="LLDMA1" TYPE="TARGET"/>
<BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_LL_DMA" IS_VALID="FALSE" MPD_INDEX="6" NAME="LLDMA2" TYPE="TARGET"/>
<BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_LL_DMA" IS_VALID="FALSE" MPD_INDEX="7" NAME="LLDMA3" TYPE="TARGET"/>
<BUSINTERFACE BUSNAME="__NOC__" BUSSTD="DCR" BUSSTD_PSF="DCR" MPD_INDEX="8" NAME="MDCR" TYPE="MASTER"/>
<BUSINTERFACE BUSNAME="__NOC__" BUSSTD="DCR" BUSSTD_PSF="DCR" MPD_INDEX="9" NAME="SDCR" TYPE="SLAVE"/>
<BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FCB" BUSSTD_PSF="FCB2" MPD_INDEX="10" NAME="MFCB" TYPE="MASTER"/>
<BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_FCM2" MPD_INDEX="11" NAME="MFCM" TYPE="INITIATOR"/>
<PERIPHERALS>
<MODULE INSTANCE="xps_bram_if_cntlr_1"/>
<MODULE INSTANCE="RS232_Uart_1"/>
<MODULE INSTANCE="LEDs_8Bit"/>
<MODULE INSTANCE="LEDs_Positions"/>
<MODULE INSTANCE="Push_Buttons_5Bit"/>
<MODULE INSTANCE="DIP_Switches_8Bit"/>
<MODULE INSTANCE="IIC_EEPROM"/>
<MODULE INSTANCE="SRAM"/>
<MODULE INSTANCE="PCIe_Bridge"/>
<MODULE INSTANCE="Ethernet_MAC"/>
<MODULE INSTANCE="SysACE_CompactFlash"/>
<MODULE INSTANCE="xps_intc_0"/>
<MODULE INSTANCE="DDR2_SDRAM"/>
</PERIPHERALS>
<INTERRUPTINFO INTC_INDEX="0" INTERRUPT_CNTLR="xps_intc_0" TYPE="TARGET"/>
</MODULE>
<MODULE BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" HWVERSION="1.04.a" INSTANCE="plb_v46_0" IPTYPE="BUS" MHS_INDEX="1" MODCLASS="BUS" MODTYPE="plb_v46">
<DESCRIPTION TYPE="SHORT">Processor Local Bus (PLB) 4.6</DESCRIPTION>
<DESCRIPTION TYPE="LONG">'Xilinx 64-bit Processor Local Bus (PLB) consists of a bus control unit, a watchdog timer, and separate address, write, and read data path units with a a three-cycle only arbitration feature'</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/plb_v46_v1_04_a/doc/plb_v46.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_PLBV46_NUM_MASTERS" TYPE="integer" VALUE="1">
<DESCRIPTION>Number of PLB Masters</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_PLBV46_NUM_SLAVES" TYPE="integer" VALUE="12">
<DESCRIPTION>Number of PLB Slaves</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="2" NAME="C_PLBV46_MID_WIDTH" TYPE="integer" VALUE="1">
<DESCRIPTION>PLB Master ID Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="3" NAME="C_PLBV46_AWIDTH" TYPE="integer" VALUE="32">
<DESCRIPTION>PLB Address Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="4" NAME="C_PLBV46_DWIDTH" TYPE="integer" VALUE="128">
<DESCRIPTION>PLB Data Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="5" NAME="C_DCR_INTFCE" TYPE="integer" VALUE="0">
<DESCRIPTION>Include DCR Interface and Error Registers</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" MPD_INDEX="6" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0b1111111111">
<DESCRIPTION>Base Address</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" MPD_INDEX="7" NAME="C_HIGHADDR" TYPE="std_logic_vector" VALUE="0b0000000000">
<DESCRIPTION>High Address</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="8" NAME="C_DCR_AWIDTH" TYPE="integer" VALUE="10">
<DESCRIPTION>DCR Address Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="9" NAME="C_DCR_DWIDTH" TYPE="integer" VALUE="32">
<DESCRIPTION>DCR Data Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="10" NAME="C_EXT_RESET_HIGH" TYPE="integer" VALUE="1">
<DESCRIPTION>External Reset Active High </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="11" NAME="C_IRQ_ACTIVE" TYPE="std_logic" VALUE="1">
<DESCRIPTION>IRQ Active State </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="12" NAME="C_NUM_CLK_PLB2OPB_REARB" TYPE="integer" VALUE="5">
<DESCRIPTION>&lt;qt&gt;Number of PLB Clock Periods a PLB Master that Received a Rearbitrate from an OPB2PLB Bridge on a Read Operation is Denied Grant on the PLB Bus&lt;/qt&gt;</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="13" NAME="C_ADDR_PIPELINING_TYPE" TYPE="integer" VALUE="1">
<DESCRIPTION>Enable Address Pipelining Type</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="14" NAME="C_FAMILY" TYPE="string" VALUE="virtex5">
<DESCRIPTION>Device Family</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="15" NAME="C_P2P" TYPE="integer" VALUE="0">
<DESCRIPTION>Optimize PLB for Point-to-point Topology</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="16" NAME="C_ARB_TYPE" TYPE="integer" VALUE="0">
<DESCRIPTION>Selects the Arbitration Scheme</DESCRIPTION>
</PARAMETER>
<MEMORYMAP>
<MEMRANGE BASEDECIMAL="1023" BASENAME="C_BASEADDR" BASEVALUE="0b1111111111" HIGHDECIMAL="0" HIGHNAME="C_HIGHADDR" HIGHVALUE="0b0000000000" IS_VALID="FALSE" MEMTYPE="REGISTER" MINSIZE="0x08" SIZE="0" SIZEABRV="U">
<SLVINTERFACES>
<BUSINTERFACE NAME="SDCR"/>
</SLVINTERFACES>
</MEMRANGE>
</MEMORYMAP>
<PORT CLKFREQUENCY="125000000" DIR="I" IS_INMHS="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="PLB_Clk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
<PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="1" MPD_INDEX="1" NAME="SYS_Rst" SIGIS="RST" SIGNAME="sys_bus_reset"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_Rst" DIR="O" MPD_INDEX="2" NAME="PLB_Rst" SIGIS="RST" SIGNAME="plb_v46_0_PLB_Rst"/>
<PORT DEF_SIGNAME="plb_v46_0_SPLB_Rst" DIR="O" MPD_INDEX="3" NAME="SPLB_Rst" SIGIS="RST" SIGNAME="plb_v46_0_SPLB_Rst" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_MPLB_Rst" DIR="O" MPD_INDEX="4" NAME="MPLB_Rst" SIGIS="RST" SIGNAME="plb_v46_0_MPLB_Rst" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="5" NAME="PLB_dcrAck" SIGNAME="__NOC__"/>
<PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="6" NAME="PLB_dcrDBus" SIGNAME="__NOC__" VECFORMULA="[0:C_DCR_DWIDTH-1]"/>
<PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="7" NAME="DCR_ABus" SIGNAME="__NOC__" VECFORMULA="[0:C_DCR_AWIDTH-1]"/>
<PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="8" NAME="DCR_DBus" SIGNAME="__NOC__" VECFORMULA="[0:C_DCR_DWIDTH-1]"/>
<PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="9" NAME="DCR_Read" SIGNAME="__NOC__"/>
<PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="10" NAME="DCR_Write" SIGNAME="__NOC__"/>
<PORT DEF_SIGNAME="plb_v46_0_M_ABus" DIR="I" MPD_INDEX="11" NAME="M_ABus" SIGNAME="plb_v46_0_M_ABus" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*32)-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_M_UABus" DIR="I" MPD_INDEX="12" NAME="M_UABus" SIGNAME="plb_v46_0_M_UABus" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*32)-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_M_BE" DIR="I" MPD_INDEX="13" NAME="M_BE" SIGNAME="plb_v46_0_M_BE" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*(C_PLBV46_DWIDTH/8))-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_M_RNW" DIR="I" MPD_INDEX="14" NAME="M_RNW" SIGNAME="plb_v46_0_M_RNW" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_M_abort" DIR="I" MPD_INDEX="15" NAME="M_abort" SIGNAME="plb_v46_0_M_abort" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_M_busLock" DIR="I" MPD_INDEX="16" NAME="M_busLock" SIGNAME="plb_v46_0_M_busLock" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_M_TAttribute" DIR="I" MPD_INDEX="17" NAME="M_TAttribute" SIGNAME="plb_v46_0_M_TAttribute" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*16)-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_M_lockErr" DIR="I" MPD_INDEX="18" NAME="M_lockErr" SIGNAME="plb_v46_0_M_lockErr" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_M_MSize" DIR="I" MPD_INDEX="19" NAME="M_MSize" SIGNAME="plb_v46_0_M_MSize" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*2)-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_M_priority" DIR="I" MPD_INDEX="20" NAME="M_priority" SIGNAME="plb_v46_0_M_priority" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*2)-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_M_rdBurst" DIR="I" MPD_INDEX="21" NAME="M_rdBurst" SIGNAME="plb_v46_0_M_rdBurst" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_M_request" DIR="I" MPD_INDEX="22" NAME="M_request" SIGNAME="plb_v46_0_M_request" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_M_size" DIR="I" MPD_INDEX="23" NAME="M_size" SIGNAME="plb_v46_0_M_size" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*4)-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_M_type" DIR="I" MPD_INDEX="24" NAME="M_type" SIGNAME="plb_v46_0_M_type" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*3)-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_M_wrBurst" DIR="I" MPD_INDEX="25" NAME="M_wrBurst" SIGNAME="plb_v46_0_M_wrBurst" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_M_wrDBus" DIR="I" MPD_INDEX="26" NAME="M_wrDBus" SIGNAME="plb_v46_0_M_wrDBus" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*C_PLBV46_DWIDTH)-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_Sl_addrAck" DIR="I" MPD_INDEX="27" NAME="Sl_addrAck" SIGNAME="plb_v46_0_Sl_addrAck" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_Sl_MRdErr" DIR="I" MPD_INDEX="28" NAME="Sl_MRdErr" SIGNAME="plb_v46_0_Sl_MRdErr" VECFORMULA="[0:(C_PLBV46_NUM_SLAVES*C_PLBV46_NUM_MASTERS)-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_Sl_MWrErr" DIR="I" MPD_INDEX="29" NAME="Sl_MWrErr" SIGNAME="plb_v46_0_Sl_MWrErr" VECFORMULA="[0:(C_PLBV46_NUM_SLAVES*C_PLBV46_NUM_MASTERS)-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_Sl_MBusy" DIR="I" MPD_INDEX="30" NAME="Sl_MBusy" SIGNAME="plb_v46_0_Sl_MBusy" VECFORMULA="[0:C_PLBV46_NUM_SLAVES*C_PLBV46_NUM_MASTERS - 1 ]"/>
<PORT DEF_SIGNAME="plb_v46_0_Sl_rdBTerm" DIR="I" MPD_INDEX="31" NAME="Sl_rdBTerm" SIGNAME="plb_v46_0_Sl_rdBTerm" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_Sl_rdComp" DIR="I" MPD_INDEX="32" NAME="Sl_rdComp" SIGNAME="plb_v46_0_Sl_rdComp" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_Sl_rdDAck" DIR="I" MPD_INDEX="33" NAME="Sl_rdDAck" SIGNAME="plb_v46_0_Sl_rdDAck" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_Sl_rdDBus" DIR="I" MPD_INDEX="34" NAME="Sl_rdDBus" SIGNAME="plb_v46_0_Sl_rdDBus" VECFORMULA="[0:C_PLBV46_NUM_SLAVES*C_PLBV46_DWIDTH-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_Sl_rdWdAddr" DIR="I" MPD_INDEX="35" NAME="Sl_rdWdAddr" SIGNAME="plb_v46_0_Sl_rdWdAddr" VECFORMULA="[0:C_PLBV46_NUM_SLAVES*4-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_Sl_rearbitrate" DIR="I" MPD_INDEX="36" NAME="Sl_rearbitrate" SIGNAME="plb_v46_0_Sl_rearbitrate" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_Sl_SSize" DIR="I" MPD_INDEX="37" NAME="Sl_SSize" SIGNAME="plb_v46_0_Sl_SSize" VECFORMULA="[0:C_PLBV46_NUM_SLAVES*2-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_Sl_wait" DIR="I" MPD_INDEX="38" NAME="Sl_wait" SIGNAME="plb_v46_0_Sl_wait" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_Sl_wrBTerm" DIR="I" MPD_INDEX="39" NAME="Sl_wrBTerm" SIGNAME="plb_v46_0_Sl_wrBTerm" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_Sl_wrComp" DIR="I" MPD_INDEX="40" NAME="Sl_wrComp" SIGNAME="plb_v46_0_Sl_wrComp" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_Sl_wrDAck" DIR="I" MPD_INDEX="41" NAME="Sl_wrDAck" SIGNAME="plb_v46_0_Sl_wrDAck" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_Sl_MIRQ" DIR="I" MPD_INDEX="42" NAME="Sl_MIRQ" SIGNAME="plb_v46_0_Sl_MIRQ" VECFORMULA="[0:C_PLBV46_NUM_SLAVES*C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_MIRQ" DIR="O" MPD_INDEX="43" NAME="PLB_MIRQ" SIGNAME="plb_v46_0_PLB_MIRQ" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_ABus" DIR="O" MPD_INDEX="44" NAME="PLB_ABus" SIGNAME="plb_v46_0_PLB_ABus" VECFORMULA="[0:31]"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_UABus" DIR="O" MPD_INDEX="45" NAME="PLB_UABus" SIGNAME="plb_v46_0_PLB_UABus" VECFORMULA="[0:31]"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_BE" DIR="O" MPD_INDEX="46" NAME="PLB_BE" SIGNAME="plb_v46_0_PLB_BE" VECFORMULA="[0:(C_PLBV46_DWIDTH/8)-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_MAddrAck" DIR="O" MPD_INDEX="47" NAME="PLB_MAddrAck" SIGNAME="plb_v46_0_PLB_MAddrAck" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_MTimeout" DIR="O" MPD_INDEX="48" NAME="PLB_MTimeout" SIGNAME="plb_v46_0_PLB_MTimeout" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_MBusy" DIR="O" MPD_INDEX="49" NAME="PLB_MBusy" SIGNAME="plb_v46_0_PLB_MBusy" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_MRdErr" DIR="O" MPD_INDEX="50" NAME="PLB_MRdErr" SIGNAME="plb_v46_0_PLB_MRdErr" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_MWrErr" DIR="O" MPD_INDEX="51" NAME="PLB_MWrErr" SIGNAME="plb_v46_0_PLB_MWrErr" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_MRdBTerm" DIR="O" MPD_INDEX="52" NAME="PLB_MRdBTerm" SIGNAME="plb_v46_0_PLB_MRdBTerm" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_MRdDAck" DIR="O" MPD_INDEX="53" NAME="PLB_MRdDAck" SIGNAME="plb_v46_0_PLB_MRdDAck" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_MRdDBus" DIR="O" MPD_INDEX="54" NAME="PLB_MRdDBus" SIGNAME="plb_v46_0_PLB_MRdDBus" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*C_PLBV46_DWIDTH)-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_MRdWdAddr" DIR="O" MPD_INDEX="55" NAME="PLB_MRdWdAddr" SIGNAME="plb_v46_0_PLB_MRdWdAddr" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*4)-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_MRearbitrate" DIR="O" MPD_INDEX="56" NAME="PLB_MRearbitrate" SIGNAME="plb_v46_0_PLB_MRearbitrate" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_MWrBTerm" DIR="O" MPD_INDEX="57" NAME="PLB_MWrBTerm" SIGNAME="plb_v46_0_PLB_MWrBTerm" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_MWrDAck" DIR="O" MPD_INDEX="58" NAME="PLB_MWrDAck" SIGNAME="plb_v46_0_PLB_MWrDAck" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_MSSize" DIR="O" MPD_INDEX="59" NAME="PLB_MSSize" SIGNAME="plb_v46_0_PLB_MSSize" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*2)-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_PAValid" DIR="O" MPD_INDEX="60" NAME="PLB_PAValid" SIGNAME="plb_v46_0_PLB_PAValid"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_RNW" DIR="O" MPD_INDEX="61" NAME="PLB_RNW" SIGNAME="plb_v46_0_PLB_RNW"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_SAValid" DIR="O" MPD_INDEX="62" NAME="PLB_SAValid" SIGNAME="plb_v46_0_PLB_SAValid"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_abort" DIR="O" MPD_INDEX="63" NAME="PLB_abort" SIGNAME="plb_v46_0_PLB_abort"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_busLock" DIR="O" MPD_INDEX="64" NAME="PLB_busLock" SIGNAME="plb_v46_0_PLB_busLock"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_TAttribute" DIR="O" MPD_INDEX="65" NAME="PLB_TAttribute" SIGNAME="plb_v46_0_PLB_TAttribute" VECFORMULA="[0:15]"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_lockErr" DIR="O" MPD_INDEX="66" NAME="PLB_lockErr" SIGNAME="plb_v46_0_PLB_lockErr"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_masterID" DIR="O" MPD_INDEX="67" NAME="PLB_masterID" SIGNAME="plb_v46_0_PLB_masterID" VECFORMULA="[0:C_PLBV46_MID_WIDTH-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_MSize" DIR="O" MPD_INDEX="68" NAME="PLB_MSize" SIGNAME="plb_v46_0_PLB_MSize" VECFORMULA="[0:1]"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_rdPendPri" DIR="O" MPD_INDEX="69" NAME="PLB_rdPendPri" SIGNAME="plb_v46_0_PLB_rdPendPri" VECFORMULA="[0:1]"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_wrPendPri" DIR="O" MPD_INDEX="70" NAME="PLB_wrPendPri" SIGNAME="plb_v46_0_PLB_wrPendPri" VECFORMULA="[0:1]"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_rdPendReq" DIR="O" MPD_INDEX="71" NAME="PLB_rdPendReq" SIGNAME="plb_v46_0_PLB_rdPendReq"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_wrPendReq" DIR="O" MPD_INDEX="72" NAME="PLB_wrPendReq" SIGNAME="plb_v46_0_PLB_wrPendReq"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_rdBurst" DIR="O" MPD_INDEX="73" NAME="PLB_rdBurst" SIGNAME="plb_v46_0_PLB_rdBurst"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_rdPrim" DIR="O" MPD_INDEX="74" NAME="PLB_rdPrim" SIGNAME="plb_v46_0_PLB_rdPrim" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_reqPri" DIR="O" MPD_INDEX="75" NAME="PLB_reqPri" SIGNAME="plb_v46_0_PLB_reqPri" VECFORMULA="[0:1]"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_size" DIR="O" MPD_INDEX="76" NAME="PLB_size" SIGNAME="plb_v46_0_PLB_size" VECFORMULA="[0:3]"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_type" DIR="O" MPD_INDEX="77" NAME="PLB_type" SIGNAME="plb_v46_0_PLB_type" VECFORMULA="[0:2]"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_wrBurst" DIR="O" MPD_INDEX="78" NAME="PLB_wrBurst" SIGNAME="plb_v46_0_PLB_wrBurst"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_wrDBus" DIR="O" MPD_INDEX="79" NAME="PLB_wrDBus" SIGNAME="plb_v46_0_PLB_wrDBus" VECFORMULA="[0:C_PLBV46_DWIDTH-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_wrPrim" DIR="O" MPD_INDEX="80" NAME="PLB_wrPrim" SIGNAME="plb_v46_0_PLB_wrPrim" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_SaddrAck" DIR="O" MPD_INDEX="81" NAME="PLB_SaddrAck" SIGNAME="plb_v46_0_PLB_SaddrAck"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_SMRdErr" DIR="O" MPD_INDEX="82" NAME="PLB_SMRdErr" SIGNAME="plb_v46_0_PLB_SMRdErr" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_SMWrErr" DIR="O" MPD_INDEX="83" NAME="PLB_SMWrErr" SIGNAME="plb_v46_0_PLB_SMWrErr" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_SMBusy" DIR="O" MPD_INDEX="84" NAME="PLB_SMBusy" SIGNAME="plb_v46_0_PLB_SMBusy" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_SrdBTerm" DIR="O" MPD_INDEX="85" NAME="PLB_SrdBTerm" SIGNAME="plb_v46_0_PLB_SrdBTerm"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_SrdComp" DIR="O" MPD_INDEX="86" NAME="PLB_SrdComp" SIGNAME="plb_v46_0_PLB_SrdComp"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_SrdDAck" DIR="O" MPD_INDEX="87" NAME="PLB_SrdDAck" SIGNAME="plb_v46_0_PLB_SrdDAck"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_SrdDBus" DIR="O" MPD_INDEX="88" NAME="PLB_SrdDBus" SIGNAME="plb_v46_0_PLB_SrdDBus" VECFORMULA="[0:C_PLBV46_DWIDTH-1]"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_SrdWdAddr" DIR="O" MPD_INDEX="89" NAME="PLB_SrdWdAddr" SIGNAME="plb_v46_0_PLB_SrdWdAddr" VECFORMULA="[0:3]"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_Srearbitrate" DIR="O" MPD_INDEX="90" NAME="PLB_Srearbitrate" SIGNAME="plb_v46_0_PLB_Srearbitrate"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_Sssize" DIR="O" MPD_INDEX="91" NAME="PLB_Sssize" SIGNAME="plb_v46_0_PLB_Sssize" VECFORMULA="[0:1]"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_Swait" DIR="O" MPD_INDEX="92" NAME="PLB_Swait" SIGNAME="plb_v46_0_PLB_Swait"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_SwrBTerm" DIR="O" MPD_INDEX="93" NAME="PLB_SwrBTerm" SIGNAME="plb_v46_0_PLB_SwrBTerm"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_SwrComp" DIR="O" MPD_INDEX="94" NAME="PLB_SwrComp" SIGNAME="plb_v46_0_PLB_SwrComp"/>
<PORT DEF_SIGNAME="plb_v46_0_PLB_SwrDAck" DIR="O" MPD_INDEX="95" NAME="PLB_SwrDAck" SIGNAME="plb_v46_0_PLB_SwrDAck"/>
<PORT DIR="O" MPD_INDEX="96" NAME="Bus_Error_Det" SENSITIVITY="EDGE_RISING" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
<BUSINTERFACE BUSNAME="__NOC__" BUSSTD="DCR" BUSSTD_PSF="DCR" IS_VALID="FALSE" MPD_INDEX="0" NAME="SDCR" TYPE="SLAVE"/>
</MODULE>
<MODULE HWVERSION="1.00.b" INSTANCE="xps_bram_if_cntlr_1" IPTYPE="PERIPHERAL" MHS_INDEX="2" MODCLASS="MEMORY_CNTLR" MODTYPE="xps_bram_if_cntlr">
<DESCRIPTION TYPE="SHORT">XPS BRAM Controller</DESCRIPTION>
<DESCRIPTION TYPE="LONG">Attaches BRAM to the PLBV46</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/xps_bram_if_cntlr_v1_00_b/doc/xps_bram_if_cntlr.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" CHANGEDBY="USER" MPD_INDEX="0" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0xffffe000">
<DESCRIPTION>Base Address</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" CHANGEDBY="USER" MPD_INDEX="1" NAME="C_HIGHADDR" TYPE="std_logic_vector" VALUE="0xffffffff">
<DESCRIPTION>High Address</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="2" NAME="C_SPLB_NATIVE_DWIDTH" TYPE="integer" VALUE="64">
<DESCRIPTION>Native Data Bus Width of PLB Slave</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="3" NAME="C_SPLB_AWIDTH" TYPE="integer" VALUE="32">
<DESCRIPTION>PLB Address Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="4" NAME="C_SPLB_DWIDTH" TYPE="integer" VALUE="128">
<DESCRIPTION>PLB Data Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="5" NAME="C_SPLB_NUM_MASTERS" TYPE="integer" VALUE="1">
<DESCRIPTION>Number of PLB Masters</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="6" NAME="C_SPLB_MID_WIDTH" TYPE="integer" VALUE="1">
<DESCRIPTION>Master ID Bus Width of PLB</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="7" NAME="C_SPLB_SUPPORT_BURSTS" TYPE="integer" VALUE="1">
<DESCRIPTION>PLB Slave is Capable of Bursts</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="8" NAME="C_SPLB_P2P" TYPE="integer" VALUE="0">
<DESCRIPTION>PLB Slave Uses P2P Topology</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="9" NAME="C_SPLB_SMALLEST_MASTER" TYPE="integer" VALUE="128">
<DESCRIPTION>Smallest Master Data Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="10" NAME="C_FAMILY" TYPE="string" VALUE="virtex5">
<DESCRIPTION>Device Family</DESCRIPTION>
</PARAMETER>
<MEMORYMAP>
<MEMRANGE BASEDECIMAL="4294959104" BASENAME="C_BASEADDR" BASEVALUE="0xffffe000" HIGHDECIMAL="4294967295" HIGHNAME="C_HIGHADDR" HIGHVALUE="0xffffffff" IS_CACHEABLE="TRUE" MEMTYPE="MEMORY" SIZE="8192" SIZEABRV="8K">
<SLVINTERFACES>
<BUSINTERFACE NAME="SPLB"/>
</SLVINTERFACES>
</MEMRANGE>
</MEMORYMAP>
<PORT BUS="SPLB" CLKFREQUENCY="125000000" DEF_SIGNAME="clk_125_0000MHzPLL0_ADJUST" DIR="I" MPD_INDEX="0" NAME="SPLB_Clk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_SPLB_Rst" DIR="I" MPD_INDEX="1" NAME="SPLB_Rst" SIGIS="RST" SIGNAME="plb_v46_0_SPLB_Rst"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_ABus" DIR="I" MPD_INDEX="2" NAME="PLB_ABus" SIGNAME="plb_v46_0_PLB_ABus" VECFORMULA="[0:31]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_UABus" DIR="I" MPD_INDEX="3" NAME="PLB_UABus" SIGNAME="plb_v46_0_PLB_UABus" VECFORMULA="[0:31]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_PAValid" DIR="I" MPD_INDEX="4" NAME="PLB_PAValid" SIGNAME="plb_v46_0_PLB_PAValid"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_SAValid" DIR="I" MPD_INDEX="5" NAME="PLB_SAValid" SIGNAME="plb_v46_0_PLB_SAValid"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPrim" DIR="I" MPD_INDEX="6" NAME="PLB_rdPrim" SIGNAME="plb_v46_0_PLB_rdPrim"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPrim" DIR="I" MPD_INDEX="7" NAME="PLB_wrPrim" SIGNAME="plb_v46_0_PLB_wrPrim"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_masterID" DIR="I" MPD_INDEX="8" NAME="PLB_masterID" SIGNAME="plb_v46_0_PLB_masterID" VECFORMULA="[0:C_SPLB_MID_WIDTH-1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_abort" DIR="I" MPD_INDEX="9" NAME="PLB_abort" SIGNAME="plb_v46_0_PLB_abort"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_busLock" DIR="I" MPD_INDEX="10" NAME="PLB_busLock" SIGNAME="plb_v46_0_PLB_busLock"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_RNW" DIR="I" MPD_INDEX="11" NAME="PLB_RNW" SIGNAME="plb_v46_0_PLB_RNW"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_BE" DIR="I" MPD_INDEX="12" NAME="PLB_BE" SIGNAME="plb_v46_0_PLB_BE" VECFORMULA="[0:(C_SPLB_DWIDTH/8)-1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_MSize" DIR="I" MPD_INDEX="13" NAME="PLB_MSize" SIGNAME="plb_v46_0_PLB_MSize" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_size" DIR="I" MPD_INDEX="14" NAME="PLB_size" SIGNAME="plb_v46_0_PLB_size" VECFORMULA="[0:3]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_type" DIR="I" MPD_INDEX="15" NAME="PLB_type" SIGNAME="plb_v46_0_PLB_type" VECFORMULA="[0:2]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_lockErr" DIR="I" MPD_INDEX="16" NAME="PLB_lockErr" SIGNAME="plb_v46_0_PLB_lockErr"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrDBus" DIR="I" MPD_INDEX="17" NAME="PLB_wrDBus" SIGNAME="plb_v46_0_PLB_wrDBus" VECFORMULA="[0:C_SPLB_DWIDTH-1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrBurst" DIR="I" MPD_INDEX="18" NAME="PLB_wrBurst" SIGNAME="plb_v46_0_PLB_wrBurst"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdBurst" DIR="I" MPD_INDEX="19" NAME="PLB_rdBurst" SIGNAME="plb_v46_0_PLB_rdBurst"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendReq" DIR="I" MPD_INDEX="20" NAME="PLB_wrPendReq" SIGNAME="plb_v46_0_PLB_wrPendReq"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendReq" DIR="I" MPD_INDEX="21" NAME="PLB_rdPendReq" SIGNAME="plb_v46_0_PLB_rdPendReq"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendPri" DIR="I" MPD_INDEX="22" NAME="PLB_wrPendPri" SIGNAME="plb_v46_0_PLB_wrPendPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendPri" DIR="I" MPD_INDEX="23" NAME="PLB_rdPendPri" SIGNAME="plb_v46_0_PLB_rdPendPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_reqPri" DIR="I" MPD_INDEX="24" NAME="PLB_reqPri" SIGNAME="plb_v46_0_PLB_reqPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_TAttribute" DIR="I" MPD_INDEX="25" NAME="PLB_TAttribute" SIGNAME="plb_v46_0_PLB_TAttribute" VECFORMULA="[0:15]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_addrAck" DIR="O" MPD_INDEX="26" NAME="Sl_addrAck" SIGNAME="plb_v46_0_Sl_addrAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_SSize" DIR="O" MPD_INDEX="27" NAME="Sl_SSize" SIGNAME="plb_v46_0_Sl_SSize" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wait" DIR="O" MPD_INDEX="28" NAME="Sl_wait" SIGNAME="plb_v46_0_Sl_wait"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rearbitrate" DIR="O" MPD_INDEX="29" NAME="Sl_rearbitrate" SIGNAME="plb_v46_0_Sl_rearbitrate"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrDAck" DIR="O" MPD_INDEX="30" NAME="Sl_wrDAck" SIGNAME="plb_v46_0_Sl_wrDAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrComp" DIR="O" MPD_INDEX="31" NAME="Sl_wrComp" SIGNAME="plb_v46_0_Sl_wrComp"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrBTerm" DIR="O" MPD_INDEX="32" NAME="Sl_wrBTerm" SIGNAME="plb_v46_0_Sl_wrBTerm"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDBus" DIR="O" MPD_INDEX="33" NAME="Sl_rdDBus" SIGNAME="plb_v46_0_Sl_rdDBus" VECFORMULA="[0:C_SPLB_DWIDTH-1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdWdAddr" DIR="O" MPD_INDEX="34" NAME="Sl_rdWdAddr" SIGNAME="plb_v46_0_Sl_rdWdAddr" VECFORMULA="[0:3]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDAck" DIR="O" MPD_INDEX="35" NAME="Sl_rdDAck" SIGNAME="plb_v46_0_Sl_rdDAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdComp" DIR="O" MPD_INDEX="36" NAME="Sl_rdComp" SIGNAME="plb_v46_0_Sl_rdComp"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdBTerm" DIR="O" MPD_INDEX="37" NAME="Sl_rdBTerm" SIGNAME="plb_v46_0_Sl_rdBTerm"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MBusy" DIR="O" MPD_INDEX="38" NAME="Sl_MBusy" SIGNAME="plb_v46_0_Sl_MBusy" VECFORMULA="[0:C_SPLB_NUM_MASTERS-1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MWrErr" DIR="O" MPD_INDEX="39" NAME="Sl_MWrErr" SIGNAME="plb_v46_0_Sl_MWrErr" VECFORMULA="[0:C_SPLB_NUM_MASTERS-1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MRdErr" DIR="O" MPD_INDEX="40" NAME="Sl_MRdErr" SIGNAME="plb_v46_0_Sl_MRdErr" VECFORMULA="[0:C_SPLB_NUM_MASTERS-1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MIRQ" DIR="O" MPD_INDEX="41" NAME="Sl_MIRQ" SIGNAME="plb_v46_0_Sl_MIRQ" VECFORMULA="[0:C_SPLB_NUM_MASTERS-1]"/>
<PORT BUS="PORTA" DEF_SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Rst" DIR="O" MPD_INDEX="42" NAME="BRAM_Rst" SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Rst"/>
<PORT BUS="PORTA" CLKFREQUENCY="125000000" DEF_SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Clk" DIR="O" MPD_INDEX="43" NAME="BRAM_Clk" SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Clk"/>
<PORT BUS="PORTA" DEF_SIGNAME="xps_bram_if_cntlr_1_port_BRAM_EN" DIR="O" MPD_INDEX="44" NAME="BRAM_EN" SIGNAME="xps_bram_if_cntlr_1_port_BRAM_EN"/>
<PORT BUS="PORTA" DEF_SIGNAME="xps_bram_if_cntlr_1_port_BRAM_WEN" DIR="O" MPD_INDEX="45" NAME="BRAM_WEN" SIGNAME="xps_bram_if_cntlr_1_port_BRAM_WEN" VECFORMULA="[0:(C_SPLB_NATIVE_DWIDTH/8)-1]"/>
<PORT BUS="PORTA" DEF_SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Addr" DIR="O" MPD_INDEX="46" NAME="BRAM_Addr" SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Addr" VECFORMULA="[0:C_SPLB_AWIDTH-1]"/>
<PORT BUS="PORTA" DEF_SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Din" DIR="I" MPD_INDEX="47" NAME="BRAM_Din" SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Din" VECFORMULA="[0:C_SPLB_NATIVE_DWIDTH-1]"/>
<PORT BUS="PORTA" DEF_SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Dout" DIR="O" MPD_INDEX="48" NAME="BRAM_Dout" SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Dout" VECFORMULA="[0:C_SPLB_NATIVE_DWIDTH-1]"/>
<BUSINTERFACE BUSNAME="plb_v46_0" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_INMHS="TRUE" MPD_INDEX="0" NAME="SPLB" TYPE="SLAVE"/>
<BUSINTERFACE BUSNAME="xps_bram_if_cntlr_1_port" BUSSTD="XIL" BUSSTD_PSF="XIL_BRAM" IS_INMHS="TRUE" MPD_INDEX="1" NAME="PORTA" TYPE="INITIATOR"/>
</MODULE>
<MODULE HWVERSION="1.00.a" INSTANCE="xps_bram_if_cntlr_1_bram" IPTYPE="PERIPHERAL" MHS_INDEX="3" MODCLASS="MEMORY" MODTYPE="bram_block">
<DESCRIPTION TYPE="SHORT">Block RAM (BRAM) Block</DESCRIPTION>
<DESCRIPTION TYPE="LONG">The BRAM Block is a configurable memory module that attaches to a variety of BRAM Interface Controllers.</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/bram_block_v1_00_a/doc/bram_block.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_MEMSIZE" TYPE="integer" VALUE="0x2000">
<DESCRIPTION>Size of BRAM(s) in Bytes</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_PORT_DWIDTH" TYPE="integer" VALUE="64">
<DESCRIPTION>Data Width of Port A and B</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="2" NAME="C_PORT_AWIDTH" TYPE="integer" VALUE="32">
<DESCRIPTION>Address Width of Port A and B</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="3" NAME="C_NUM_WE" TYPE="integer" VALUE="8">
<DESCRIPTION>Number of Byte Write Enables</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="4" NAME="C_FAMILY" TYPE="string" VALUE="virtex5">
<DESCRIPTION>Device Family</DESCRIPTION>
</PARAMETER>
<PORT BUS="PORTA" DEF_SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Rst" DIR="I" MPD_INDEX="0" NAME="BRAM_Rst_A" SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Rst"/>
<PORT BUS="PORTA" CLKFREQUENCY="125000000" DEF_SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Clk" DIR="I" MPD_INDEX="1" NAME="BRAM_Clk_A" SIGIS="CLK" SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Clk"/>
<PORT BUS="PORTA" DEF_SIGNAME="xps_bram_if_cntlr_1_port_BRAM_EN" DIR="I" MPD_INDEX="2" NAME="BRAM_EN_A" SIGNAME="xps_bram_if_cntlr_1_port_BRAM_EN"/>
<PORT BUS="PORTA" DEF_SIGNAME="xps_bram_if_cntlr_1_port_BRAM_WEN" DIR="I" MPD_INDEX="3" NAME="BRAM_WEN_A" SIGNAME="xps_bram_if_cntlr_1_port_BRAM_WEN" VECFORMULA="[0:C_NUM_WE-1]"/>
<PORT BUS="PORTA" DEF_SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Addr" DIR="I" MPD_INDEX="4" NAME="BRAM_Addr_A" SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Addr" VECFORMULA="[0:C_PORT_AWIDTH-1]"/>
<PORT BUS="PORTA" DEF_SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Din" DIR="O" MPD_INDEX="5" NAME="BRAM_Din_A" SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Din" VECFORMULA="[0:C_PORT_DWIDTH-1]"/>
<PORT BUS="PORTA" DEF_SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Dout" DIR="I" MPD_INDEX="6" NAME="BRAM_Dout_A" SIGNAME="xps_bram_if_cntlr_1_port_BRAM_Dout" VECFORMULA="[0:C_PORT_DWIDTH-1]"/>
<PORT BUS="PORTB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="7" NAME="BRAM_Rst_B" SIGNAME="__NOC__"/>
<PORT BUS="PORTB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="8" NAME="BRAM_Clk_B" SIGIS="CLK" SIGNAME="__NOC__"/>
<PORT BUS="PORTB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="9" NAME="BRAM_EN_B" SIGNAME="__NOC__"/>
<PORT BUS="PORTB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="10" NAME="BRAM_WEN_B" SIGNAME="__NOC__" VECFORMULA="[0:C_NUM_WE-1]"/>
<PORT BUS="PORTB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="11" NAME="BRAM_Addr_B" SIGNAME="__NOC__" VECFORMULA="[0:C_PORT_AWIDTH-1]"/>
<PORT BUS="PORTB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="12" NAME="BRAM_Din_B" SIGNAME="__NOC__" VECFORMULA="[0:C_PORT_DWIDTH-1]"/>
<PORT BUS="PORTB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="13" NAME="BRAM_Dout_B" SIGNAME="__NOC__" VECFORMULA="[0:C_PORT_DWIDTH-1]"/>
<BUSINTERFACE BUSNAME="xps_bram_if_cntlr_1_port" BUSSTD="XIL" BUSSTD_PSF="XIL_BRAM" IS_INMHS="TRUE" MPD_INDEX="0" NAME="PORTA" TYPE="TARGET"/>
<BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_BRAM" MPD_INDEX="1" NAME="PORTB" TYPE="TARGET"/>
</MODULE>
<MODULE HWVERSION="1.01.a" INSTANCE="RS232_Uart_1" IPTYPE="PERIPHERAL" MHS_INDEX="4" MODCLASS="PERIPHERAL" MODTYPE="xps_uartlite">
<DESCRIPTION TYPE="SHORT">XPS UART (Lite)</DESCRIPTION>
<DESCRIPTION TYPE="LONG">Generic UART (Universal Asynchronous Receiver/Transmitter) for PLBV46 bus.</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/xps_uartlite_v1_01_a/doc/xps_uartlite.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETER MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="virtex5">
<DESCRIPTION>Device Family</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_SPLB_CLK_FREQ_HZ" TYPE="INTEGER" VALUE="125000000">
<DESCRIPTION>Clock Frequency of PLB Slave</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="2" NAME="C_BASEADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x84000000">
<DESCRIPTION>Base Address</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="3" NAME="C_HIGHADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x8400ffff">
<DESCRIPTION>High Address</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="4" NAME="C_SPLB_AWIDTH" TYPE="INTEGER" VALUE="32">
<DESCRIPTION>PLB Address Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="5" NAME="C_SPLB_DWIDTH" TYPE="INTEGER" VALUE="128">
<DESCRIPTION>PLB Data Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="6" NAME="C_SPLB_P2P" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>PLB Slave Uses P2P Topology</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="7" NAME="C_SPLB_MID_WIDTH" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Master ID Bus Width of PLB</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="8" NAME="C_SPLB_NUM_MASTERS" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Number of PLB Masters</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="9" NAME="C_SPLB_SUPPORT_BURSTS" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>PLB Slave is Capable of Bursts</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="10" NAME="C_SPLB_NATIVE_DWIDTH" TYPE="INTEGER" VALUE="32">
<DESCRIPTION>Native Data Bus Width of PLB Slave</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="11" NAME="C_BAUDRATE" TYPE="INTEGER" VALUE="9600">
<DESCRIPTION>UART Lite Baud Rate </DESCRIPTION>
<DESCRIPTION>Baud Rate</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="12" NAME="C_DATA_BITS" TYPE="INTEGER" VALUE="8">
<DESCRIPTION>Number of Data Bits in a Serial Frame</DESCRIPTION>
<DESCRIPTION>Data Bits</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="13" NAME="C_USE_PARITY" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Use Parity </DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="14" NAME="C_ODD_PARITY" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Parity Type </DESCRIPTION>
</PARAMETER>
<MEMORYMAP>
<MEMRANGE BASEDECIMAL="2214592512" BASENAME="C_BASEADDR" BASEVALUE="0x84000000" HIGHDECIMAL="2214658047" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8400ffff" MEMTYPE="REGISTER" MINSIZE="0x10" SIZE="65536" SIZEABRV="64K">
<SLVINTERFACES>
<BUSINTERFACE NAME="SPLB"/>
</SLVINTERFACES>
</MEMRANGE>
</MEMORYMAP>
<PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="0" MPD_INDEX="42" NAME="RX" SIGNAME="fpga_0_RS232_Uart_1_RX_pin">
<DESCRIPTION>Serial Data In</DESCRIPTION>
</PORT>
<PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="1" MPD_INDEX="43" NAME="TX" SIGNAME="fpga_0_RS232_Uart_1_TX_pin">
<DESCRIPTION>Serial Data Out</DESCRIPTION>
</PORT>
<PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="2" MPD_INDEX="44" NAME="Interrupt" SENSITIVITY="EDGE_RISING" SIGIS="INTERRUPT" SIGNAME="RS232_Uart_1_Interrupt"/>
<PORT BUS="SPLB" CLKFREQUENCY="125000000" DEF_SIGNAME="clk_125_0000MHzPLL0_ADJUST" DIR="I" MPD_INDEX="0" NAME="SPLB_Clk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_SPLB_Rst" DIR="I" MPD_INDEX="1" NAME="SPLB_Rst" SIGIS="RST" SIGNAME="plb_v46_0_SPLB_Rst"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_ABus" DIR="I" MPD_INDEX="2" NAME="PLB_ABus" SIGNAME="plb_v46_0_PLB_ABus" VECFORMULA="[0:31]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_PAValid" DIR="I" MPD_INDEX="3" NAME="PLB_PAValid" SIGNAME="plb_v46_0_PLB_PAValid"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_masterID" DIR="I" MPD_INDEX="4" NAME="PLB_masterID" SIGNAME="plb_v46_0_PLB_masterID" VECFORMULA="[0:(C_SPLB_MID_WIDTH-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_RNW" DIR="I" MPD_INDEX="5" NAME="PLB_RNW" SIGNAME="plb_v46_0_PLB_RNW"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_BE" DIR="I" MPD_INDEX="6" NAME="PLB_BE" SIGNAME="plb_v46_0_PLB_BE" VECFORMULA="[0:((C_SPLB_DWIDTH/8)-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_size" DIR="I" MPD_INDEX="7" NAME="PLB_size" SIGNAME="plb_v46_0_PLB_size" VECFORMULA="[0:3]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_type" DIR="I" MPD_INDEX="8" NAME="PLB_type" SIGNAME="plb_v46_0_PLB_type" VECFORMULA="[0:2]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrDBus" DIR="I" MPD_INDEX="9" NAME="PLB_wrDBus" SIGNAME="plb_v46_0_PLB_wrDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_UABus" DIR="I" MPD_INDEX="10" NAME="PLB_UABus" SIGNAME="plb_v46_0_PLB_UABus" VECFORMULA="[0:31]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_SAValid" DIR="I" MPD_INDEX="11" NAME="PLB_SAValid" SIGNAME="plb_v46_0_PLB_SAValid"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPrim" DIR="I" MPD_INDEX="12" NAME="PLB_rdPrim" SIGNAME="plb_v46_0_PLB_rdPrim"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPrim" DIR="I" MPD_INDEX="13" NAME="PLB_wrPrim" SIGNAME="plb_v46_0_PLB_wrPrim"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_abort" DIR="I" MPD_INDEX="14" NAME="PLB_abort" SIGNAME="plb_v46_0_PLB_abort"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_busLock" DIR="I" MPD_INDEX="15" NAME="PLB_busLock" SIGNAME="plb_v46_0_PLB_busLock"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_MSize" DIR="I" MPD_INDEX="16" NAME="PLB_MSize" SIGNAME="plb_v46_0_PLB_MSize" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_lockErr" DIR="I" MPD_INDEX="17" NAME="PLB_lockErr" SIGNAME="plb_v46_0_PLB_lockErr"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrBurst" DIR="I" MPD_INDEX="18" NAME="PLB_wrBurst" SIGNAME="plb_v46_0_PLB_wrBurst"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdBurst" DIR="I" MPD_INDEX="19" NAME="PLB_rdBurst" SIGNAME="plb_v46_0_PLB_rdBurst"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendReq" DIR="I" MPD_INDEX="20" NAME="PLB_wrPendReq" SIGNAME="plb_v46_0_PLB_wrPendReq"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendReq" DIR="I" MPD_INDEX="21" NAME="PLB_rdPendReq" SIGNAME="plb_v46_0_PLB_rdPendReq"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendPri" DIR="I" MPD_INDEX="22" NAME="PLB_wrPendPri" SIGNAME="plb_v46_0_PLB_wrPendPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendPri" DIR="I" MPD_INDEX="23" NAME="PLB_rdPendPri" SIGNAME="plb_v46_0_PLB_rdPendPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_reqPri" DIR="I" MPD_INDEX="24" NAME="PLB_reqPri" SIGNAME="plb_v46_0_PLB_reqPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_TAttribute" DIR="I" MPD_INDEX="25" NAME="PLB_TAttribute" SIGNAME="plb_v46_0_PLB_TAttribute" VECFORMULA="[0:15]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_addrAck" DIR="O" MPD_INDEX="26" NAME="Sl_addrAck" SIGNAME="plb_v46_0_Sl_addrAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_SSize" DIR="O" MPD_INDEX="27" NAME="Sl_SSize" SIGNAME="plb_v46_0_Sl_SSize" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wait" DIR="O" MPD_INDEX="28" NAME="Sl_wait" SIGNAME="plb_v46_0_Sl_wait"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rearbitrate" DIR="O" MPD_INDEX="29" NAME="Sl_rearbitrate" SIGNAME="plb_v46_0_Sl_rearbitrate"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrDAck" DIR="O" MPD_INDEX="30" NAME="Sl_wrDAck" SIGNAME="plb_v46_0_Sl_wrDAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrComp" DIR="O" MPD_INDEX="31" NAME="Sl_wrComp" SIGNAME="plb_v46_0_Sl_wrComp"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDBus" DIR="O" MPD_INDEX="32" NAME="Sl_rdDBus" SIGNAME="plb_v46_0_Sl_rdDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDAck" DIR="O" MPD_INDEX="33" NAME="Sl_rdDAck" SIGNAME="plb_v46_0_Sl_rdDAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdComp" DIR="O" MPD_INDEX="34" NAME="Sl_rdComp" SIGNAME="plb_v46_0_Sl_rdComp"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MBusy" DIR="O" MPD_INDEX="35" NAME="Sl_MBusy" SIGNAME="plb_v46_0_Sl_MBusy" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MWrErr" DIR="O" MPD_INDEX="36" NAME="Sl_MWrErr" SIGNAME="plb_v46_0_Sl_MWrErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MRdErr" DIR="O" MPD_INDEX="37" NAME="Sl_MRdErr" SIGNAME="plb_v46_0_Sl_MRdErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrBTerm" DIR="O" MPD_INDEX="38" NAME="Sl_wrBTerm" SIGNAME="plb_v46_0_Sl_wrBTerm"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdWdAddr" DIR="O" MPD_INDEX="39" NAME="Sl_rdWdAddr" SIGNAME="plb_v46_0_Sl_rdWdAddr" VECFORMULA="[0:3]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdBTerm" DIR="O" MPD_INDEX="40" NAME="Sl_rdBTerm" SIGNAME="plb_v46_0_Sl_rdBTerm"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MIRQ" DIR="O" MPD_INDEX="41" NAME="Sl_MIRQ" SIGNAME="plb_v46_0_Sl_MIRQ" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<BUSINTERFACE BUSNAME="plb_v46_0" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_INMHS="TRUE" MPD_INDEX="0" NAME="SPLB" TYPE="SLAVE"/>
<INTERRUPTINFO TYPE="SOURCE">
<TARGET INTC_INDEX="0" PRIORITY="1"/>
</INTERRUPTINFO>
</MODULE>
<MODULE HWVERSION="2.00.a" INSTANCE="LEDs_8Bit" IPTYPE="PERIPHERAL" MHS_INDEX="5" MODCLASS="PERIPHERAL" MODTYPE="xps_gpio">
<DESCRIPTION TYPE="SHORT">XPS General Purpose IO</DESCRIPTION>
<DESCRIPTION TYPE="LONG">General Purpose Input/Output (GPIO) core for the PLBV46 bus.</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/xps_gpio_v2_00_a/doc/xps_gpio.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="0" NAME="C_BASEADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x81440000">
<DESCRIPTION>Base Address</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="1" NAME="C_HIGHADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x8144ffff">
<DESCRIPTION>High Address</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="2" NAME="C_SPLB_AWIDTH" TYPE="INTEGER" VALUE="32">
<DESCRIPTION>PLB Address Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="3" NAME="C_SPLB_DWIDTH" TYPE="INTEGER" VALUE="128">
<DESCRIPTION>PLB Data Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="4" NAME="C_SPLB_P2P" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>PLB Slave Uses P2P Topology</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="5" NAME="C_SPLB_MID_WIDTH" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Master ID Bus Width of PLB</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="6" NAME="C_SPLB_NUM_MASTERS" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Number of PLB Masters</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="7" NAME="C_SPLB_NATIVE_DWIDTH" TYPE="INTEGER" VALUE="32">
<DESCRIPTION>Native Data Bus Width of PLB Slave</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="8" NAME="C_SPLB_SUPPORT_BURSTS" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>PLB Slave is Capable of Bursts</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="9" NAME="C_FAMILY" TYPE="STRING" VALUE="virtex5">
<DESCRIPTION>Device Family</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="10" NAME="C_ALL_INPUTS" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Channel 1 is Input Only </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="11" NAME="C_ALL_INPUTS_2" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Channel 2 is Input Only </DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="12" NAME="C_GPIO_WIDTH" TYPE="INTEGER" VALUE="8">
<DESCRIPTION>GPIO Data Channel Width</DESCRIPTION>
<DESCRIPTION>GPIO Data Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="13" NAME="C_GPIO2_WIDTH" TYPE="INTEGER" VALUE="32">
<DESCRIPTION>GPIO2 Data Channel Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="14" NAME="C_INTERRUPT_PRESENT" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>GPIO Supports Interrupts</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="15" NAME="C_DOUT_DEFAULT" TYPE="std_logic_vector" VALUE="0x00000000">
<DESCRIPTION>Channel 1 Data Out Default Value </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="16" NAME="C_TRI_DEFAULT" TYPE="std_logic_vector" VALUE="0xffffffff">
<DESCRIPTION>Channel 1 Tri-state Default Value </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="17" NAME="C_IS_DUAL" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Enable Channel 2 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="18" NAME="C_DOUT_DEFAULT_2" TYPE="std_logic_vector" VALUE="0x00000000">
<DESCRIPTION>Channel 2 Data Out Default Value </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="19" NAME="C_TRI_DEFAULT_2" TYPE="std_logic_vector" VALUE="0xffffffff">
<DESCRIPTION>Channel 2 Tri-state Default Value </DESCRIPTION>
</PARAMETER>
<MEMORYMAP>
<MEMRANGE BASEDECIMAL="2168717312" BASENAME="C_BASEADDR" BASEVALUE="0x81440000" HIGHDECIMAL="2168782847" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8144ffff" MEMTYPE="REGISTER" MINSIZE="0x200" SIZE="65536" SIZEABRV="64K">
<SLVINTERFACES>
<BUSINTERFACE NAME="SPLB"/>
</SLVINTERFACES>
</MEMRANGE>
</MEMORYMAP>
<PORT DIR="IO" ENDIAN="BIG" IS_INMHS="TRUE" LSB="0" MHS_INDEX="0" MPD_INDEX="49" MSB="7" NAME="GPIO_IO" SIGNAME="fpga_0_LEDs_8Bit_GPIO_IO_pin" VECFORMULA="[0:(C_GPIO_WIDTH-1)]">
<DESCRIPTION>GPIO1 Data IO</DESCRIPTION>
</PORT>
<PORT BUS="SPLB" CLKFREQUENCY="125000000" DEF_SIGNAME="clk_125_0000MHzPLL0_ADJUST" DIR="I" MPD_INDEX="0" NAME="SPLB_Clk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_SPLB_Rst" DIR="I" MPD_INDEX="1" NAME="SPLB_Rst" SIGIS="RST" SIGNAME="plb_v46_0_SPLB_Rst"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_ABus" DIR="I" MPD_INDEX="2" NAME="PLB_ABus" SIGNAME="plb_v46_0_PLB_ABus" VECFORMULA="[0:31]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_UABus" DIR="I" MPD_INDEX="3" NAME="PLB_UABus" SIGNAME="plb_v46_0_PLB_UABus" VECFORMULA="[0:31]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_PAValid" DIR="I" MPD_INDEX="4" NAME="PLB_PAValid" SIGNAME="plb_v46_0_PLB_PAValid"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_SAValid" DIR="I" MPD_INDEX="5" NAME="PLB_SAValid" SIGNAME="plb_v46_0_PLB_SAValid"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPrim" DIR="I" MPD_INDEX="6" NAME="PLB_rdPrim" SIGNAME="plb_v46_0_PLB_rdPrim"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPrim" DIR="I" MPD_INDEX="7" NAME="PLB_wrPrim" SIGNAME="plb_v46_0_PLB_wrPrim"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_masterID" DIR="I" MPD_INDEX="8" NAME="PLB_masterID" SIGNAME="plb_v46_0_PLB_masterID" VECFORMULA="[0:(C_SPLB_MID_WIDTH-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_abort" DIR="I" MPD_INDEX="9" NAME="PLB_abort" SIGNAME="plb_v46_0_PLB_abort"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_busLock" DIR="I" MPD_INDEX="10" NAME="PLB_busLock" SIGNAME="plb_v46_0_PLB_busLock"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_RNW" DIR="I" MPD_INDEX="11" NAME="PLB_RNW" SIGNAME="plb_v46_0_PLB_RNW"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_BE" DIR="I" MPD_INDEX="12" NAME="PLB_BE" SIGNAME="plb_v46_0_PLB_BE" VECFORMULA="[0:((C_SPLB_DWIDTH/8)-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_MSize" DIR="I" MPD_INDEX="13" NAME="PLB_MSize" SIGNAME="plb_v46_0_PLB_MSize" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_size" DIR="I" MPD_INDEX="14" NAME="PLB_size" SIGNAME="plb_v46_0_PLB_size" VECFORMULA="[0:3]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_type" DIR="I" MPD_INDEX="15" NAME="PLB_type" SIGNAME="plb_v46_0_PLB_type" VECFORMULA="[0:2]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_lockErr" DIR="I" MPD_INDEX="16" NAME="PLB_lockErr" SIGNAME="plb_v46_0_PLB_lockErr"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrDBus" DIR="I" MPD_INDEX="17" NAME="PLB_wrDBus" SIGNAME="plb_v46_0_PLB_wrDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrBurst" DIR="I" MPD_INDEX="18" NAME="PLB_wrBurst" SIGNAME="plb_v46_0_PLB_wrBurst"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdBurst" DIR="I" MPD_INDEX="19" NAME="PLB_rdBurst" SIGNAME="plb_v46_0_PLB_rdBurst"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendReq" DIR="I" MPD_INDEX="20" NAME="PLB_wrPendReq" SIGNAME="plb_v46_0_PLB_wrPendReq"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendReq" DIR="I" MPD_INDEX="21" NAME="PLB_rdPendReq" SIGNAME="plb_v46_0_PLB_rdPendReq"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendPri" DIR="I" MPD_INDEX="22" NAME="PLB_wrPendPri" SIGNAME="plb_v46_0_PLB_wrPendPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendPri" DIR="I" MPD_INDEX="23" NAME="PLB_rdPendPri" SIGNAME="plb_v46_0_PLB_rdPendPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_reqPri" DIR="I" MPD_INDEX="24" NAME="PLB_reqPri" SIGNAME="plb_v46_0_PLB_reqPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_TAttribute" DIR="I" MPD_INDEX="25" NAME="PLB_TAttribute" SIGNAME="plb_v46_0_PLB_TAttribute" VECFORMULA="[0:15]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_addrAck" DIR="O" MPD_INDEX="26" NAME="Sl_addrAck" SIGNAME="plb_v46_0_Sl_addrAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_SSize" DIR="O" MPD_INDEX="27" NAME="Sl_SSize" SIGNAME="plb_v46_0_Sl_SSize" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wait" DIR="O" MPD_INDEX="28" NAME="Sl_wait" SIGNAME="plb_v46_0_Sl_wait"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rearbitrate" DIR="O" MPD_INDEX="29" NAME="Sl_rearbitrate" SIGNAME="plb_v46_0_Sl_rearbitrate"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrDAck" DIR="O" MPD_INDEX="30" NAME="Sl_wrDAck" SIGNAME="plb_v46_0_Sl_wrDAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrComp" DIR="O" MPD_INDEX="31" NAME="Sl_wrComp" SIGNAME="plb_v46_0_Sl_wrComp"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrBTerm" DIR="O" MPD_INDEX="32" NAME="Sl_wrBTerm" SIGNAME="plb_v46_0_Sl_wrBTerm"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDBus" DIR="O" MPD_INDEX="33" NAME="Sl_rdDBus" SIGNAME="plb_v46_0_Sl_rdDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdWdAddr" DIR="O" MPD_INDEX="34" NAME="Sl_rdWdAddr" SIGNAME="plb_v46_0_Sl_rdWdAddr" VECFORMULA="[0:3]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDAck" DIR="O" MPD_INDEX="35" NAME="Sl_rdDAck" SIGNAME="plb_v46_0_Sl_rdDAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdComp" DIR="O" MPD_INDEX="36" NAME="Sl_rdComp" SIGNAME="plb_v46_0_Sl_rdComp"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdBTerm" DIR="O" MPD_INDEX="37" NAME="Sl_rdBTerm" SIGNAME="plb_v46_0_Sl_rdBTerm"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MBusy" DIR="O" MPD_INDEX="38" NAME="Sl_MBusy" SIGNAME="plb_v46_0_Sl_MBusy" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MWrErr" DIR="O" MPD_INDEX="39" NAME="Sl_MWrErr" SIGNAME="plb_v46_0_Sl_MWrErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MRdErr" DIR="O" MPD_INDEX="40" NAME="Sl_MRdErr" SIGNAME="plb_v46_0_Sl_MRdErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MIRQ" DIR="O" MPD_INDEX="41" NAME="Sl_MIRQ" SIGNAME="plb_v46_0_Sl_MIRQ" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="42" NAME="IP2INTC_Irpt" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
<PORT DIR="I" MPD_INDEX="43" NAME="GPIO_IO_I" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO_WIDTH-1)]"/>
<PORT DIR="O" MPD_INDEX="44" NAME="GPIO_IO_O" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO_WIDTH-1)]"/>
<PORT DIR="O" MPD_INDEX="45" NAME="GPIO_IO_T" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO_WIDTH-1)]"/>
<PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="46" NAME="GPIO2_IO_I" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO2_WIDTH-1)]"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="47" NAME="GPIO2_IO_O" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO2_WIDTH-1)]"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="48" NAME="GPIO2_IO_T" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO2_WIDTH-1)]"/>
<PORT DIR="IO" IS_VALID="FALSE" MPD_INDEX="50" NAME="GPIO2_IO" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO2_WIDTH-1)]">
<DESCRIPTION>GPIO2 Data IO</DESCRIPTION>
</PORT>
<BUSINTERFACE BUSNAME="plb_v46_0" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_INMHS="TRUE" MPD_INDEX="0" NAME="SPLB" TYPE="SLAVE"/>
</MODULE>
<MODULE HWVERSION="2.00.a" INSTANCE="LEDs_Positions" IPTYPE="PERIPHERAL" MHS_INDEX="6" MODCLASS="PERIPHERAL" MODTYPE="xps_gpio">
<DESCRIPTION TYPE="SHORT">XPS General Purpose IO</DESCRIPTION>
<DESCRIPTION TYPE="LONG">General Purpose Input/Output (GPIO) core for the PLBV46 bus.</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/xps_gpio_v2_00_a/doc/xps_gpio.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="0" NAME="C_BASEADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x81420000">
<DESCRIPTION>Base Address</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="1" NAME="C_HIGHADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x8142ffff">
<DESCRIPTION>High Address</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="2" NAME="C_SPLB_AWIDTH" TYPE="INTEGER" VALUE="32">
<DESCRIPTION>PLB Address Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="3" NAME="C_SPLB_DWIDTH" TYPE="INTEGER" VALUE="128">
<DESCRIPTION>PLB Data Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="4" NAME="C_SPLB_P2P" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>PLB Slave Uses P2P Topology</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="5" NAME="C_SPLB_MID_WIDTH" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Master ID Bus Width of PLB</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="6" NAME="C_SPLB_NUM_MASTERS" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Number of PLB Masters</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="7" NAME="C_SPLB_NATIVE_DWIDTH" TYPE="INTEGER" VALUE="32">
<DESCRIPTION>Native Data Bus Width of PLB Slave</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="8" NAME="C_SPLB_SUPPORT_BURSTS" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>PLB Slave is Capable of Bursts</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="9" NAME="C_FAMILY" TYPE="STRING" VALUE="virtex5">
<DESCRIPTION>Device Family</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="10" NAME="C_ALL_INPUTS" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Channel 1 is Input Only </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="11" NAME="C_ALL_INPUTS_2" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Channel 2 is Input Only </DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="12" NAME="C_GPIO_WIDTH" TYPE="INTEGER" VALUE="5">
<DESCRIPTION>GPIO Data Channel Width</DESCRIPTION>
<DESCRIPTION>GPIO Data Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="13" NAME="C_GPIO2_WIDTH" TYPE="INTEGER" VALUE="32">
<DESCRIPTION>GPIO2 Data Channel Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="14" NAME="C_INTERRUPT_PRESENT" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>GPIO Supports Interrupts</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="15" NAME="C_DOUT_DEFAULT" TYPE="std_logic_vector" VALUE="0x00000000">
<DESCRIPTION>Channel 1 Data Out Default Value </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="16" NAME="C_TRI_DEFAULT" TYPE="std_logic_vector" VALUE="0xffffffff">
<DESCRIPTION>Channel 1 Tri-state Default Value </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="17" NAME="C_IS_DUAL" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Enable Channel 2 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="18" NAME="C_DOUT_DEFAULT_2" TYPE="std_logic_vector" VALUE="0x00000000">
<DESCRIPTION>Channel 2 Data Out Default Value </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="19" NAME="C_TRI_DEFAULT_2" TYPE="std_logic_vector" VALUE="0xffffffff">
<DESCRIPTION>Channel 2 Tri-state Default Value </DESCRIPTION>
</PARAMETER>
<MEMORYMAP>
<MEMRANGE BASEDECIMAL="2168586240" BASENAME="C_BASEADDR" BASEVALUE="0x81420000" HIGHDECIMAL="2168651775" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8142ffff" MEMTYPE="REGISTER" MINSIZE="0x200" SIZE="65536" SIZEABRV="64K">
<SLVINTERFACES>
<BUSINTERFACE NAME="SPLB"/>
</SLVINTERFACES>
</MEMRANGE>
</MEMORYMAP>
<PORT DIR="IO" ENDIAN="BIG" IS_INMHS="TRUE" LSB="0" MHS_INDEX="0" MPD_INDEX="49" MSB="4" NAME="GPIO_IO" SIGNAME="fpga_0_LEDs_Positions_GPIO_IO_pin" VECFORMULA="[0:(C_GPIO_WIDTH-1)]">
<DESCRIPTION>GPIO1 Data IO</DESCRIPTION>
</PORT>
<PORT BUS="SPLB" CLKFREQUENCY="125000000" DEF_SIGNAME="clk_125_0000MHzPLL0_ADJUST" DIR="I" MPD_INDEX="0" NAME="SPLB_Clk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_SPLB_Rst" DIR="I" MPD_INDEX="1" NAME="SPLB_Rst" SIGIS="RST" SIGNAME="plb_v46_0_SPLB_Rst"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_ABus" DIR="I" MPD_INDEX="2" NAME="PLB_ABus" SIGNAME="plb_v46_0_PLB_ABus" VECFORMULA="[0:31]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_UABus" DIR="I" MPD_INDEX="3" NAME="PLB_UABus" SIGNAME="plb_v46_0_PLB_UABus" VECFORMULA="[0:31]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_PAValid" DIR="I" MPD_INDEX="4" NAME="PLB_PAValid" SIGNAME="plb_v46_0_PLB_PAValid"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_SAValid" DIR="I" MPD_INDEX="5" NAME="PLB_SAValid" SIGNAME="plb_v46_0_PLB_SAValid"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPrim" DIR="I" MPD_INDEX="6" NAME="PLB_rdPrim" SIGNAME="plb_v46_0_PLB_rdPrim"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPrim" DIR="I" MPD_INDEX="7" NAME="PLB_wrPrim" SIGNAME="plb_v46_0_PLB_wrPrim"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_masterID" DIR="I" MPD_INDEX="8" NAME="PLB_masterID" SIGNAME="plb_v46_0_PLB_masterID" VECFORMULA="[0:(C_SPLB_MID_WIDTH-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_abort" DIR="I" MPD_INDEX="9" NAME="PLB_abort" SIGNAME="plb_v46_0_PLB_abort"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_busLock" DIR="I" MPD_INDEX="10" NAME="PLB_busLock" SIGNAME="plb_v46_0_PLB_busLock"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_RNW" DIR="I" MPD_INDEX="11" NAME="PLB_RNW" SIGNAME="plb_v46_0_PLB_RNW"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_BE" DIR="I" MPD_INDEX="12" NAME="PLB_BE" SIGNAME="plb_v46_0_PLB_BE" VECFORMULA="[0:((C_SPLB_DWIDTH/8)-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_MSize" DIR="I" MPD_INDEX="13" NAME="PLB_MSize" SIGNAME="plb_v46_0_PLB_MSize" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_size" DIR="I" MPD_INDEX="14" NAME="PLB_size" SIGNAME="plb_v46_0_PLB_size" VECFORMULA="[0:3]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_type" DIR="I" MPD_INDEX="15" NAME="PLB_type" SIGNAME="plb_v46_0_PLB_type" VECFORMULA="[0:2]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_lockErr" DIR="I" MPD_INDEX="16" NAME="PLB_lockErr" SIGNAME="plb_v46_0_PLB_lockErr"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrDBus" DIR="I" MPD_INDEX="17" NAME="PLB_wrDBus" SIGNAME="plb_v46_0_PLB_wrDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrBurst" DIR="I" MPD_INDEX="18" NAME="PLB_wrBurst" SIGNAME="plb_v46_0_PLB_wrBurst"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdBurst" DIR="I" MPD_INDEX="19" NAME="PLB_rdBurst" SIGNAME="plb_v46_0_PLB_rdBurst"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendReq" DIR="I" MPD_INDEX="20" NAME="PLB_wrPendReq" SIGNAME="plb_v46_0_PLB_wrPendReq"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendReq" DIR="I" MPD_INDEX="21" NAME="PLB_rdPendReq" SIGNAME="plb_v46_0_PLB_rdPendReq"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendPri" DIR="I" MPD_INDEX="22" NAME="PLB_wrPendPri" SIGNAME="plb_v46_0_PLB_wrPendPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendPri" DIR="I" MPD_INDEX="23" NAME="PLB_rdPendPri" SIGNAME="plb_v46_0_PLB_rdPendPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_reqPri" DIR="I" MPD_INDEX="24" NAME="PLB_reqPri" SIGNAME="plb_v46_0_PLB_reqPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_TAttribute" DIR="I" MPD_INDEX="25" NAME="PLB_TAttribute" SIGNAME="plb_v46_0_PLB_TAttribute" VECFORMULA="[0:15]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_addrAck" DIR="O" MPD_INDEX="26" NAME="Sl_addrAck" SIGNAME="plb_v46_0_Sl_addrAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_SSize" DIR="O" MPD_INDEX="27" NAME="Sl_SSize" SIGNAME="plb_v46_0_Sl_SSize" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wait" DIR="O" MPD_INDEX="28" NAME="Sl_wait" SIGNAME="plb_v46_0_Sl_wait"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rearbitrate" DIR="O" MPD_INDEX="29" NAME="Sl_rearbitrate" SIGNAME="plb_v46_0_Sl_rearbitrate"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrDAck" DIR="O" MPD_INDEX="30" NAME="Sl_wrDAck" SIGNAME="plb_v46_0_Sl_wrDAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrComp" DIR="O" MPD_INDEX="31" NAME="Sl_wrComp" SIGNAME="plb_v46_0_Sl_wrComp"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrBTerm" DIR="O" MPD_INDEX="32" NAME="Sl_wrBTerm" SIGNAME="plb_v46_0_Sl_wrBTerm"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDBus" DIR="O" MPD_INDEX="33" NAME="Sl_rdDBus" SIGNAME="plb_v46_0_Sl_rdDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdWdAddr" DIR="O" MPD_INDEX="34" NAME="Sl_rdWdAddr" SIGNAME="plb_v46_0_Sl_rdWdAddr" VECFORMULA="[0:3]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDAck" DIR="O" MPD_INDEX="35" NAME="Sl_rdDAck" SIGNAME="plb_v46_0_Sl_rdDAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdComp" DIR="O" MPD_INDEX="36" NAME="Sl_rdComp" SIGNAME="plb_v46_0_Sl_rdComp"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdBTerm" DIR="O" MPD_INDEX="37" NAME="Sl_rdBTerm" SIGNAME="plb_v46_0_Sl_rdBTerm"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MBusy" DIR="O" MPD_INDEX="38" NAME="Sl_MBusy" SIGNAME="plb_v46_0_Sl_MBusy" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MWrErr" DIR="O" MPD_INDEX="39" NAME="Sl_MWrErr" SIGNAME="plb_v46_0_Sl_MWrErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MRdErr" DIR="O" MPD_INDEX="40" NAME="Sl_MRdErr" SIGNAME="plb_v46_0_Sl_MRdErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MIRQ" DIR="O" MPD_INDEX="41" NAME="Sl_MIRQ" SIGNAME="plb_v46_0_Sl_MIRQ" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="42" NAME="IP2INTC_Irpt" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
<PORT DIR="I" MPD_INDEX="43" NAME="GPIO_IO_I" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO_WIDTH-1)]"/>
<PORT DIR="O" MPD_INDEX="44" NAME="GPIO_IO_O" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO_WIDTH-1)]"/>
<PORT DIR="O" MPD_INDEX="45" NAME="GPIO_IO_T" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO_WIDTH-1)]"/>
<PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="46" NAME="GPIO2_IO_I" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO2_WIDTH-1)]"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="47" NAME="GPIO2_IO_O" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO2_WIDTH-1)]"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="48" NAME="GPIO2_IO_T" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO2_WIDTH-1)]"/>
<PORT DIR="IO" IS_VALID="FALSE" MPD_INDEX="50" NAME="GPIO2_IO" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO2_WIDTH-1)]">
<DESCRIPTION>GPIO2 Data IO</DESCRIPTION>
</PORT>
<BUSINTERFACE BUSNAME="plb_v46_0" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_INMHS="TRUE" MPD_INDEX="0" NAME="SPLB" TYPE="SLAVE"/>
</MODULE>
<MODULE HWVERSION="2.00.a" INSTANCE="Push_Buttons_5Bit" IPTYPE="PERIPHERAL" MHS_INDEX="7" MODCLASS="PERIPHERAL" MODTYPE="xps_gpio">
<DESCRIPTION TYPE="SHORT">XPS General Purpose IO</DESCRIPTION>
<DESCRIPTION TYPE="LONG">General Purpose Input/Output (GPIO) core for the PLBV46 bus.</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/xps_gpio_v2_00_a/doc/xps_gpio.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="0" NAME="C_BASEADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x81400000">
<DESCRIPTION>Base Address</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="1" NAME="C_HIGHADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x8140ffff">
<DESCRIPTION>High Address</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="2" NAME="C_SPLB_AWIDTH" TYPE="INTEGER" VALUE="32">
<DESCRIPTION>PLB Address Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="3" NAME="C_SPLB_DWIDTH" TYPE="INTEGER" VALUE="128">
<DESCRIPTION>PLB Data Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="4" NAME="C_SPLB_P2P" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>PLB Slave Uses P2P Topology</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="5" NAME="C_SPLB_MID_WIDTH" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Master ID Bus Width of PLB</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="6" NAME="C_SPLB_NUM_MASTERS" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Number of PLB Masters</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="7" NAME="C_SPLB_NATIVE_DWIDTH" TYPE="INTEGER" VALUE="32">
<DESCRIPTION>Native Data Bus Width of PLB Slave</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="8" NAME="C_SPLB_SUPPORT_BURSTS" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>PLB Slave is Capable of Bursts</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="9" NAME="C_FAMILY" TYPE="STRING" VALUE="virtex5">
<DESCRIPTION>Device Family</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="10" NAME="C_ALL_INPUTS" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Channel 1 is Input Only </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="11" NAME="C_ALL_INPUTS_2" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Channel 2 is Input Only </DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="12" NAME="C_GPIO_WIDTH" TYPE="INTEGER" VALUE="5">
<DESCRIPTION>GPIO Data Channel Width</DESCRIPTION>
<DESCRIPTION>GPIO Data Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="13" NAME="C_GPIO2_WIDTH" TYPE="INTEGER" VALUE="32">
<DESCRIPTION>GPIO2 Data Channel Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="14" NAME="C_INTERRUPT_PRESENT" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>GPIO Supports Interrupts</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="15" NAME="C_DOUT_DEFAULT" TYPE="std_logic_vector" VALUE="0x00000000">
<DESCRIPTION>Channel 1 Data Out Default Value </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="16" NAME="C_TRI_DEFAULT" TYPE="std_logic_vector" VALUE="0xffffffff">
<DESCRIPTION>Channel 1 Tri-state Default Value </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="17" NAME="C_IS_DUAL" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Enable Channel 2 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="18" NAME="C_DOUT_DEFAULT_2" TYPE="std_logic_vector" VALUE="0x00000000">
<DESCRIPTION>Channel 2 Data Out Default Value </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="19" NAME="C_TRI_DEFAULT_2" TYPE="std_logic_vector" VALUE="0xffffffff">
<DESCRIPTION>Channel 2 Tri-state Default Value </DESCRIPTION>
</PARAMETER>
<MEMORYMAP>
<MEMRANGE BASEDECIMAL="2168455168" BASENAME="C_BASEADDR" BASEVALUE="0x81400000" HIGHDECIMAL="2168520703" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8140ffff" MEMTYPE="REGISTER" MINSIZE="0x200" SIZE="65536" SIZEABRV="64K">
<SLVINTERFACES>
<BUSINTERFACE NAME="SPLB"/>
</SLVINTERFACES>
</MEMRANGE>
</MEMORYMAP>
<PORT DIR="IO" ENDIAN="BIG" IS_INMHS="TRUE" LSB="0" MHS_INDEX="0" MPD_INDEX="49" MSB="4" NAME="GPIO_IO" SIGNAME="fpga_0_Push_Buttons_5Bit_GPIO_IO_pin" VECFORMULA="[0:(C_GPIO_WIDTH-1)]">
<DESCRIPTION>GPIO1 Data IO</DESCRIPTION>
</PORT>
<PORT BUS="SPLB" CLKFREQUENCY="125000000" DEF_SIGNAME="clk_125_0000MHzPLL0_ADJUST" DIR="I" MPD_INDEX="0" NAME="SPLB_Clk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_SPLB_Rst" DIR="I" MPD_INDEX="1" NAME="SPLB_Rst" SIGIS="RST" SIGNAME="plb_v46_0_SPLB_Rst"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_ABus" DIR="I" MPD_INDEX="2" NAME="PLB_ABus" SIGNAME="plb_v46_0_PLB_ABus" VECFORMULA="[0:31]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_UABus" DIR="I" MPD_INDEX="3" NAME="PLB_UABus" SIGNAME="plb_v46_0_PLB_UABus" VECFORMULA="[0:31]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_PAValid" DIR="I" MPD_INDEX="4" NAME="PLB_PAValid" SIGNAME="plb_v46_0_PLB_PAValid"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_SAValid" DIR="I" MPD_INDEX="5" NAME="PLB_SAValid" SIGNAME="plb_v46_0_PLB_SAValid"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPrim" DIR="I" MPD_INDEX="6" NAME="PLB_rdPrim" SIGNAME="plb_v46_0_PLB_rdPrim"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPrim" DIR="I" MPD_INDEX="7" NAME="PLB_wrPrim" SIGNAME="plb_v46_0_PLB_wrPrim"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_masterID" DIR="I" MPD_INDEX="8" NAME="PLB_masterID" SIGNAME="plb_v46_0_PLB_masterID" VECFORMULA="[0:(C_SPLB_MID_WIDTH-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_abort" DIR="I" MPD_INDEX="9" NAME="PLB_abort" SIGNAME="plb_v46_0_PLB_abort"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_busLock" DIR="I" MPD_INDEX="10" NAME="PLB_busLock" SIGNAME="plb_v46_0_PLB_busLock"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_RNW" DIR="I" MPD_INDEX="11" NAME="PLB_RNW" SIGNAME="plb_v46_0_PLB_RNW"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_BE" DIR="I" MPD_INDEX="12" NAME="PLB_BE" SIGNAME="plb_v46_0_PLB_BE" VECFORMULA="[0:((C_SPLB_DWIDTH/8)-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_MSize" DIR="I" MPD_INDEX="13" NAME="PLB_MSize" SIGNAME="plb_v46_0_PLB_MSize" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_size" DIR="I" MPD_INDEX="14" NAME="PLB_size" SIGNAME="plb_v46_0_PLB_size" VECFORMULA="[0:3]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_type" DIR="I" MPD_INDEX="15" NAME="PLB_type" SIGNAME="plb_v46_0_PLB_type" VECFORMULA="[0:2]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_lockErr" DIR="I" MPD_INDEX="16" NAME="PLB_lockErr" SIGNAME="plb_v46_0_PLB_lockErr"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrDBus" DIR="I" MPD_INDEX="17" NAME="PLB_wrDBus" SIGNAME="plb_v46_0_PLB_wrDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrBurst" DIR="I" MPD_INDEX="18" NAME="PLB_wrBurst" SIGNAME="plb_v46_0_PLB_wrBurst"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdBurst" DIR="I" MPD_INDEX="19" NAME="PLB_rdBurst" SIGNAME="plb_v46_0_PLB_rdBurst"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendReq" DIR="I" MPD_INDEX="20" NAME="PLB_wrPendReq" SIGNAME="plb_v46_0_PLB_wrPendReq"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendReq" DIR="I" MPD_INDEX="21" NAME="PLB_rdPendReq" SIGNAME="plb_v46_0_PLB_rdPendReq"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendPri" DIR="I" MPD_INDEX="22" NAME="PLB_wrPendPri" SIGNAME="plb_v46_0_PLB_wrPendPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendPri" DIR="I" MPD_INDEX="23" NAME="PLB_rdPendPri" SIGNAME="plb_v46_0_PLB_rdPendPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_reqPri" DIR="I" MPD_INDEX="24" NAME="PLB_reqPri" SIGNAME="plb_v46_0_PLB_reqPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_TAttribute" DIR="I" MPD_INDEX="25" NAME="PLB_TAttribute" SIGNAME="plb_v46_0_PLB_TAttribute" VECFORMULA="[0:15]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_addrAck" DIR="O" MPD_INDEX="26" NAME="Sl_addrAck" SIGNAME="plb_v46_0_Sl_addrAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_SSize" DIR="O" MPD_INDEX="27" NAME="Sl_SSize" SIGNAME="plb_v46_0_Sl_SSize" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wait" DIR="O" MPD_INDEX="28" NAME="Sl_wait" SIGNAME="plb_v46_0_Sl_wait"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rearbitrate" DIR="O" MPD_INDEX="29" NAME="Sl_rearbitrate" SIGNAME="plb_v46_0_Sl_rearbitrate"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrDAck" DIR="O" MPD_INDEX="30" NAME="Sl_wrDAck" SIGNAME="plb_v46_0_Sl_wrDAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrComp" DIR="O" MPD_INDEX="31" NAME="Sl_wrComp" SIGNAME="plb_v46_0_Sl_wrComp"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrBTerm" DIR="O" MPD_INDEX="32" NAME="Sl_wrBTerm" SIGNAME="plb_v46_0_Sl_wrBTerm"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDBus" DIR="O" MPD_INDEX="33" NAME="Sl_rdDBus" SIGNAME="plb_v46_0_Sl_rdDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdWdAddr" DIR="O" MPD_INDEX="34" NAME="Sl_rdWdAddr" SIGNAME="plb_v46_0_Sl_rdWdAddr" VECFORMULA="[0:3]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDAck" DIR="O" MPD_INDEX="35" NAME="Sl_rdDAck" SIGNAME="plb_v46_0_Sl_rdDAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdComp" DIR="O" MPD_INDEX="36" NAME="Sl_rdComp" SIGNAME="plb_v46_0_Sl_rdComp"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdBTerm" DIR="O" MPD_INDEX="37" NAME="Sl_rdBTerm" SIGNAME="plb_v46_0_Sl_rdBTerm"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MBusy" DIR="O" MPD_INDEX="38" NAME="Sl_MBusy" SIGNAME="plb_v46_0_Sl_MBusy" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MWrErr" DIR="O" MPD_INDEX="39" NAME="Sl_MWrErr" SIGNAME="plb_v46_0_Sl_MWrErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MRdErr" DIR="O" MPD_INDEX="40" NAME="Sl_MRdErr" SIGNAME="plb_v46_0_Sl_MRdErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MIRQ" DIR="O" MPD_INDEX="41" NAME="Sl_MIRQ" SIGNAME="plb_v46_0_Sl_MIRQ" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="42" NAME="IP2INTC_Irpt" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
<PORT DIR="I" MPD_INDEX="43" NAME="GPIO_IO_I" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO_WIDTH-1)]"/>
<PORT DIR="O" MPD_INDEX="44" NAME="GPIO_IO_O" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO_WIDTH-1)]"/>
<PORT DIR="O" MPD_INDEX="45" NAME="GPIO_IO_T" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO_WIDTH-1)]"/>
<PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="46" NAME="GPIO2_IO_I" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO2_WIDTH-1)]"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="47" NAME="GPIO2_IO_O" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO2_WIDTH-1)]"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="48" NAME="GPIO2_IO_T" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO2_WIDTH-1)]"/>
<PORT DIR="IO" IS_VALID="FALSE" MPD_INDEX="50" NAME="GPIO2_IO" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO2_WIDTH-1)]">
<DESCRIPTION>GPIO2 Data IO</DESCRIPTION>
</PORT>
<BUSINTERFACE BUSNAME="plb_v46_0" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_INMHS="TRUE" MPD_INDEX="0" NAME="SPLB" TYPE="SLAVE"/>
</MODULE>
<MODULE HWVERSION="2.00.a" INSTANCE="DIP_Switches_8Bit" IPTYPE="PERIPHERAL" MHS_INDEX="8" MODCLASS="PERIPHERAL" MODTYPE="xps_gpio">
<DESCRIPTION TYPE="SHORT">XPS General Purpose IO</DESCRIPTION>
<DESCRIPTION TYPE="LONG">General Purpose Input/Output (GPIO) core for the PLBV46 bus.</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/xps_gpio_v2_00_a/doc/xps_gpio.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="0" NAME="C_BASEADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x81460000">
<DESCRIPTION>Base Address</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="1" NAME="C_HIGHADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x8146ffff">
<DESCRIPTION>High Address</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="2" NAME="C_SPLB_AWIDTH" TYPE="INTEGER" VALUE="32">
<DESCRIPTION>PLB Address Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="3" NAME="C_SPLB_DWIDTH" TYPE="INTEGER" VALUE="128">
<DESCRIPTION>PLB Data Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="4" NAME="C_SPLB_P2P" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>PLB Slave Uses P2P Topology</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="5" NAME="C_SPLB_MID_WIDTH" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Master ID Bus Width of PLB</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="6" NAME="C_SPLB_NUM_MASTERS" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Number of PLB Masters</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="7" NAME="C_SPLB_NATIVE_DWIDTH" TYPE="INTEGER" VALUE="32">
<DESCRIPTION>Native Data Bus Width of PLB Slave</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="8" NAME="C_SPLB_SUPPORT_BURSTS" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>PLB Slave is Capable of Bursts</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="9" NAME="C_FAMILY" TYPE="STRING" VALUE="virtex5">
<DESCRIPTION>Device Family</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="10" NAME="C_ALL_INPUTS" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Channel 1 is Input Only </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="11" NAME="C_ALL_INPUTS_2" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Channel 2 is Input Only </DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="12" NAME="C_GPIO_WIDTH" TYPE="INTEGER" VALUE="8">
<DESCRIPTION>GPIO Data Channel Width</DESCRIPTION>
<DESCRIPTION>GPIO Data Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="13" NAME="C_GPIO2_WIDTH" TYPE="INTEGER" VALUE="32">
<DESCRIPTION>GPIO2 Data Channel Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="14" NAME="C_INTERRUPT_PRESENT" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>GPIO Supports Interrupts</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="15" NAME="C_DOUT_DEFAULT" TYPE="std_logic_vector" VALUE="0x00000000">
<DESCRIPTION>Channel 1 Data Out Default Value </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="16" NAME="C_TRI_DEFAULT" TYPE="std_logic_vector" VALUE="0xffffffff">
<DESCRIPTION>Channel 1 Tri-state Default Value </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="17" NAME="C_IS_DUAL" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Enable Channel 2 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="18" NAME="C_DOUT_DEFAULT_2" TYPE="std_logic_vector" VALUE="0x00000000">
<DESCRIPTION>Channel 2 Data Out Default Value </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="19" NAME="C_TRI_DEFAULT_2" TYPE="std_logic_vector" VALUE="0xffffffff">
<DESCRIPTION>Channel 2 Tri-state Default Value </DESCRIPTION>
</PARAMETER>
<MEMORYMAP>
<MEMRANGE BASEDECIMAL="2168848384" BASENAME="C_BASEADDR" BASEVALUE="0x81460000" HIGHDECIMAL="2168913919" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8146ffff" MEMTYPE="REGISTER" MINSIZE="0x200" SIZE="65536" SIZEABRV="64K">
<SLVINTERFACES>
<BUSINTERFACE NAME="SPLB"/>
</SLVINTERFACES>
</MEMRANGE>
</MEMORYMAP>
<PORT DIR="IO" ENDIAN="BIG" IS_INMHS="TRUE" LSB="0" MHS_INDEX="0" MPD_INDEX="49" MSB="7" NAME="GPIO_IO" SIGNAME="fpga_0_DIP_Switches_8Bit_GPIO_IO_pin" VECFORMULA="[0:(C_GPIO_WIDTH-1)]">
<DESCRIPTION>GPIO1 Data IO</DESCRIPTION>
</PORT>
<PORT BUS="SPLB" CLKFREQUENCY="125000000" DEF_SIGNAME="clk_125_0000MHzPLL0_ADJUST" DIR="I" MPD_INDEX="0" NAME="SPLB_Clk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_SPLB_Rst" DIR="I" MPD_INDEX="1" NAME="SPLB_Rst" SIGIS="RST" SIGNAME="plb_v46_0_SPLB_Rst"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_ABus" DIR="I" MPD_INDEX="2" NAME="PLB_ABus" SIGNAME="plb_v46_0_PLB_ABus" VECFORMULA="[0:31]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_UABus" DIR="I" MPD_INDEX="3" NAME="PLB_UABus" SIGNAME="plb_v46_0_PLB_UABus" VECFORMULA="[0:31]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_PAValid" DIR="I" MPD_INDEX="4" NAME="PLB_PAValid" SIGNAME="plb_v46_0_PLB_PAValid"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_SAValid" DIR="I" MPD_INDEX="5" NAME="PLB_SAValid" SIGNAME="plb_v46_0_PLB_SAValid"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPrim" DIR="I" MPD_INDEX="6" NAME="PLB_rdPrim" SIGNAME="plb_v46_0_PLB_rdPrim"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPrim" DIR="I" MPD_INDEX="7" NAME="PLB_wrPrim" SIGNAME="plb_v46_0_PLB_wrPrim"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_masterID" DIR="I" MPD_INDEX="8" NAME="PLB_masterID" SIGNAME="plb_v46_0_PLB_masterID" VECFORMULA="[0:(C_SPLB_MID_WIDTH-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_abort" DIR="I" MPD_INDEX="9" NAME="PLB_abort" SIGNAME="plb_v46_0_PLB_abort"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_busLock" DIR="I" MPD_INDEX="10" NAME="PLB_busLock" SIGNAME="plb_v46_0_PLB_busLock"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_RNW" DIR="I" MPD_INDEX="11" NAME="PLB_RNW" SIGNAME="plb_v46_0_PLB_RNW"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_BE" DIR="I" MPD_INDEX="12" NAME="PLB_BE" SIGNAME="plb_v46_0_PLB_BE" VECFORMULA="[0:((C_SPLB_DWIDTH/8)-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_MSize" DIR="I" MPD_INDEX="13" NAME="PLB_MSize" SIGNAME="plb_v46_0_PLB_MSize" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_size" DIR="I" MPD_INDEX="14" NAME="PLB_size" SIGNAME="plb_v46_0_PLB_size" VECFORMULA="[0:3]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_type" DIR="I" MPD_INDEX="15" NAME="PLB_type" SIGNAME="plb_v46_0_PLB_type" VECFORMULA="[0:2]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_lockErr" DIR="I" MPD_INDEX="16" NAME="PLB_lockErr" SIGNAME="plb_v46_0_PLB_lockErr"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrDBus" DIR="I" MPD_INDEX="17" NAME="PLB_wrDBus" SIGNAME="plb_v46_0_PLB_wrDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrBurst" DIR="I" MPD_INDEX="18" NAME="PLB_wrBurst" SIGNAME="plb_v46_0_PLB_wrBurst"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdBurst" DIR="I" MPD_INDEX="19" NAME="PLB_rdBurst" SIGNAME="plb_v46_0_PLB_rdBurst"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendReq" DIR="I" MPD_INDEX="20" NAME="PLB_wrPendReq" SIGNAME="plb_v46_0_PLB_wrPendReq"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendReq" DIR="I" MPD_INDEX="21" NAME="PLB_rdPendReq" SIGNAME="plb_v46_0_PLB_rdPendReq"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendPri" DIR="I" MPD_INDEX="22" NAME="PLB_wrPendPri" SIGNAME="plb_v46_0_PLB_wrPendPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendPri" DIR="I" MPD_INDEX="23" NAME="PLB_rdPendPri" SIGNAME="plb_v46_0_PLB_rdPendPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_reqPri" DIR="I" MPD_INDEX="24" NAME="PLB_reqPri" SIGNAME="plb_v46_0_PLB_reqPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_TAttribute" DIR="I" MPD_INDEX="25" NAME="PLB_TAttribute" SIGNAME="plb_v46_0_PLB_TAttribute" VECFORMULA="[0:15]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_addrAck" DIR="O" MPD_INDEX="26" NAME="Sl_addrAck" SIGNAME="plb_v46_0_Sl_addrAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_SSize" DIR="O" MPD_INDEX="27" NAME="Sl_SSize" SIGNAME="plb_v46_0_Sl_SSize" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wait" DIR="O" MPD_INDEX="28" NAME="Sl_wait" SIGNAME="plb_v46_0_Sl_wait"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rearbitrate" DIR="O" MPD_INDEX="29" NAME="Sl_rearbitrate" SIGNAME="plb_v46_0_Sl_rearbitrate"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrDAck" DIR="O" MPD_INDEX="30" NAME="Sl_wrDAck" SIGNAME="plb_v46_0_Sl_wrDAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrComp" DIR="O" MPD_INDEX="31" NAME="Sl_wrComp" SIGNAME="plb_v46_0_Sl_wrComp"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrBTerm" DIR="O" MPD_INDEX="32" NAME="Sl_wrBTerm" SIGNAME="plb_v46_0_Sl_wrBTerm"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDBus" DIR="O" MPD_INDEX="33" NAME="Sl_rdDBus" SIGNAME="plb_v46_0_Sl_rdDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdWdAddr" DIR="O" MPD_INDEX="34" NAME="Sl_rdWdAddr" SIGNAME="plb_v46_0_Sl_rdWdAddr" VECFORMULA="[0:3]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDAck" DIR="O" MPD_INDEX="35" NAME="Sl_rdDAck" SIGNAME="plb_v46_0_Sl_rdDAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdComp" DIR="O" MPD_INDEX="36" NAME="Sl_rdComp" SIGNAME="plb_v46_0_Sl_rdComp"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdBTerm" DIR="O" MPD_INDEX="37" NAME="Sl_rdBTerm" SIGNAME="plb_v46_0_Sl_rdBTerm"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MBusy" DIR="O" MPD_INDEX="38" NAME="Sl_MBusy" SIGNAME="plb_v46_0_Sl_MBusy" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MWrErr" DIR="O" MPD_INDEX="39" NAME="Sl_MWrErr" SIGNAME="plb_v46_0_Sl_MWrErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MRdErr" DIR="O" MPD_INDEX="40" NAME="Sl_MRdErr" SIGNAME="plb_v46_0_Sl_MRdErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MIRQ" DIR="O" MPD_INDEX="41" NAME="Sl_MIRQ" SIGNAME="plb_v46_0_Sl_MIRQ" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="42" NAME="IP2INTC_Irpt" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
<PORT DIR="I" MPD_INDEX="43" NAME="GPIO_IO_I" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO_WIDTH-1)]"/>
<PORT DIR="O" MPD_INDEX="44" NAME="GPIO_IO_O" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO_WIDTH-1)]"/>
<PORT DIR="O" MPD_INDEX="45" NAME="GPIO_IO_T" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO_WIDTH-1)]"/>
<PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="46" NAME="GPIO2_IO_I" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO2_WIDTH-1)]"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="47" NAME="GPIO2_IO_O" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO2_WIDTH-1)]"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="48" NAME="GPIO2_IO_T" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO2_WIDTH-1)]"/>
<PORT DIR="IO" IS_VALID="FALSE" MPD_INDEX="50" NAME="GPIO2_IO" SIGNAME="__NOC__" VECFORMULA="[0:(C_GPIO2_WIDTH-1)]">
<DESCRIPTION>GPIO2 Data IO</DESCRIPTION>
</PORT>
<BUSINTERFACE BUSNAME="plb_v46_0" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_INMHS="TRUE" MPD_INDEX="0" NAME="SPLB" TYPE="SLAVE"/>
</MODULE>
<MODULE HWVERSION="2.01.a" INSTANCE="IIC_EEPROM" IPTYPE="PERIPHERAL" MHS_INDEX="9" MODCLASS="PERIPHERAL" MODTYPE="xps_iic">
<DESCRIPTION TYPE="SHORT">XPS IIC Interface</DESCRIPTION>
<DESCRIPTION TYPE="LONG">PLBV46 interface to Philips I2C bus v2.1</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/xps_iic_v2_01_a/doc/xps_iic.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETER MPD_INDEX="0" NAME="C_IIC_FREQ" TYPE="INTEGER" VALUE="100000">
<DESCRIPTION>Output Frequency of SCL Signal</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="1" NAME="C_TEN_BIT_ADR" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Use 10-bit Address</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="2" NAME="C_GPO_WIDTH" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Width of GPIO</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="3" NAME="C_CLK_FREQ" TYPE="INTEGER" VALUE="125000000">
<DESCRIPTION>PLBv46 Bus Clock Frequency</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="4" NAME="C_SCL_INERTIAL_DELAY" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Width of glitches removed on SCL input</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="5" NAME="C_SDA_INERTIAL_DELAY" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Width of glitches removed on SDA input</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="6" NAME="C_BASEADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x81600000">
<DESCRIPTION>Base Address</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="7" NAME="C_HIGHADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x8160ffff">
<DESCRIPTION>High Address</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="8" NAME="C_SPLB_MID_WIDTH" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Master ID Bus Width of PLB</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="9" NAME="C_SPLB_NUM_MASTERS" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Number of PLB Masters</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="10" NAME="C_SPLB_AWIDTH" TYPE="INTEGER" VALUE="32">
<DESCRIPTION>PLB Address Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="11" NAME="C_SPLB_DWIDTH" TYPE="INTEGER" VALUE="128">
<DESCRIPTION>PLB Data Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="12" NAME="C_SPLB_NATIVE_DWIDTH" TYPE="INTEGER" VALUE="32">
<DESCRIPTION>Native Data Bus Width of PLB Slave</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="13" NAME="C_FAMILY" TYPE="STRING" VALUE="virtex5">
<DESCRIPTION>Device Family</DESCRIPTION>
</PARAMETER>
<MEMORYMAP>
<MEMRANGE BASEDECIMAL="2170552320" BASENAME="C_BASEADDR" BASEVALUE="0x81600000" HIGHDECIMAL="2170617855" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8160ffff" MEMTYPE="REGISTER" MINSIZE="0x00200" SIZE="65536" SIZEABRV="64K">
<SLVINTERFACES>
<BUSINTERFACE NAME="SPLB"/>
</SLVINTERFACES>
</MEMRANGE>
</MEMORYMAP>
<PORT DIR="IO" IS_INMHS="TRUE" MHS_INDEX="0" MPD_INDEX="50" NAME="Sda" SIGNAME="fpga_0_IIC_EEPROM_Sda_pin">
<DESCRIPTION>IIC Serial Data</DESCRIPTION>
</PORT>
<PORT DIR="IO" IS_INMHS="TRUE" MHS_INDEX="1" MPD_INDEX="51" NAME="Scl" SIGNAME="fpga_0_IIC_EEPROM_Scl_pin">
<DESCRIPTION>IIC Serial Clock</DESCRIPTION>
</PORT>
<PORT DIR="I" MPD_INDEX="0" NAME="Sda_I" SIGNAME="__NOC__"/>
<PORT DIR="O" MPD_INDEX="1" NAME="Sda_O" SIGNAME="__NOC__"/>
<PORT DIR="O" MPD_INDEX="2" NAME="Sda_T" SIGNAME="__NOC__"/>
<PORT DIR="I" MPD_INDEX="3" NAME="Scl_I" SIGNAME="__NOC__"/>
<PORT DIR="O" MPD_INDEX="4" NAME="Scl_O" SIGNAME="__NOC__"/>
<PORT DIR="O" MPD_INDEX="5" NAME="Scl_T" SIGNAME="__NOC__"/>
<PORT DIR="O" MPD_INDEX="6" NAME="Gpo" SIGNAME="__NOC__" VECFORMULA="[(32-C_GPO_WIDTH):(32-1)]">
<DESCRIPTION>IIC General Purpose Output</DESCRIPTION>
</PORT>
<PORT DIR="O" MPD_INDEX="7" NAME="IIC2INTC_Irpt" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
<PORT BUS="SPLB" CLKFREQUENCY="125000000" DEF_SIGNAME="clk_125_0000MHzPLL0_ADJUST" DIR="I" MPD_INDEX="8" NAME="SPLB_Clk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_SPLB_Rst" DIR="I" MPD_INDEX="9" NAME="SPLB_Rst" SIGIS="RST" SIGNAME="plb_v46_0_SPLB_Rst"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_ABus" DIR="I" MPD_INDEX="10" NAME="PLB_ABus" SIGNAME="plb_v46_0_PLB_ABus" VECFORMULA="[0:31]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_UABus" DIR="I" MPD_INDEX="11" NAME="PLB_UABus" SIGNAME="plb_v46_0_PLB_UABus" VECFORMULA="[0:31]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_PAValid" DIR="I" MPD_INDEX="12" NAME="PLB_PAValid" SIGNAME="plb_v46_0_PLB_PAValid"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_SAValid" DIR="I" MPD_INDEX="13" NAME="PLB_SAValid" SIGNAME="plb_v46_0_PLB_SAValid"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPrim" DIR="I" MPD_INDEX="14" NAME="PLB_rdPrim" SIGNAME="plb_v46_0_PLB_rdPrim"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPrim" DIR="I" MPD_INDEX="15" NAME="PLB_wrPrim" SIGNAME="plb_v46_0_PLB_wrPrim"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_masterID" DIR="I" MPD_INDEX="16" NAME="PLB_masterID" SIGNAME="plb_v46_0_PLB_masterID" VECFORMULA="[0:(C_SPLB_MID_WIDTH-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_abort" DIR="I" MPD_INDEX="17" NAME="PLB_abort" SIGNAME="plb_v46_0_PLB_abort"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_busLock" DIR="I" MPD_INDEX="18" NAME="PLB_busLock" SIGNAME="plb_v46_0_PLB_busLock"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_RNW" DIR="I" MPD_INDEX="19" NAME="PLB_RNW" SIGNAME="plb_v46_0_PLB_RNW"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_BE" DIR="I" MPD_INDEX="20" NAME="PLB_BE" SIGNAME="plb_v46_0_PLB_BE" VECFORMULA="[0:((C_SPLB_DWIDTH/8)-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_MSize" DIR="I" MPD_INDEX="21" NAME="PLB_MSize" SIGNAME="plb_v46_0_PLB_MSize" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_size" DIR="I" MPD_INDEX="22" NAME="PLB_size" SIGNAME="plb_v46_0_PLB_size" VECFORMULA="[0:3]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_type" DIR="I" MPD_INDEX="23" NAME="PLB_type" SIGNAME="plb_v46_0_PLB_type" VECFORMULA="[0:2]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_lockErr" DIR="I" MPD_INDEX="24" NAME="PLB_lockErr" SIGNAME="plb_v46_0_PLB_lockErr"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrDBus" DIR="I" MPD_INDEX="25" NAME="PLB_wrDBus" SIGNAME="plb_v46_0_PLB_wrDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrBurst" DIR="I" MPD_INDEX="26" NAME="PLB_wrBurst" SIGNAME="plb_v46_0_PLB_wrBurst"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdBurst" DIR="I" MPD_INDEX="27" NAME="PLB_rdBurst" SIGNAME="plb_v46_0_PLB_rdBurst"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendReq" DIR="I" MPD_INDEX="28" NAME="PLB_wrPendReq" SIGNAME="plb_v46_0_PLB_wrPendReq"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendReq" DIR="I" MPD_INDEX="29" NAME="PLB_rdPendReq" SIGNAME="plb_v46_0_PLB_rdPendReq"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendPri" DIR="I" MPD_INDEX="30" NAME="PLB_wrPendPri" SIGNAME="plb_v46_0_PLB_wrPendPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendPri" DIR="I" MPD_INDEX="31" NAME="PLB_rdPendPri" SIGNAME="plb_v46_0_PLB_rdPendPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_reqPri" DIR="I" MPD_INDEX="32" NAME="PLB_reqPri" SIGNAME="plb_v46_0_PLB_reqPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_TAttribute" DIR="I" MPD_INDEX="33" NAME="PLB_TAttribute" SIGNAME="plb_v46_0_PLB_TAttribute" VECFORMULA="[0:15]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_addrAck" DIR="O" MPD_INDEX="34" NAME="Sl_addrAck" SIGNAME="plb_v46_0_Sl_addrAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_SSize" DIR="O" MPD_INDEX="35" NAME="Sl_SSize" SIGNAME="plb_v46_0_Sl_SSize" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wait" DIR="O" MPD_INDEX="36" NAME="Sl_wait" SIGNAME="plb_v46_0_Sl_wait"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rearbitrate" DIR="O" MPD_INDEX="37" NAME="Sl_rearbitrate" SIGNAME="plb_v46_0_Sl_rearbitrate"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrDAck" DIR="O" MPD_INDEX="38" NAME="Sl_wrDAck" SIGNAME="plb_v46_0_Sl_wrDAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrComp" DIR="O" MPD_INDEX="39" NAME="Sl_wrComp" SIGNAME="plb_v46_0_Sl_wrComp"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrBTerm" DIR="O" MPD_INDEX="40" NAME="Sl_wrBTerm" SIGNAME="plb_v46_0_Sl_wrBTerm"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDBus" DIR="O" MPD_INDEX="41" NAME="Sl_rdDBus" SIGNAME="plb_v46_0_Sl_rdDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdWdAddr" DIR="O" MPD_INDEX="42" NAME="Sl_rdWdAddr" SIGNAME="plb_v46_0_Sl_rdWdAddr" VECFORMULA="[0:3]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDAck" DIR="O" MPD_INDEX="43" NAME="Sl_rdDAck" SIGNAME="plb_v46_0_Sl_rdDAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdComp" DIR="O" MPD_INDEX="44" NAME="Sl_rdComp" SIGNAME="plb_v46_0_Sl_rdComp"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdBTerm" DIR="O" MPD_INDEX="45" NAME="Sl_rdBTerm" SIGNAME="plb_v46_0_Sl_rdBTerm"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MBusy" DIR="O" MPD_INDEX="46" NAME="Sl_MBusy" SIGNAME="plb_v46_0_Sl_MBusy" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MWrErr" DIR="O" MPD_INDEX="47" NAME="Sl_MWrErr" SIGNAME="plb_v46_0_Sl_MWrErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MRdErr" DIR="O" MPD_INDEX="48" NAME="Sl_MRdErr" SIGNAME="plb_v46_0_Sl_MRdErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MIRQ" DIR="O" MPD_INDEX="49" NAME="Sl_MIRQ" SIGNAME="plb_v46_0_Sl_MIRQ" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<BUSINTERFACE BUSNAME="plb_v46_0" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_INMHS="TRUE" MPD_INDEX="0" NAME="SPLB" TYPE="SLAVE"/>
</MODULE>
<MODULE HWVERSION="3.00.a" INSTANCE="SRAM" IPTYPE="PERIPHERAL" MHS_INDEX="10" MODCLASS="MEMORY_CNTLR" MODTYPE="xps_mch_emc">
<DESCRIPTION TYPE="SHORT">XPS Multi-Channel External Memory Controller(SRAM/Flash)</DESCRIPTION>
<DESCRIPTION TYPE="LONG">Xilinx Multi-CHannel (MCH) PLBV46 external memory controller</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/xps_mch_emc_v3_00_a/doc/xps_mch_emc.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETER MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="virtex5">
<DESCRIPTION>Device Family</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="1" NAME="C_NUM_BANKS_MEM" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Number of Memory Banks </DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="2" NAME="C_NUM_CHANNELS" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Number of MCH Channels </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="3" NAME="C_PRIORITY_MODE" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Arbitration Mode Between PLB and MCH Interface </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="4" NAME="C_INCLUDE_PLB_IPIF" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Include PLB Slave Interface </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="5" NAME="C_INCLUDE_WRBUF" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Include Write Buffer</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="6" NAME="C_SPLB_MID_WIDTH" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Master ID Bus Width of PLB</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="7" NAME="C_SPLB_NUM_MASTERS" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Number of PLB Masters</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="8" NAME="C_SPLB_P2P" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>PLB Slave Uses P2P Topology</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="9" NAME="C_SPLB_DWIDTH" TYPE="INTEGER" VALUE="128">
<DESCRIPTION>PLB Data Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="10" NAME="C_MCH_SPLB_AWIDTH" TYPE="INTEGER" VALUE="32">
<DESCRIPTION>MCH and PLB Address Bus Width </DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="11" NAME="C_SPLB_SMALLEST_MASTER" TYPE="INTEGER" VALUE="128">
<DESCRIPTION>Smallest Master Data Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="12" NAME="C_MCH_NATIVE_DWIDTH" TYPE="INTEGER" VALUE="32">
<DESCRIPTION>Data Bus Width of MCH</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="13" NAME="C_MCH_SPLB_CLK_PERIOD_PS" TYPE="INTEGER" VALUE="8000">
<DESCRIPTION>MCH and PLB Clock Period </DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" CHANGEDBY="USER" MPD_INDEX="14" NAME="C_MEM0_BASEADDR" TYPE="std_logic_vector" VALUE="0xf8000000">
<DESCRIPTION>Base Address of Bank 0 </DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" CHANGEDBY="USER" MPD_INDEX="15" NAME="C_MEM0_HIGHADDR" TYPE="std_logic_vector" VALUE="0xf80fffff">
<DESCRIPTION>High Address of Bank 0 </DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" MPD_INDEX="16" NAME="C_MEM1_BASEADDR" TYPE="std_logic_vector" VALUE="0xffffffff">
<DESCRIPTION>Base Address of Bank 1 </DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" MPD_INDEX="17" NAME="C_MEM1_HIGHADDR" TYPE="std_logic_vector" VALUE="0x00000000">
<DESCRIPTION>High Address of Bank 1 </DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" MPD_INDEX="18" NAME="C_MEM2_BASEADDR" TYPE="std_logic_vector" VALUE="0xffffffff">
<DESCRIPTION>Base Address of Bank 2 </DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" MPD_INDEX="19" NAME="C_MEM2_HIGHADDR" TYPE="std_logic_vector" VALUE="0x00000000">
<DESCRIPTION>High Address of Bank 2 </DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" MPD_INDEX="20" NAME="C_MEM3_BASEADDR" TYPE="std_logic_vector" VALUE="0xffffffff">
<DESCRIPTION>Base Address of Bank 3 </DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" MPD_INDEX="21" NAME="C_MEM3_HIGHADDR" TYPE="std_logic_vector" VALUE="0x00000000">
<DESCRIPTION>High Address of Bank 3 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="22" NAME="C_PAGEMODE_FLASH_0" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Page mode flash enable of Bank 0 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="23" NAME="C_PAGEMODE_FLASH_1" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Page mode flash enable of Bank 1 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="24" NAME="C_PAGEMODE_FLASH_2" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Page mode flash enable of Bank 2 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="25" NAME="C_PAGEMODE_FLASH_3" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Page mode flash enable of Bank 3 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="26" NAME="C_INCLUDE_NEGEDGE_IOREGS" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Use Falling Edge IO Register in Interface Signals </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="27" NAME="C_MEM0_WIDTH" TYPE="INTEGER" VALUE="32">
<DESCRIPTION>Data Bus Width of Bank 0 </DESCRIPTION>
<DESCRIPTION>Data Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="28" NAME="C_MEM1_WIDTH" TYPE="INTEGER" VALUE="32">
<DESCRIPTION>Data Bus Width of Bank 1 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="29" NAME="C_MEM2_WIDTH" TYPE="INTEGER" VALUE="32">
<DESCRIPTION>Data Bus Width of Bank 2 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="30" NAME="C_MEM3_WIDTH" TYPE="INTEGER" VALUE="32">
<DESCRIPTION>Data Bus Width of Bank 3 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="31" NAME="C_MAX_MEM_WIDTH" TYPE="INTEGER" VALUE="32">
<DESCRIPTION>Maximum Data Bus Width </DESCRIPTION>
<DESCRIPTION>Maximum Data Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="32" NAME="C_INCLUDE_DATAWIDTH_MATCHING_0" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Execute Multiple Memory Accesses To Match Bank 0 Data Bus Width To PLB Data Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="33" NAME="C_INCLUDE_DATAWIDTH_MATCHING_1" TYPE="INTEGER" VALUE="0">
<DESCRIPTION> Execute Multiple Memory Accesses To Match Bank 1 Data Bus Width To PLB Data Bus Width </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="34" NAME="C_INCLUDE_DATAWIDTH_MATCHING_2" TYPE="INTEGER" VALUE="0">
<DESCRIPTION> Execute Multiple Memory Accesses To Match Bank 2 Data Bus Width To PLB Data Bus Width </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="35" NAME="C_INCLUDE_DATAWIDTH_MATCHING_3" TYPE="INTEGER" VALUE="0">
<DESCRIPTION> Execute Multiple Memory Accesses To Match Bank 3 Data Bus Width To PLB Data Bus Width </DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="36" NAME="C_SYNCH_MEM_0" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Bank 0 is Synchronous </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="37" NAME="C_SYNCH_PIPEDELAY_0" TYPE="INTEGER" VALUE="2">
<DESCRIPTION>Pipeline Latency of Bank 0 </DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="38" NAME="C_TCEDV_PS_MEM_0" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>TCEDV of Bank 0 </DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="39" NAME="C_TAVDV_PS_MEM_0" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>TAVDV of Bank 0 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="40" NAME="C_TPACC_PS_FLASH_0" TYPE="INTEGER" VALUE="25000">
<DESCRIPTION>TPACC of Bank 0 </DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="41" NAME="C_THZCE_PS_MEM_0" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>THZCE of Bank 0 </DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="42" NAME="C_THZOE_PS_MEM_0" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>THZOE of Bank 0 </DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="43" NAME="C_TWC_PS_MEM_0" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>TWC of Bank 0 </DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="44" NAME="C_TWP_PS_MEM_0" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>TWP of Bank 0 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="45" NAME="C_TLZWE_PS_MEM_0" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>TLZWE of Bank 0 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="46" NAME="C_SYNCH_MEM_1" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Bank 1 is Synchronous </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="47" NAME="C_SYNCH_PIPEDELAY_1" TYPE="INTEGER" VALUE="2">
<DESCRIPTION>Pipeline Latency of Bank 1 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="48" NAME="C_TCEDV_PS_MEM_1" TYPE="INTEGER" VALUE="15000">
<DESCRIPTION>TCEDV of Bank 1 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="49" NAME="C_TAVDV_PS_MEM_1" TYPE="INTEGER" VALUE="15000">
<DESCRIPTION>TAVDV of Bank 1 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="50" NAME="C_TPACC_PS_FLASH_1" TYPE="INTEGER" VALUE="25000">
<DESCRIPTION>TPACC of Bank 1 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="51" NAME="C_THZCE_PS_MEM_1" TYPE="INTEGER" VALUE="7000">
<DESCRIPTION>THZCE of Bank 1 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="52" NAME="C_THZOE_PS_MEM_1" TYPE="INTEGER" VALUE="7000">
<DESCRIPTION>THZOE of Bank 1 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="53" NAME="C_TWC_PS_MEM_1" TYPE="INTEGER" VALUE="15000">
<DESCRIPTION>TWC of Bank 1 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="54" NAME="C_TWP_PS_MEM_1" TYPE="INTEGER" VALUE="12000">
<DESCRIPTION>TWP of Bank 1 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="55" NAME="C_TLZWE_PS_MEM_1" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>TLZWE of Bank 1 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="56" NAME="C_SYNCH_MEM_2" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Bank 2 is Synchronous </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="57" NAME="C_SYNCH_PIPEDELAY_2" TYPE="INTEGER" VALUE="2">
<DESCRIPTION>Pipeline Latency of Bank 2 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="58" NAME="C_TCEDV_PS_MEM_2" TYPE="INTEGER" VALUE="15000">
<DESCRIPTION>TCEDV of Bank 2 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="59" NAME="C_TAVDV_PS_MEM_2" TYPE="INTEGER" VALUE="15000">
<DESCRIPTION>TAVDV of Bank 2 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="60" NAME="C_TPACC_PS_FLASH_2" TYPE="INTEGER" VALUE="25000">
<DESCRIPTION>TPACC of Bank 2 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="61" NAME="C_THZCE_PS_MEM_2" TYPE="INTEGER" VALUE="7000">
<DESCRIPTION>THZCE of Bank 2 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="62" NAME="C_THZOE_PS_MEM_2" TYPE="INTEGER" VALUE="7000">
<DESCRIPTION>THZOE of Bank 2 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="63" NAME="C_TWC_PS_MEM_2" TYPE="INTEGER" VALUE="15000">
<DESCRIPTION>TWC of Bank 2 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="64" NAME="C_TWP_PS_MEM_2" TYPE="INTEGER" VALUE="12000">
<DESCRIPTION>TWP of Bank 2 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="65" NAME="C_TLZWE_PS_MEM_2" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>TLZWE of Bank 2 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="66" NAME="C_SYNCH_MEM_3" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Bank 3 is Synchronous </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="67" NAME="C_SYNCH_PIPEDELAY_3" TYPE="INTEGER" VALUE="2">
<DESCRIPTION>Pipeline Latency of Bank 3 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="68" NAME="C_TCEDV_PS_MEM_3" TYPE="INTEGER" VALUE="15000">
<DESCRIPTION>TCEDV of Bank 3 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="69" NAME="C_TAVDV_PS_MEM_3" TYPE="INTEGER" VALUE="15000">
<DESCRIPTION>TAVDV of Bank 3 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="70" NAME="C_TPACC_PS_FLASH_3" TYPE="INTEGER" VALUE="25000">
<DESCRIPTION>TPACC of Bank 3 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="71" NAME="C_THZCE_PS_MEM_3" TYPE="INTEGER" VALUE="7000">
<DESCRIPTION>THZCE of Bank 3 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="72" NAME="C_THZOE_PS_MEM_3" TYPE="INTEGER" VALUE="7000">
<DESCRIPTION>THZOE of Bank 3 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="73" NAME="C_TWC_PS_MEM_3" TYPE="INTEGER" VALUE="15000">
<DESCRIPTION>TWC of Bank 3 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="74" NAME="C_TWP_PS_MEM_3" TYPE="INTEGER" VALUE="12000">
<DESCRIPTION>TWP of Bank 3 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="75" NAME="C_TLZWE_PS_MEM_3" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>TLZWE of Bank 3 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="76" NAME="C_MCH0_PROTOCOL" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Interface Protocol of Ch 0 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="77" NAME="C_MCH0_ACCESSBUF_DEPTH" TYPE="INTEGER" VALUE="16">
<DESCRIPTION>Depth of Access Buffer of Ch 0 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="78" NAME="C_MCH0_RDDATABUF_DEPTH" TYPE="INTEGER" VALUE="16">
<DESCRIPTION>Depth of Read Data Buffer Depath of Ch 0 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="79" NAME="C_MCH1_PROTOCOL" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Interface Protocol of Ch 1 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="80" NAME="C_MCH1_ACCESSBUF_DEPTH" TYPE="INTEGER" VALUE="16">
<DESCRIPTION>Depth of Access Buffer of Ch 1 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="81" NAME="C_MCH1_RDDATABUF_DEPTH" TYPE="INTEGER" VALUE="16">
<DESCRIPTION>Depth of Read Data Buffer of Ch 1 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="82" NAME="C_MCH2_PROTOCOL" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Interface Protocol of Ch 2 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="83" NAME="C_MCH2_ACCESSBUF_DEPTH" TYPE="INTEGER" VALUE="16">
<DESCRIPTION>Depth of Access Buffer of Ch 2 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="84" NAME="C_MCH2_RDDATABUF_DEPTH" TYPE="INTEGER" VALUE="16">
<DESCRIPTION>Depth of Read Data Buffer of Ch 2 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="85" NAME="C_MCH3_PROTOCOL" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Interface Protocol of Ch 3 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="86" NAME="C_MCH3_ACCESSBUF_DEPTH" TYPE="INTEGER" VALUE="16">
<DESCRIPTION>Depth of Access Buffer of Ch 3 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="87" NAME="C_MCH3_RDDATABUF_DEPTH" TYPE="INTEGER" VALUE="16">
<DESCRIPTION>Depth of Read Data Buffer of Ch 3 </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="88" NAME="C_XCL0_LINESIZE" TYPE="INTEGER" VALUE="4">
<DESCRIPTION>Cacheline Size of Ch0</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="89" NAME="C_XCL0_WRITEXFER" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Write Transfer Type of Ch0</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="90" NAME="C_XCL1_LINESIZE" TYPE="INTEGER" VALUE="4">
<DESCRIPTION>Cacheline Size of Ch1</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="91" NAME="C_XCL1_WRITEXFER" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Write Transfer Type of Ch1</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="92" NAME="C_XCL2_LINESIZE" TYPE="INTEGER" VALUE="4">
<DESCRIPTION>Cacheline Size of Ch2</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="93" NAME="C_XCL2_WRITEXFER" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Write Transfer Type of Ch2</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="94" NAME="C_XCL3_LINESIZE" TYPE="INTEGER" VALUE="4">
<DESCRIPTION>Cacheline Size of Ch3</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="95" NAME="C_XCL3_WRITEXFER" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Write Transfer Type of Ch3</DESCRIPTION>
</PARAMETER>
<MEMORYMAP>
<MEMRANGE BASEDECIMAL="4160749568" BASENAME="C_MEM0_BASEADDR" BASEVALUE="0xf8000000" HIGHDECIMAL="4161798143" HIGHNAME="C_MEM0_HIGHADDR" HIGHVALUE="0xf80fffff" IS_CACHEABLE="TRUE" MEMTYPE="MEMORY" SIZE="1048576" SIZEABRV="1M">
<SLVINTERFACES>
<BUSINTERFACE NAME="SPLB"/>
<BUSINTERFACE NAME="MCH0"/>
<BUSINTERFACE NAME="MCH1"/>
<BUSINTERFACE NAME="MCH2"/>
<BUSINTERFACE NAME="MCH3"/>
</SLVINTERFACES>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_MEM1_BASEADDR" BASEVALUE="0xffffffff" HIGHDECIMAL="0" HIGHNAME="C_MEM1_HIGHADDR" HIGHVALUE="0x00000000" IS_CACHEABLE="TRUE" IS_VALID="FALSE" MEMTYPE="MEMORY" SIZE="0" SIZEABRV="U">
<SLVINTERFACES>
<BUSINTERFACE NAME="SPLB"/>
<BUSINTERFACE NAME="MCH0"/>
<BUSINTERFACE NAME="MCH1"/>
<BUSINTERFACE NAME="MCH2"/>
<BUSINTERFACE NAME="MCH3"/>
</SLVINTERFACES>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_MEM2_BASEADDR" BASEVALUE="0xffffffff" HIGHDECIMAL="0" HIGHNAME="C_MEM2_HIGHADDR" HIGHVALUE="0x00000000" IS_CACHEABLE="TRUE" IS_VALID="FALSE" MEMTYPE="MEMORY" SIZE="0" SIZEABRV="U">
<SLVINTERFACES>
<BUSINTERFACE NAME="SPLB"/>
<BUSINTERFACE NAME="MCH0"/>
<BUSINTERFACE NAME="MCH1"/>
<BUSINTERFACE NAME="MCH2"/>
<BUSINTERFACE NAME="MCH3"/>
</SLVINTERFACES>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_MEM3_BASEADDR" BASEVALUE="0xffffffff" HIGHDECIMAL="0" HIGHNAME="C_MEM3_HIGHADDR" HIGHVALUE="0x00000000" IS_CACHEABLE="TRUE" IS_VALID="FALSE" MEMTYPE="MEMORY" SIZE="0" SIZEABRV="U">
<SLVINTERFACES>
<BUSINTERFACE NAME="SPLB"/>
<BUSINTERFACE NAME="MCH0"/>
<BUSINTERFACE NAME="MCH1"/>
<BUSINTERFACE NAME="MCH2"/>
<BUSINTERFACE NAME="MCH3"/>
</SLVINTERFACES>
</MEMRANGE>
</MEMORYMAP>
<PORT CLKFREQUENCY="125000000" DIR="I" IS_INMHS="TRUE" MHS_INDEX="0" MPD_INDEX="1" NAME="RdClk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
<PORT DIR="O" ENDIAN="BIG" IS_INMHS="TRUE" LSB="0" MHS_INDEX="1" MPD_INDEX="78" MSB="31" NAME="Mem_A" SIGNAME="0b0000000 &amp; fpga_0_SRAM_Mem_A_pin_vslice_7_30_concat &amp; 0b0" VECFORMULA="[0:(C_MCH_SPLB_AWIDTH-1)]">
<DESCRIPTION>Memory Address Bus</DESCRIPTION>
</PORT>
<PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="2" MPD_INDEX="80" NAME="Mem_CEN" SIGNAME="fpga_0_SRAM_Mem_CEN_pin" VECFORMULA="[0:(C_NUM_BANKS_MEM-1)]">
<DESCRIPTION>Memory Chip Enable Active Low</DESCRIPTION>
</PORT>
<PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="3" MPD_INDEX="81" NAME="Mem_OEN" SIGNAME="fpga_0_SRAM_Mem_OEN_pin" VECFORMULA="[0:(C_NUM_BANKS_MEM-1)]">
<DESCRIPTION>Memory Output Enable</DESCRIPTION>
</PORT>
<PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="4" MPD_INDEX="82" NAME="Mem_WEN" SIGNAME="fpga_0_SRAM_Mem_WEN_pin">
<DESCRIPTION>Memory Write Enable</DESCRIPTION>
</PORT>
<PORT DIR="O" ENDIAN="BIG" IS_INMHS="TRUE" LSB="0" MHS_INDEX="5" MPD_INDEX="84" MSB="3" NAME="Mem_BEN" SIGNAME="fpga_0_SRAM_Mem_BEN_pin" VECFORMULA="[0:((C_MAX_MEM_WIDTH/8)-1)]">
<DESCRIPTION>Memory Byte Enable</DESCRIPTION>
</PORT>
<PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="6" MPD_INDEX="86" NAME="Mem_ADV_LDN" SIGNAME="fpga_0_SRAM_Mem_ADV_LDN_pin">
<DESCRIPTION>Memory Advanced Burst Address/Load New Address</DESCRIPTION>
</PORT>
<PORT DIR="IO" ENDIAN="BIG" IS_INMHS="TRUE" LSB="0" MHS_INDEX="7" MPD_INDEX="90" MSB="31" NAME="Mem_DQ" SIGNAME="fpga_0_SRAM_Mem_DQ_pin" VECFORMULA="[0:(C_MAX_MEM_WIDTH-1)]">
<DESCRIPTION>Memory Data Bus</DESCRIPTION>
</PORT>
<PORT BUS="SPLB" CLKFREQUENCY="125000000" DEF_SIGNAME="clk_125_0000MHzPLL0_ADJUST" DIR="I" MPD_INDEX="0" NAME="MCH_SPLB_Clk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_SPLB_Rst" DIR="I" MPD_INDEX="2" NAME="MCH_SPLB_Rst" SIGIS="RST" SIGNAME="plb_v46_0_SPLB_Rst"/>
<PORT BUS="MCH0" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="3" NAME="MCH0_Access_Control" SIGNAME="__NOC__"/>
<PORT BUS="MCH0" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="4" NAME="MCH0_Access_Data" SIGNAME="__NOC__" VECFORMULA="[0:(C_MCH_NATIVE_DWIDTH-1)]"/>
<PORT BUS="MCH0" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="5" NAME="MCH0_Access_Write" SIGNAME="__NOC__"/>
<PORT BUS="MCH0" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="6" NAME="MCH0_Access_Full" SIGNAME="__NOC__"/>
<PORT BUS="MCH0" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="7" NAME="MCH0_ReadData_Control" SIGNAME="__NOC__"/>
<PORT BUS="MCH0" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="8" NAME="MCH0_ReadData_Data" SIGNAME="__NOC__" VECFORMULA="[0:(C_MCH_NATIVE_DWIDTH-1)]"/>
<PORT BUS="MCH0" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="9" NAME="MCH0_ReadData_Read" SIGNAME="__NOC__"/>
<PORT BUS="MCH0" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="10" NAME="MCH0_ReadData_Exists" SIGNAME="__NOC__"/>
<PORT BUS="MCH1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="11" NAME="MCH1_Access_Control" SIGNAME="__NOC__"/>
<PORT BUS="MCH1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="12" NAME="MCH1_Access_Data" SIGNAME="__NOC__" VECFORMULA="[0:(C_MCH_NATIVE_DWIDTH-1)]"/>
<PORT BUS="MCH1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="13" NAME="MCH1_Access_Write" SIGNAME="__NOC__"/>
<PORT BUS="MCH1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="14" NAME="MCH1_Access_Full" SIGNAME="__NOC__"/>
<PORT BUS="MCH1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="15" NAME="MCH1_ReadData_Control" SIGNAME="__NOC__"/>
<PORT BUS="MCH1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="16" NAME="MCH1_ReadData_Data" SIGNAME="__NOC__" VECFORMULA="[0:(C_MCH_NATIVE_DWIDTH-1)]"/>
<PORT BUS="MCH1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="17" NAME="MCH1_ReadData_Read" SIGNAME="__NOC__"/>
<PORT BUS="MCH1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="18" NAME="MCH1_ReadData_Exists" SIGNAME="__NOC__"/>
<PORT BUS="MCH2" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="19" NAME="MCH2_Access_Control" SIGNAME="__NOC__"/>
<PORT BUS="MCH2" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="20" NAME="MCH2_Access_Data" SIGNAME="__NOC__" VECFORMULA="[0:(C_MCH_NATIVE_DWIDTH-1)]"/>
<PORT BUS="MCH2" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="21" NAME="MCH2_Access_Write" SIGNAME="__NOC__"/>
<PORT BUS="MCH2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="22" NAME="MCH2_Access_Full" SIGNAME="__NOC__"/>
<PORT BUS="MCH2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="23" NAME="MCH2_ReadData_Control" SIGNAME="__NOC__"/>
<PORT BUS="MCH2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="24" NAME="MCH2_ReadData_Data" SIGNAME="__NOC__" VECFORMULA="[0:(C_MCH_NATIVE_DWIDTH-1)]"/>
<PORT BUS="MCH2" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="25" NAME="MCH2_ReadData_Read" SIGNAME="__NOC__"/>
<PORT BUS="MCH2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="26" NAME="MCH2_ReadData_Exists" SIGNAME="__NOC__"/>
<PORT BUS="MCH3" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="27" NAME="MCH3_Access_Control" SIGNAME="__NOC__"/>
<PORT BUS="MCH3" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="28" NAME="MCH3_Access_Data" SIGNAME="__NOC__" VECFORMULA="[0:(C_MCH_NATIVE_DWIDTH-1)]"/>
<PORT BUS="MCH3" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="29" NAME="MCH3_Access_Write" SIGNAME="__NOC__"/>
<PORT BUS="MCH3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="30" NAME="MCH3_Access_Full" SIGNAME="__NOC__"/>
<PORT BUS="MCH3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="31" NAME="MCH3_ReadData_Control" SIGNAME="__NOC__"/>
<PORT BUS="MCH3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="32" NAME="MCH3_ReadData_Data" SIGNAME="__NOC__" VECFORMULA="[0:(C_MCH_NATIVE_DWIDTH-1)]"/>
<PORT BUS="MCH3" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="33" NAME="MCH3_ReadData_Read" SIGNAME="__NOC__"/>
<PORT BUS="MCH3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="34" NAME="MCH3_ReadData_Exists" SIGNAME="__NOC__"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_ABus" DIR="I" MPD_INDEX="35" NAME="PLB_ABus" SIGNAME="plb_v46_0_PLB_ABus" VECFORMULA="[0:31]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_UABus" DIR="I" MPD_INDEX="36" NAME="PLB_UABus" SIGNAME="plb_v46_0_PLB_UABus" VECFORMULA="[0:31]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_PAValid" DIR="I" MPD_INDEX="37" NAME="PLB_PAValid" SIGNAME="plb_v46_0_PLB_PAValid"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_SAValid" DIR="I" MPD_INDEX="38" NAME="PLB_SAValid" SIGNAME="plb_v46_0_PLB_SAValid"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPrim" DIR="I" MPD_INDEX="39" NAME="PLB_rdPrim" SIGNAME="plb_v46_0_PLB_rdPrim"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPrim" DIR="I" MPD_INDEX="40" NAME="PLB_wrPrim" SIGNAME="plb_v46_0_PLB_wrPrim"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_masterID" DIR="I" MPD_INDEX="41" NAME="PLB_masterID" SIGNAME="plb_v46_0_PLB_masterID" VECFORMULA="[0:(C_SPLB_MID_WIDTH-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_abort" DIR="I" MPD_INDEX="42" NAME="PLB_abort" SIGNAME="plb_v46_0_PLB_abort"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_busLock" DIR="I" MPD_INDEX="43" NAME="PLB_busLock" SIGNAME="plb_v46_0_PLB_busLock"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_RNW" DIR="I" MPD_INDEX="44" NAME="PLB_RNW" SIGNAME="plb_v46_0_PLB_RNW"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_BE" DIR="I" MPD_INDEX="45" NAME="PLB_BE" SIGNAME="plb_v46_0_PLB_BE" VECFORMULA="[0:((C_SPLB_DWIDTH/8)-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_MSize" DIR="I" MPD_INDEX="46" NAME="PLB_MSize" SIGNAME="plb_v46_0_PLB_MSize" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_size" DIR="I" MPD_INDEX="47" NAME="PLB_size" SIGNAME="plb_v46_0_PLB_size" VECFORMULA="[0:3]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_type" DIR="I" MPD_INDEX="48" NAME="PLB_type" SIGNAME="plb_v46_0_PLB_type" VECFORMULA="[0:2]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_lockErr" DIR="I" MPD_INDEX="49" NAME="PLB_lockErr" SIGNAME="plb_v46_0_PLB_lockErr"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrDBus" DIR="I" MPD_INDEX="50" NAME="PLB_wrDBus" SIGNAME="plb_v46_0_PLB_wrDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrBurst" DIR="I" MPD_INDEX="51" NAME="PLB_wrBurst" SIGNAME="plb_v46_0_PLB_wrBurst"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdBurst" DIR="I" MPD_INDEX="52" NAME="PLB_rdBurst" SIGNAME="plb_v46_0_PLB_rdBurst"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendReq" DIR="I" MPD_INDEX="53" NAME="PLB_wrPendReq" SIGNAME="plb_v46_0_PLB_wrPendReq"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendReq" DIR="I" MPD_INDEX="54" NAME="PLB_rdPendReq" SIGNAME="plb_v46_0_PLB_rdPendReq"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendPri" DIR="I" MPD_INDEX="55" NAME="PLB_wrPendPri" SIGNAME="plb_v46_0_PLB_wrPendPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendPri" DIR="I" MPD_INDEX="56" NAME="PLB_rdPendPri" SIGNAME="plb_v46_0_PLB_rdPendPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_reqPri" DIR="I" MPD_INDEX="57" NAME="PLB_reqPri" SIGNAME="plb_v46_0_PLB_reqPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_TAttribute" DIR="I" MPD_INDEX="58" NAME="PLB_TAttribute" SIGNAME="plb_v46_0_PLB_TAttribute" VECFORMULA="[0:15]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_addrAck" DIR="O" MPD_INDEX="59" NAME="Sl_addrAck" SIGNAME="plb_v46_0_Sl_addrAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_SSize" DIR="O" MPD_INDEX="60" NAME="Sl_SSize" SIGNAME="plb_v46_0_Sl_SSize" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wait" DIR="O" MPD_INDEX="61" NAME="Sl_wait" SIGNAME="plb_v46_0_Sl_wait"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rearbitrate" DIR="O" MPD_INDEX="62" NAME="Sl_rearbitrate" SIGNAME="plb_v46_0_Sl_rearbitrate"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrDAck" DIR="O" MPD_INDEX="63" NAME="Sl_wrDAck" SIGNAME="plb_v46_0_Sl_wrDAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrComp" DIR="O" MPD_INDEX="64" NAME="Sl_wrComp" SIGNAME="plb_v46_0_Sl_wrComp"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrBTerm" DIR="O" MPD_INDEX="65" NAME="Sl_wrBTerm" SIGNAME="plb_v46_0_Sl_wrBTerm"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDBus" DIR="O" MPD_INDEX="66" NAME="Sl_rdDBus" SIGNAME="plb_v46_0_Sl_rdDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdWdAddr" DIR="O" MPD_INDEX="67" NAME="Sl_rdWdAddr" SIGNAME="plb_v46_0_Sl_rdWdAddr" VECFORMULA="[0:3]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDAck" DIR="O" MPD_INDEX="68" NAME="Sl_rdDAck" SIGNAME="plb_v46_0_Sl_rdDAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdComp" DIR="O" MPD_INDEX="69" NAME="Sl_rdComp" SIGNAME="plb_v46_0_Sl_rdComp"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdBTerm" DIR="O" MPD_INDEX="70" NAME="Sl_rdBTerm" SIGNAME="plb_v46_0_Sl_rdBTerm"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MBusy" DIR="O" MPD_INDEX="71" NAME="Sl_MBusy" SIGNAME="plb_v46_0_Sl_MBusy" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MWrErr" DIR="O" MPD_INDEX="72" NAME="Sl_MWrErr" SIGNAME="plb_v46_0_Sl_MWrErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MRdErr" DIR="O" MPD_INDEX="73" NAME="Sl_MRdErr" SIGNAME="plb_v46_0_Sl_MRdErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MIRQ" DIR="O" MPD_INDEX="74" NAME="Sl_MIRQ" SIGNAME="plb_v46_0_Sl_MIRQ" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT DIR="I" MPD_INDEX="75" NAME="Mem_DQ_I" SIGNAME="__NOC__" VECFORMULA="[0:(C_MAX_MEM_WIDTH-1)]"/>
<PORT DIR="O" MPD_INDEX="76" NAME="Mem_DQ_O" SIGNAME="__NOC__" VECFORMULA="[0:(C_MAX_MEM_WIDTH-1)]"/>
<PORT DIR="O" MPD_INDEX="77" NAME="Mem_DQ_T" SIGNAME="__NOC__" VECFORMULA="[0:(C_MAX_MEM_WIDTH-1)]"/>
<PORT DIR="O" MPD_INDEX="79" NAME="Mem_RPN" SIGNAME="__NOC__">
<DESCRIPTION>Memory Reset/Power Down</DESCRIPTION>
</PORT>
<PORT DIR="O" MPD_INDEX="83" NAME="Mem_QWEN" SIGNAME="__NOC__" VECFORMULA="[0:((C_MAX_MEM_WIDTH/8)-1)]">
<DESCRIPTION>Memory Qualified Write Enable</DESCRIPTION>
</PORT>
<PORT DIR="O" MPD_INDEX="85" NAME="Mem_CE" SIGNAME="__NOC__" VECFORMULA="[0:(C_NUM_BANKS_MEM-1)]">
<DESCRIPTION>Memory Chip Enable Active High</DESCRIPTION>
</PORT>
<PORT DIR="O" MPD_INDEX="87" NAME="Mem_LBON" SIGNAME="__NOC__">
<DESCRIPTION>Memory Linear/Interleaved Burst Order</DESCRIPTION>
</PORT>
<PORT DIR="O" MPD_INDEX="88" NAME="Mem_CKEN" SIGNAME="__NOC__">
<DESCRIPTION>Memory Clock Enable</DESCRIPTION>
</PORT>
<PORT DIR="O" MPD_INDEX="89" NAME="Mem_RNW" SIGNAME="__NOC__">
<DESCRIPTION>Memory Read Not Write</DESCRIPTION>
</PORT>
<BUSINTERFACE BUSNAME="plb_v46_0" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_INMHS="TRUE" MPD_INDEX="0" NAME="SPLB" TYPE="SLAVE"/>
<BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_MEMORY_CHANNEL" IS_VALID="FALSE" MPD_INDEX="1" NAME="MCH0" TYPE="TARGET"/>
<BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_MEMORY_CHANNEL" IS_VALID="FALSE" MPD_INDEX="2" NAME="MCH1" TYPE="TARGET"/>
<BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_MEMORY_CHANNEL" IS_VALID="FALSE" MPD_INDEX="3" NAME="MCH2" TYPE="TARGET"/>
<BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_MEMORY_CHANNEL" IS_VALID="FALSE" MPD_INDEX="4" NAME="MCH3" TYPE="TARGET"/>
</MODULE>
<MODULE HWVERSION="3.00.b" INSTANCE="PCIe_Bridge" IPTYPE="PERIPHERAL" MHS_INDEX="11" MODCLASS="PERIPHERAL" MODTYPE="plbv46_pcie">
<DESCRIPTION TYPE="SHORT">PLBv46 IP Interface (IPIF) to LogicCORE PCI Express Bridge</DESCRIPTION>
<DESCRIPTION TYPE="LONG">Bridge between the PLBv46 IPIF and the Xilinx LogiCORE PCI Express Interface core</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/plbv46_pcie_v3_00_b/doc/plbv46_pcie.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETER MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="virtex5">
<DESCRIPTION>Device Family</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="1" NAME="C_IPIFBAR_NUM" TYPE="INTEGER" VALUE="2">
<DESCRIPTION>Number of IPIF devices</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="2" NAME="C_INCLUDE_BAROFFSET_REG" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Include Registers for Each IPIF BAR High-order Bits to be Substituted in Translation.</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="3" NAME="C_PCIBAR_NUM" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Number of PCI Devices</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="4" NAME="C_NO_OF_LANES" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Number of Lanes</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="5" NAME="C_DEVICE_ID" TYPE="std_logic_vector" VALUE="0x0505">
<DESCRIPTION>PCI Configuration Space Header Device ID</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="6" NAME="C_VENDOR_ID" TYPE="std_logic_vector" VALUE="0x10EE">
<DESCRIPTION>PCI Configuration Space Header Vendor ID</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="7" NAME="C_CLASS_CODE" TYPE="std_logic_vector" VALUE="0x058000">
<DESCRIPTION>PCI Configuration Space Header Class Code</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="8" NAME="C_REV_ID" TYPE="std_logic_vector" VALUE="0x00">
<DESCRIPTION>PCI Configuration Space Header Rev ID</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="9" NAME="C_SUBSYSTEM_ID" TYPE="std_logic_vector" VALUE="0x0000">
<DESCRIPTION>PCI Configuration Space Header Subsystem ID</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="10" NAME="C_SUBSYSTEM_VENDOR_ID" TYPE="std_logic_vector" VALUE="0x0000">
<DESCRIPTION>PCI Configuration Space Header Subsystem Vendor ID</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="11" NAME="C_COMP_TIMEOUT" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Completion Timeout</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="12" NAME="C_SUBFAMILY" TYPE="STRING" VALUE="fx">
<DESCRIPTION>Device Sub Family</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="13" NAME="C_MPLB_AWIDTH" TYPE="INTEGER" VALUE="32">
<DESCRIPTION>Master Address Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="14" NAME="C_MPLB_DWIDTH" TYPE="INTEGER" VALUE="128">
<DESCRIPTION>Master Data Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="15" NAME="C_MPLB_SMALLEST_SLAVE" TYPE="INTEGER" VALUE="128">
<DESCRIPTION>Smallest Master Data Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="16" NAME="C_MPLB_NATIVE_DWIDTH" TYPE="INTEGER" VALUE="64">
<DESCRIPTION>Native Data Bus Width of PLB Master</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="17" NAME="C_SPLB_MID_WIDTH" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Master ID Bus Width of PLB</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="18" NAME="C_SPLB_NUM_MASTERS" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Number of PLB Masters</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="19" NAME="C_SPLB_SMALLEST_MASTER" TYPE="INTEGER" VALUE="128">
<DESCRIPTION>Smallest Master Data Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="20" NAME="C_SPLB_AWIDTH" TYPE="INTEGER" VALUE="32">
<DESCRIPTION>PLB Address Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="21" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0x85c00000">
<DESCRIPTION>Base Address</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="22" NAME="C_HIGHADDR" TYPE="std_logic_vector" VALUE="0x85c0ffff">
<DESCRIPTION>High Address</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="23" NAME="C_SPLB_DWIDTH" TYPE="INTEGER" VALUE="128">
<DESCRIPTION>PLB Data Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="24" NAME="C_SPLB_NATIVE_DWIDTH" TYPE="INTEGER" VALUE="64">
<DESCRIPTION>Native Data Bus Width of PLB Slave</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="25" NAME="C_SPLB_P2P" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>PLB Slave Uses P2P Topology</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" CHANGEDBY="USER" MPD_INDEX="26" NAME="C_IPIFBAR_0" TYPE="std_logic_vector" VALUE="0xc0000000">
<DESCRIPTION>IPIF BAR0 Base Address</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" CHANGEDBY="USER" MPD_INDEX="27" NAME="C_IPIFBAR_1" TYPE="std_logic_vector" VALUE="0xe0000000">
<DESCRIPTION>IPIF BAR1 Base Address</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" MPD_INDEX="28" NAME="C_IPIFBAR_2" TYPE="std_logic_vector" VALUE="0xFFFFFFFF">
<DESCRIPTION>IPIF BAR2 Base Address</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" MPD_INDEX="29" NAME="C_IPIFBAR_3" TYPE="std_logic_vector" VALUE="0xFFFFFFFF">
<DESCRIPTION>IPIF BAR3 Base Address</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" MPD_INDEX="30" NAME="C_IPIFBAR_4" TYPE="std_logic_vector" VALUE="0xFFFFFFFF">
<DESCRIPTION>IPIF BAR4 Base Address</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" MPD_INDEX="31" NAME="C_IPIFBAR_5" TYPE="std_logic_vector" VALUE="0xFFFFFFFF">
<DESCRIPTION>IPIF BAR5 Base Address</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" CHANGEDBY="USER" MPD_INDEX="32" NAME="C_IPIFBAR_HIGHADDR_0" TYPE="std_logic_vector" VALUE="0xdfffffff">
<DESCRIPTION>IPIF BAR0 High Address</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" CHANGEDBY="USER" MPD_INDEX="33" NAME="C_IPIFBAR_HIGHADDR_1" TYPE="std_logic_vector" VALUE="0xefffffff">
<DESCRIPTION>IPIF BAR1 High Address</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" MPD_INDEX="34" NAME="C_IPIFBAR_HIGHADDR_2" TYPE="std_logic_vector" VALUE="0x00000000">
<DESCRIPTION>IPIF BAR2 High Address</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" MPD_INDEX="35" NAME="C_IPIFBAR_HIGHADDR_3" TYPE="std_logic_vector" VALUE="0x00000000">
<DESCRIPTION>IPIF BAR3 High Address</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" MPD_INDEX="36" NAME="C_IPIFBAR_HIGHADDR_4" TYPE="std_logic_vector" VALUE="0x00000000">
<DESCRIPTION>IPIF BAR4 High Address</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" MPD_INDEX="37" NAME="C_IPIFBAR_HIGHADDR_5" TYPE="std_logic_vector" VALUE="0x00000000">
<DESCRIPTION>IPIF BAR5 High Address</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="38" NAME="C_IPIFBAR2PCIBAR_0" TYPE="std_logic_vector" VALUE="0x00000000">
<DESCRIPTION>Remote PCI device BAR to which IPIF BAR0 is translated when configured with FIFOs
</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="39" NAME="C_IPIFBAR2PCIBAR_1" TYPE="std_logic_vector" VALUE="0x00000000">
<DESCRIPTION>Remote PCI device BAR to which IPIF BAR1 is translated when configured with FIFOs
</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="40" NAME="C_IPIFBAR2PCIBAR_2" TYPE="std_logic_vector" VALUE="0xFFFFFFFF">
<DESCRIPTION>Remote PCI device BAR to which IPIF BAR2 is translated when configured with FIFOs
</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="41" NAME="C_IPIFBAR2PCIBAR_3" TYPE="std_logic_vector" VALUE="0xFFFFFFFF">
<DESCRIPTION>Remote PCI device BAR to which IPIF BAR3 is translated when configured with FIFOs
</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="42" NAME="C_IPIFBAR2PCIBAR_4" TYPE="std_logic_vector" VALUE="0xFFFFFFFF">
<DESCRIPTION>Remote PCI device BAR to which IPIF BAR4 is translated when configured with FIFOs
</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="43" NAME="C_IPIFBAR2PCIBAR_5" TYPE="std_logic_vector" VALUE="0xFFFFFFFF">
<DESCRIPTION>Remote PCI device BAR to which IPIF BAR5 is translated when configured with FIFOs
</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="44" NAME="C_IPIFBAR_AS_0" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>IPIF BAR 0 Address Size</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="45" NAME="C_IPIFBAR_AS_1" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>IPIF BAR 1 Address Size</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="46" NAME="C_IPIFBAR_AS_2" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>IPIF BAR 2 Address Size</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="47" NAME="C_IPIFBAR_AS_3" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>IPIF BAR 3 Address Size</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="48" NAME="C_IPIFBAR_AS_4" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>IPIF BAR 4 Address Size</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="49" NAME="C_IPIFBAR_AS_5" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>IPIF BAR 5 Address Size</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="50" NAME="C_PCIBAR2IPIFBAR_0" TYPE="std_logic_vector" VALUE="0xf8000000">
<DESCRIPTION>Remote PLB device BAR to which PCI BAR0 is translated when configured with FIFOs</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="51" NAME="C_PCIBAR2IPIFBAR_1" TYPE="std_logic_vector" VALUE="0x00000000">
<DESCRIPTION>Remote PLB device BAR to which PCI BAR1 is translated when configured with FIFOs</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="52" NAME="C_PCIBAR2IPIFBAR_2" TYPE="std_logic_vector" VALUE="0xFFFFFFFF">
<DESCRIPTION>Remote PLB device BAR to which PCI BAR2 is translated when configured with FIFOs</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="53" NAME="C_PCIBAR_LEN_0" TYPE="INTEGER" VALUE="20">
<DESCRIPTION>Power of 2 defining the Size in Bytes of PCI BAR0 Space</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="54" NAME="C_PCIBAR_LEN_1" TYPE="INTEGER" VALUE="28">
<DESCRIPTION>Power of 2 defining the Size in Bytes of PCI BAR1 Space</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="55" NAME="C_PCIBAR_LEN_2" TYPE="INTEGER" VALUE="16">
<DESCRIPTION>Power of 2 defining the Size in Bytes of PCI BAR2 Space</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="56" NAME="C_BOARD" TYPE="STRING" VALUE="ml507">
<DESCRIPTION>Type of Board</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="57" NAME="C_DEVICE" TYPE="STRING" VALUE="5vfx70t">
<DESCRIPTION>Device Name</DESCRIPTION>
</PARAMETER>
<MEMORYMAP>
<MEMRANGE BASEDECIMAL="2243952640" BASENAME="C_BASEADDR" BASEVALUE="0x85c00000" HIGHDECIMAL="2244018175" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x85c0ffff" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
<SLVINTERFACES>
<BUSINTERFACE NAME="SPLB"/>
</SLVINTERFACES>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="3221225472" BASENAME="C_IPIFBAR_0" BASEVALUE="0xc0000000" HIGHDECIMAL="3758096383" HIGHNAME="C_IPIFBAR_HIGHADDR_0" HIGHVALUE="0xdfffffff" MEMTYPE="BRIDGE" SIZE="536870912" SIZEABRV="512M">
<SLVINTERFACES>
<BUSINTERFACE NAME="SPLB"/>
</SLVINTERFACES>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="3758096384" BASENAME="C_IPIFBAR_1" BASEVALUE="0xe0000000" HIGHDECIMAL="4026531839" HIGHNAME="C_IPIFBAR_HIGHADDR_1" HIGHVALUE="0xefffffff" MEMTYPE="BRIDGE" SIZE="268435456" SIZEABRV="256M">
<SLVINTERFACES>
<BUSINTERFACE NAME="SPLB"/>
</SLVINTERFACES>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_IPIFBAR_2" BASEVALUE="0xFFFFFFFF" HIGHDECIMAL="0" HIGHNAME="C_IPIFBAR_HIGHADDR_2" HIGHVALUE="0x00000000" IS_VALID="FALSE" MEMTYPE="BRIDGE" SIZE="0" SIZEABRV="U">
<SLVINTERFACES>
<BUSINTERFACE NAME="SPLB"/>
</SLVINTERFACES>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_IPIFBAR_3" BASEVALUE="0xFFFFFFFF" HIGHDECIMAL="0" HIGHNAME="C_IPIFBAR_HIGHADDR_3" HIGHVALUE="0x00000000" IS_VALID="FALSE" MEMTYPE="BRIDGE" SIZE="0" SIZEABRV="U">
<SLVINTERFACES>
<BUSINTERFACE NAME="SPLB"/>
</SLVINTERFACES>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_IPIFBAR_4" BASEVALUE="0xFFFFFFFF" HIGHDECIMAL="0" HIGHNAME="C_IPIFBAR_HIGHADDR_4" HIGHVALUE="0x00000000" IS_VALID="FALSE" MEMTYPE="BRIDGE" SIZE="0" SIZEABRV="U">
<SLVINTERFACES>
<BUSINTERFACE NAME="SPLB"/>
</SLVINTERFACES>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_IPIFBAR_5" BASEVALUE="0xFFFFFFFF" HIGHDECIMAL="0" HIGHNAME="C_IPIFBAR_HIGHADDR_5" HIGHVALUE="0x00000000" IS_VALID="FALSE" MEMTYPE="BRIDGE" SIZE="0" SIZEABRV="U">
<SLVINTERFACES>
<BUSINTERFACE NAME="SPLB"/>
</SLVINTERFACES>
</MEMRANGE>
</MEMORYMAP>
<PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="0" MPD_INDEX="74" NAME="PERSTN" SIGNAME="net_vcc"/>
<PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="1" MPD_INDEX="75" NAME="REFCLK" SIGNAME="PCIe_Diff_Clk"/>
<PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="2" MPD_INDEX="78" NAME="RXN" SIGNAME="fpga_0_PCIe_Bridge_RXN_pin" VECFORMULA="[(C_NO_OF_LANES-1):0]"/>
<PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="3" MPD_INDEX="79" NAME="RXP" SIGNAME="fpga_0_PCIe_Bridge_RXP_pin" VECFORMULA="[(C_NO_OF_LANES-1):0]"/>
<PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="4" MPD_INDEX="80" NAME="TXN" SIGNAME="fpga_0_PCIe_Bridge_TXN_pin" VECFORMULA="[(C_NO_OF_LANES-1):0]"/>
<PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="5" MPD_INDEX="81" NAME="TXP" SIGNAME="fpga_0_PCIe_Bridge_TXP_pin" VECFORMULA="[(C_NO_OF_LANES-1):0]"/>
<PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="6" MPD_INDEX="83" NAME="MSI_request" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="net_gnd"/>
<PORT BUS="MPLB" CLKFREQUENCY="125000000" DEF_SIGNAME="clk_125_0000MHzPLL0_ADJUST" DIR="I" MPD_INDEX="0" NAME="MPLB_Clk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
<PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_MPLB_Rst" DIR="I" MPD_INDEX="1" NAME="MPLB_Rst" SIGIS="RST" SIGNAME="ppc440_0_SPLB0_MPLB_Rst"/>
<PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_PLB_MTimeout" DIR="I" MPD_INDEX="2" NAME="PLB_MTimeout" SIGNAME="ppc440_0_SPLB0_PLB_MTimeout"/>
<PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_PLB_MIRQ" DIR="I" MPD_INDEX="3" NAME="PLB_MIRQ" SIGNAME="ppc440_0_SPLB0_PLB_MIRQ"/>
<PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_PLB_MAddrAck" DIR="I" MPD_INDEX="4" NAME="PLB_MAddrAck" SIGNAME="ppc440_0_SPLB0_PLB_MAddrAck"/>
<PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_PLB_MSSize" DIR="I" MPD_INDEX="5" NAME="PLB_MSSize" SIGNAME="ppc440_0_SPLB0_PLB_MSSize" VECFORMULA="[0:1]"/>
<PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_PLB_MRearbitrate" DIR="I" MPD_INDEX="6" NAME="PLB_MRearbitrate" SIGNAME="ppc440_0_SPLB0_PLB_MRearbitrate"/>
<PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_PLB_MBusy" DIR="I" MPD_INDEX="7" NAME="PLB_MBusy" SIGNAME="ppc440_0_SPLB0_PLB_MBusy"/>
<PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_PLB_MRdErr" DIR="I" MPD_INDEX="8" NAME="PLB_MRdErr" SIGNAME="ppc440_0_SPLB0_PLB_MRdErr"/>
<PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_PLB_MWrErr" DIR="I" MPD_INDEX="9" NAME="PLB_MWrErr" SIGNAME="ppc440_0_SPLB0_PLB_MWrErr"/>
<PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_PLB_MWrDAck" DIR="I" MPD_INDEX="10" NAME="PLB_MWrDAck" SIGNAME="ppc440_0_SPLB0_PLB_MWrDAck"/>
<PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_PLB_MRdDBus" DIR="I" MPD_INDEX="11" NAME="PLB_MRdDBus" SIGNAME="ppc440_0_SPLB0_PLB_MRdDBus" VECFORMULA="[0:(C_MPLB_DWIDTH-1)]"/>
<PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_PLB_MRdWdAddr" DIR="I" MPD_INDEX="12" NAME="PLB_MRdWdAddr" SIGNAME="ppc440_0_SPLB0_PLB_MRdWdAddr" VECFORMULA="[0:3]"/>
<PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_PLB_MRdDAck" DIR="I" MPD_INDEX="13" NAME="PLB_MRdDAck" SIGNAME="ppc440_0_SPLB0_PLB_MRdDAck"/>
<PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_PLB_MRdBTerm" DIR="I" MPD_INDEX="14" NAME="PLB_MRdBTerm" SIGNAME="ppc440_0_SPLB0_PLB_MRdBTerm"/>
<PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_PLB_MWrBTerm" DIR="I" MPD_INDEX="15" NAME="PLB_MWrBTerm" SIGNAME="ppc440_0_SPLB0_PLB_MWrBTerm"/>
<PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_M_request" DIR="O" MPD_INDEX="16" NAME="M_request" SIGNAME="ppc440_0_SPLB0_M_request"/>
<PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_M_priority" DIR="O" MPD_INDEX="17" NAME="M_priority" SIGNAME="ppc440_0_SPLB0_M_priority" VECFORMULA="[0:1]"/>
<PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_M_busLock" DIR="O" MPD_INDEX="18" NAME="M_buslock" SIGNAME="ppc440_0_SPLB0_M_busLock"/>
<PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_M_RNW" DIR="O" MPD_INDEX="19" NAME="M_RNW" SIGNAME="ppc440_0_SPLB0_M_RNW"/>
<PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_M_BE" DIR="O" MPD_INDEX="20" NAME="M_BE" SIGNAME="ppc440_0_SPLB0_M_BE" VECFORMULA="[0:((C_MPLB_DWIDTH/8)-1)]"/>
<PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_M_MSize" DIR="O" MPD_INDEX="21" NAME="M_MSize" SIGNAME="ppc440_0_SPLB0_M_MSize" VECFORMULA="[0:1]"/>
<PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_M_size" DIR="O" MPD_INDEX="22" NAME="M_size" SIGNAME="ppc440_0_SPLB0_M_size" VECFORMULA="[0:3]"/>
<PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_M_type" DIR="O" MPD_INDEX="23" NAME="M_type" SIGNAME="ppc440_0_SPLB0_M_type" VECFORMULA="[0:2]"/>
<PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_M_lockErr" DIR="O" MPD_INDEX="24" NAME="M_lockErr" SIGNAME="ppc440_0_SPLB0_M_lockErr"/>
<PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_M_abort" DIR="O" MPD_INDEX="25" NAME="M_abort" SIGNAME="ppc440_0_SPLB0_M_abort"/>
<PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_M_TAttribute" DIR="O" MPD_INDEX="26" NAME="M_TAttribute" SIGNAME="ppc440_0_SPLB0_M_TAttribute" VECFORMULA="[0:15]"/>
<PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_M_UABus" DIR="O" MPD_INDEX="27" NAME="M_UABus" SIGNAME="ppc440_0_SPLB0_M_UABus" VECFORMULA="[0:31]"/>
<PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_M_ABus" DIR="O" MPD_INDEX="28" NAME="M_ABus" SIGNAME="ppc440_0_SPLB0_M_ABus" VECFORMULA="[0:(C_MPLB_AWIDTH-1)]"/>
<PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_M_wrDBus" DIR="O" MPD_INDEX="29" NAME="M_wrDBus" SIGNAME="ppc440_0_SPLB0_M_wrDBus" VECFORMULA="[0:(C_MPLB_DWIDTH-1)]"/>
<PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_M_wrBurst" DIR="O" MPD_INDEX="30" NAME="M_wrBurst" SIGNAME="ppc440_0_SPLB0_M_wrBurst"/>
<PORT BUS="MPLB" DEF_SIGNAME="ppc440_0_SPLB0_M_rdBurst" DIR="O" MPD_INDEX="31" NAME="M_rdBurst" SIGNAME="ppc440_0_SPLB0_M_rdBurst"/>
<PORT BUS="SPLB" CLKFREQUENCY="125000000" DEF_SIGNAME="clk_125_0000MHzPLL0_ADJUST" DIR="I" MPD_INDEX="32" NAME="SPLB_Clk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_SPLB_Rst" DIR="I" MPD_INDEX="33" NAME="SPLB_Rst" SIGIS="RST" SIGNAME="plb_v46_0_SPLB_Rst"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_ABus" DIR="I" MPD_INDEX="34" NAME="PLB_ABus" SIGNAME="plb_v46_0_PLB_ABus" VECFORMULA="[0:31]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_UABus" DIR="I" MPD_INDEX="35" NAME="PLB_UABus" SIGNAME="plb_v46_0_PLB_UABus" VECFORMULA="[0:31]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_PAValid" DIR="I" MPD_INDEX="36" NAME="PLB_PAValid" SIGNAME="plb_v46_0_PLB_PAValid"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_SAValid" DIR="I" MPD_INDEX="37" NAME="PLB_SAValid" SIGNAME="plb_v46_0_PLB_SAValid"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPrim" DIR="I" MPD_INDEX="38" NAME="PLB_rdPrim" SIGNAME="plb_v46_0_PLB_rdPrim"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPrim" DIR="I" MPD_INDEX="39" NAME="PLB_wrPrim" SIGNAME="plb_v46_0_PLB_wrPrim"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_masterID" DIR="I" MPD_INDEX="40" NAME="PLB_masterID" SIGNAME="plb_v46_0_PLB_masterID" VECFORMULA="[0:(C_SPLB_MID_WIDTH-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_abort" DIR="I" MPD_INDEX="41" NAME="PLB_abort" SIGNAME="plb_v46_0_PLB_abort"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_busLock" DIR="I" MPD_INDEX="42" NAME="PLB_busLock" SIGNAME="plb_v46_0_PLB_busLock"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_RNW" DIR="I" MPD_INDEX="43" NAME="PLB_RNW" SIGNAME="plb_v46_0_PLB_RNW"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_BE" DIR="I" MPD_INDEX="44" NAME="PLB_BE" SIGNAME="plb_v46_0_PLB_BE" VECFORMULA="[0:((C_SPLB_DWIDTH/8)-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_MSize" DIR="I" MPD_INDEX="45" NAME="PLB_MSize" SIGNAME="plb_v46_0_PLB_MSize" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_size" DIR="I" MPD_INDEX="46" NAME="PLB_size" SIGNAME="plb_v46_0_PLB_size" VECFORMULA="[0:3]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_type" DIR="I" MPD_INDEX="47" NAME="PLB_type" SIGNAME="plb_v46_0_PLB_type" VECFORMULA="[0:2]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_lockErr" DIR="I" MPD_INDEX="48" NAME="PLB_lockErr" SIGNAME="plb_v46_0_PLB_lockErr"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrDBus" DIR="I" MPD_INDEX="49" NAME="PLB_wrDBus" SIGNAME="plb_v46_0_PLB_wrDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrBurst" DIR="I" MPD_INDEX="50" NAME="PLB_wrBurst" SIGNAME="plb_v46_0_PLB_wrBurst"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdBurst" DIR="I" MPD_INDEX="51" NAME="PLB_rdBurst" SIGNAME="plb_v46_0_PLB_rdBurst"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendReq" DIR="I" MPD_INDEX="52" NAME="PLB_wrPendReq" SIGNAME="plb_v46_0_PLB_wrPendReq"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendReq" DIR="I" MPD_INDEX="53" NAME="PLB_rdPendReq" SIGNAME="plb_v46_0_PLB_rdPendReq"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendPri" DIR="I" MPD_INDEX="54" NAME="PLB_wrPendPri" SIGNAME="plb_v46_0_PLB_wrPendPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendPri" DIR="I" MPD_INDEX="55" NAME="PLB_rdPendPri" SIGNAME="plb_v46_0_PLB_rdPendPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_reqPri" DIR="I" MPD_INDEX="56" NAME="PLB_reqPri" SIGNAME="plb_v46_0_PLB_reqPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_TAttribute" DIR="I" MPD_INDEX="57" NAME="PLB_TAttribute" SIGNAME="plb_v46_0_PLB_TAttribute" VECFORMULA="[0:15]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_addrAck" DIR="O" MPD_INDEX="58" NAME="Sl_addrAck" SIGNAME="plb_v46_0_Sl_addrAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_SSize" DIR="O" MPD_INDEX="59" NAME="Sl_SSize" SIGNAME="plb_v46_0_Sl_SSize" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wait" DIR="O" MPD_INDEX="60" NAME="Sl_wait" SIGNAME="plb_v46_0_Sl_wait"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rearbitrate" DIR="O" MPD_INDEX="61" NAME="Sl_rearbitrate" SIGNAME="plb_v46_0_Sl_rearbitrate"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrDAck" DIR="O" MPD_INDEX="62" NAME="Sl_wrDAck" SIGNAME="plb_v46_0_Sl_wrDAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrComp" DIR="O" MPD_INDEX="63" NAME="Sl_wrComp" SIGNAME="plb_v46_0_Sl_wrComp"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrBTerm" DIR="O" MPD_INDEX="64" NAME="Sl_wrBTerm" SIGNAME="plb_v46_0_Sl_wrBTerm"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDBus" DIR="O" MPD_INDEX="65" NAME="Sl_rdDBus" SIGNAME="plb_v46_0_Sl_rdDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdWdAddr" DIR="O" MPD_INDEX="66" NAME="Sl_rdWdAddr" SIGNAME="plb_v46_0_Sl_rdWdAddr" VECFORMULA="[0:3]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDAck" DIR="O" MPD_INDEX="67" NAME="Sl_rdDAck" SIGNAME="plb_v46_0_Sl_rdDAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdComp" DIR="O" MPD_INDEX="68" NAME="Sl_rdComp" SIGNAME="plb_v46_0_Sl_rdComp"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdBTerm" DIR="O" MPD_INDEX="69" NAME="Sl_rdBTerm" SIGNAME="plb_v46_0_Sl_rdBTerm"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MBusy" DIR="O" MPD_INDEX="70" NAME="Sl_MBusy" SIGNAME="plb_v46_0_Sl_MBusy" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MWrErr" DIR="O" MPD_INDEX="71" NAME="Sl_MWrErr" SIGNAME="plb_v46_0_Sl_MWrErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MRdErr" DIR="O" MPD_INDEX="72" NAME="Sl_MRdErr" SIGNAME="plb_v46_0_Sl_MRdErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MIRQ" DIR="O" MPD_INDEX="73" NAME="Sl_MIRQ" SIGNAME="plb_v46_0_Sl_MIRQ" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT DIR="O" MPD_INDEX="76" NAME="Bridge_Clk" SIGNAME="__NOC__"/>
<PORT DIR="O" MPD_INDEX="77" NAME="LinkUp" SIGNAME="__NOC__"/>
<PORT DIR="O" MPD_INDEX="82" NAME="IP2INTC_Irpt" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
<BUSINTERFACE BUSNAME="plb_v46_0" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_INMHS="TRUE" MPD_INDEX="0" NAME="SPLB" TYPE="SLAVE"/>
<BUSINTERFACE BUSNAME="ppc440_0_SPLB0" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_INMHS="TRUE" MPD_INDEX="1" NAME="MPLB" TYPE="MASTER"/>
</MODULE>
<MODULE BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" HWVERSION="1.04.a" INSTANCE="ppc440_0_SPLB0" IPTYPE="BUS" MHS_INDEX="12" MODCLASS="BUS" MODTYPE="plb_v46">
<DESCRIPTION TYPE="SHORT">Processor Local Bus (PLB) 4.6</DESCRIPTION>
<DESCRIPTION TYPE="LONG">'Xilinx 64-bit Processor Local Bus (PLB) consists of a bus control unit, a watchdog timer, and separate address, write, and read data path units with a a three-cycle only arbitration feature'</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/plb_v46_v1_04_a/doc/plb_v46.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_PLBV46_NUM_MASTERS" TYPE="integer" VALUE="1">
<DESCRIPTION>Number of PLB Masters</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_PLBV46_NUM_SLAVES" TYPE="integer" VALUE="1">
<DESCRIPTION>Number of PLB Slaves</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="2" NAME="C_PLBV46_MID_WIDTH" TYPE="integer" VALUE="1">
<DESCRIPTION>PLB Master ID Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="3" NAME="C_PLBV46_AWIDTH" TYPE="integer" VALUE="32">
<DESCRIPTION>PLB Address Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="4" NAME="C_PLBV46_DWIDTH" TYPE="integer" VALUE="128">
<DESCRIPTION>PLB Data Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="5" NAME="C_DCR_INTFCE" TYPE="integer" VALUE="0">
<DESCRIPTION>Include DCR Interface and Error Registers</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" MPD_INDEX="6" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0b1111111111">
<DESCRIPTION>Base Address</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" MPD_INDEX="7" NAME="C_HIGHADDR" TYPE="std_logic_vector" VALUE="0b0000000000">
<DESCRIPTION>High Address</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="8" NAME="C_DCR_AWIDTH" TYPE="integer" VALUE="10">
<DESCRIPTION>DCR Address Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="9" NAME="C_DCR_DWIDTH" TYPE="integer" VALUE="32">
<DESCRIPTION>DCR Data Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="10" NAME="C_EXT_RESET_HIGH" TYPE="integer" VALUE="1">
<DESCRIPTION>External Reset Active High </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="11" NAME="C_IRQ_ACTIVE" TYPE="std_logic" VALUE="1">
<DESCRIPTION>IRQ Active State </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="12" NAME="C_NUM_CLK_PLB2OPB_REARB" TYPE="integer" VALUE="5">
<DESCRIPTION>&lt;qt&gt;Number of PLB Clock Periods a PLB Master that Received a Rearbitrate from an OPB2PLB Bridge on a Read Operation is Denied Grant on the PLB Bus&lt;/qt&gt;</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="13" NAME="C_ADDR_PIPELINING_TYPE" TYPE="integer" VALUE="1">
<DESCRIPTION>Enable Address Pipelining Type</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="14" NAME="C_FAMILY" TYPE="string" VALUE="virtex5">
<DESCRIPTION>Device Family</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="15" NAME="C_P2P" TYPE="integer" VALUE="0">
<DESCRIPTION>Optimize PLB for Point-to-point Topology</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="16" NAME="C_ARB_TYPE" TYPE="integer" VALUE="0">
<DESCRIPTION>Selects the Arbitration Scheme</DESCRIPTION>
</PARAMETER>
<MEMORYMAP>
<MEMRANGE BASEDECIMAL="1023" BASENAME="C_BASEADDR" BASEVALUE="0b1111111111" HIGHDECIMAL="0" HIGHNAME="C_HIGHADDR" HIGHVALUE="0b0000000000" IS_VALID="FALSE" MEMTYPE="REGISTER" MINSIZE="0x08" SIZE="0" SIZEABRV="U">
<SLVINTERFACES>
<BUSINTERFACE NAME="SDCR"/>
</SLVINTERFACES>
</MEMRANGE>
</MEMORYMAP>
<PORT CLKFREQUENCY="125000000" DIR="I" IS_INMHS="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="PLB_Clk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
<PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="1" MPD_INDEX="1" NAME="SYS_Rst" SIGIS="RST" SIGNAME="sys_bus_reset"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_Rst" DIR="O" MPD_INDEX="2" NAME="PLB_Rst" SIGIS="RST" SIGNAME="ppc440_0_splb0_PLB_Rst"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_SPLB_Rst" DIR="O" MPD_INDEX="3" NAME="SPLB_Rst" SIGIS="RST" SIGNAME="ppc440_0_splb0_SPLB_Rst" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_MPLB_Rst" DIR="O" MPD_INDEX="4" NAME="MPLB_Rst" SIGIS="RST" SIGNAME="ppc440_0_splb0_MPLB_Rst" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="5" NAME="PLB_dcrAck" SIGNAME="__NOC__"/>
<PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="6" NAME="PLB_dcrDBus" SIGNAME="__NOC__" VECFORMULA="[0:C_DCR_DWIDTH-1]"/>
<PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="7" NAME="DCR_ABus" SIGNAME="__NOC__" VECFORMULA="[0:C_DCR_AWIDTH-1]"/>
<PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="8" NAME="DCR_DBus" SIGNAME="__NOC__" VECFORMULA="[0:C_DCR_DWIDTH-1]"/>
<PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="9" NAME="DCR_Read" SIGNAME="__NOC__"/>
<PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="10" NAME="DCR_Write" SIGNAME="__NOC__"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_M_ABus" DIR="I" MPD_INDEX="11" NAME="M_ABus" SIGNAME="ppc440_0_splb0_M_ABus" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*32)-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_M_UABus" DIR="I" MPD_INDEX="12" NAME="M_UABus" SIGNAME="ppc440_0_splb0_M_UABus" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*32)-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_M_BE" DIR="I" MPD_INDEX="13" NAME="M_BE" SIGNAME="ppc440_0_splb0_M_BE" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*(C_PLBV46_DWIDTH/8))-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_M_RNW" DIR="I" MPD_INDEX="14" NAME="M_RNW" SIGNAME="ppc440_0_splb0_M_RNW" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_M_abort" DIR="I" MPD_INDEX="15" NAME="M_abort" SIGNAME="ppc440_0_splb0_M_abort" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_M_busLock" DIR="I" MPD_INDEX="16" NAME="M_busLock" SIGNAME="ppc440_0_splb0_M_busLock" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_M_TAttribute" DIR="I" MPD_INDEX="17" NAME="M_TAttribute" SIGNAME="ppc440_0_splb0_M_TAttribute" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*16)-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_M_lockErr" DIR="I" MPD_INDEX="18" NAME="M_lockErr" SIGNAME="ppc440_0_splb0_M_lockErr" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_M_MSize" DIR="I" MPD_INDEX="19" NAME="M_MSize" SIGNAME="ppc440_0_splb0_M_MSize" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*2)-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_M_priority" DIR="I" MPD_INDEX="20" NAME="M_priority" SIGNAME="ppc440_0_splb0_M_priority" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*2)-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_M_rdBurst" DIR="I" MPD_INDEX="21" NAME="M_rdBurst" SIGNAME="ppc440_0_splb0_M_rdBurst" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_M_request" DIR="I" MPD_INDEX="22" NAME="M_request" SIGNAME="ppc440_0_splb0_M_request" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_M_size" DIR="I" MPD_INDEX="23" NAME="M_size" SIGNAME="ppc440_0_splb0_M_size" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*4)-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_M_type" DIR="I" MPD_INDEX="24" NAME="M_type" SIGNAME="ppc440_0_splb0_M_type" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*3)-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_M_wrBurst" DIR="I" MPD_INDEX="25" NAME="M_wrBurst" SIGNAME="ppc440_0_splb0_M_wrBurst" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_M_wrDBus" DIR="I" MPD_INDEX="26" NAME="M_wrDBus" SIGNAME="ppc440_0_splb0_M_wrDBus" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*C_PLBV46_DWIDTH)-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_Sl_addrAck" DIR="I" MPD_INDEX="27" NAME="Sl_addrAck" SIGNAME="ppc440_0_splb0_Sl_addrAck" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_Sl_MRdErr" DIR="I" MPD_INDEX="28" NAME="Sl_MRdErr" SIGNAME="ppc440_0_splb0_Sl_MRdErr" VECFORMULA="[0:(C_PLBV46_NUM_SLAVES*C_PLBV46_NUM_MASTERS)-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_Sl_MWrErr" DIR="I" MPD_INDEX="29" NAME="Sl_MWrErr" SIGNAME="ppc440_0_splb0_Sl_MWrErr" VECFORMULA="[0:(C_PLBV46_NUM_SLAVES*C_PLBV46_NUM_MASTERS)-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_Sl_MBusy" DIR="I" MPD_INDEX="30" NAME="Sl_MBusy" SIGNAME="ppc440_0_splb0_Sl_MBusy" VECFORMULA="[0:C_PLBV46_NUM_SLAVES*C_PLBV46_NUM_MASTERS - 1 ]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_Sl_rdBTerm" DIR="I" MPD_INDEX="31" NAME="Sl_rdBTerm" SIGNAME="ppc440_0_splb0_Sl_rdBTerm" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_Sl_rdComp" DIR="I" MPD_INDEX="32" NAME="Sl_rdComp" SIGNAME="ppc440_0_splb0_Sl_rdComp" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_Sl_rdDAck" DIR="I" MPD_INDEX="33" NAME="Sl_rdDAck" SIGNAME="ppc440_0_splb0_Sl_rdDAck" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_Sl_rdDBus" DIR="I" MPD_INDEX="34" NAME="Sl_rdDBus" SIGNAME="ppc440_0_splb0_Sl_rdDBus" VECFORMULA="[0:C_PLBV46_NUM_SLAVES*C_PLBV46_DWIDTH-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_Sl_rdWdAddr" DIR="I" MPD_INDEX="35" NAME="Sl_rdWdAddr" SIGNAME="ppc440_0_splb0_Sl_rdWdAddr" VECFORMULA="[0:C_PLBV46_NUM_SLAVES*4-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_Sl_rearbitrate" DIR="I" MPD_INDEX="36" NAME="Sl_rearbitrate" SIGNAME="ppc440_0_splb0_Sl_rearbitrate" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_Sl_SSize" DIR="I" MPD_INDEX="37" NAME="Sl_SSize" SIGNAME="ppc440_0_splb0_Sl_SSize" VECFORMULA="[0:C_PLBV46_NUM_SLAVES*2-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_Sl_wait" DIR="I" MPD_INDEX="38" NAME="Sl_wait" SIGNAME="ppc440_0_splb0_Sl_wait" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_Sl_wrBTerm" DIR="I" MPD_INDEX="39" NAME="Sl_wrBTerm" SIGNAME="ppc440_0_splb0_Sl_wrBTerm" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_Sl_wrComp" DIR="I" MPD_INDEX="40" NAME="Sl_wrComp" SIGNAME="ppc440_0_splb0_Sl_wrComp" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_Sl_wrDAck" DIR="I" MPD_INDEX="41" NAME="Sl_wrDAck" SIGNAME="ppc440_0_splb0_Sl_wrDAck" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_Sl_MIRQ" DIR="I" MPD_INDEX="42" NAME="Sl_MIRQ" SIGNAME="ppc440_0_splb0_Sl_MIRQ" VECFORMULA="[0:C_PLBV46_NUM_SLAVES*C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_MIRQ" DIR="O" MPD_INDEX="43" NAME="PLB_MIRQ" SIGNAME="ppc440_0_splb0_PLB_MIRQ" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_ABus" DIR="O" MPD_INDEX="44" NAME="PLB_ABus" SIGNAME="ppc440_0_splb0_PLB_ABus" VECFORMULA="[0:31]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_UABus" DIR="O" MPD_INDEX="45" NAME="PLB_UABus" SIGNAME="ppc440_0_splb0_PLB_UABus" VECFORMULA="[0:31]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_BE" DIR="O" MPD_INDEX="46" NAME="PLB_BE" SIGNAME="ppc440_0_splb0_PLB_BE" VECFORMULA="[0:(C_PLBV46_DWIDTH/8)-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_MAddrAck" DIR="O" MPD_INDEX="47" NAME="PLB_MAddrAck" SIGNAME="ppc440_0_splb0_PLB_MAddrAck" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_MTimeout" DIR="O" MPD_INDEX="48" NAME="PLB_MTimeout" SIGNAME="ppc440_0_splb0_PLB_MTimeout" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_MBusy" DIR="O" MPD_INDEX="49" NAME="PLB_MBusy" SIGNAME="ppc440_0_splb0_PLB_MBusy" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_MRdErr" DIR="O" MPD_INDEX="50" NAME="PLB_MRdErr" SIGNAME="ppc440_0_splb0_PLB_MRdErr" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_MWrErr" DIR="O" MPD_INDEX="51" NAME="PLB_MWrErr" SIGNAME="ppc440_0_splb0_PLB_MWrErr" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_MRdBTerm" DIR="O" MPD_INDEX="52" NAME="PLB_MRdBTerm" SIGNAME="ppc440_0_splb0_PLB_MRdBTerm" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_MRdDAck" DIR="O" MPD_INDEX="53" NAME="PLB_MRdDAck" SIGNAME="ppc440_0_splb0_PLB_MRdDAck" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_MRdDBus" DIR="O" MPD_INDEX="54" NAME="PLB_MRdDBus" SIGNAME="ppc440_0_splb0_PLB_MRdDBus" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*C_PLBV46_DWIDTH)-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_MRdWdAddr" DIR="O" MPD_INDEX="55" NAME="PLB_MRdWdAddr" SIGNAME="ppc440_0_splb0_PLB_MRdWdAddr" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*4)-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_MRearbitrate" DIR="O" MPD_INDEX="56" NAME="PLB_MRearbitrate" SIGNAME="ppc440_0_splb0_PLB_MRearbitrate" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_MWrBTerm" DIR="O" MPD_INDEX="57" NAME="PLB_MWrBTerm" SIGNAME="ppc440_0_splb0_PLB_MWrBTerm" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_MWrDAck" DIR="O" MPD_INDEX="58" NAME="PLB_MWrDAck" SIGNAME="ppc440_0_splb0_PLB_MWrDAck" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_MSSize" DIR="O" MPD_INDEX="59" NAME="PLB_MSSize" SIGNAME="ppc440_0_splb0_PLB_MSSize" VECFORMULA="[0:(C_PLBV46_NUM_MASTERS*2)-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_PAValid" DIR="O" MPD_INDEX="60" NAME="PLB_PAValid" SIGNAME="ppc440_0_splb0_PLB_PAValid"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_RNW" DIR="O" MPD_INDEX="61" NAME="PLB_RNW" SIGNAME="ppc440_0_splb0_PLB_RNW"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_SAValid" DIR="O" MPD_INDEX="62" NAME="PLB_SAValid" SIGNAME="ppc440_0_splb0_PLB_SAValid"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_abort" DIR="O" MPD_INDEX="63" NAME="PLB_abort" SIGNAME="ppc440_0_splb0_PLB_abort"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_busLock" DIR="O" MPD_INDEX="64" NAME="PLB_busLock" SIGNAME="ppc440_0_splb0_PLB_busLock"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_TAttribute" DIR="O" MPD_INDEX="65" NAME="PLB_TAttribute" SIGNAME="ppc440_0_splb0_PLB_TAttribute" VECFORMULA="[0:15]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_lockErr" DIR="O" MPD_INDEX="66" NAME="PLB_lockErr" SIGNAME="ppc440_0_splb0_PLB_lockErr"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_masterID" DIR="O" MPD_INDEX="67" NAME="PLB_masterID" SIGNAME="ppc440_0_splb0_PLB_masterID" VECFORMULA="[0:C_PLBV46_MID_WIDTH-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_MSize" DIR="O" MPD_INDEX="68" NAME="PLB_MSize" SIGNAME="ppc440_0_splb0_PLB_MSize" VECFORMULA="[0:1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_rdPendPri" DIR="O" MPD_INDEX="69" NAME="PLB_rdPendPri" SIGNAME="ppc440_0_splb0_PLB_rdPendPri" VECFORMULA="[0:1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_wrPendPri" DIR="O" MPD_INDEX="70" NAME="PLB_wrPendPri" SIGNAME="ppc440_0_splb0_PLB_wrPendPri" VECFORMULA="[0:1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_rdPendReq" DIR="O" MPD_INDEX="71" NAME="PLB_rdPendReq" SIGNAME="ppc440_0_splb0_PLB_rdPendReq"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_wrPendReq" DIR="O" MPD_INDEX="72" NAME="PLB_wrPendReq" SIGNAME="ppc440_0_splb0_PLB_wrPendReq"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_rdBurst" DIR="O" MPD_INDEX="73" NAME="PLB_rdBurst" SIGNAME="ppc440_0_splb0_PLB_rdBurst"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_rdPrim" DIR="O" MPD_INDEX="74" NAME="PLB_rdPrim" SIGNAME="ppc440_0_splb0_PLB_rdPrim" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_reqPri" DIR="O" MPD_INDEX="75" NAME="PLB_reqPri" SIGNAME="ppc440_0_splb0_PLB_reqPri" VECFORMULA="[0:1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_size" DIR="O" MPD_INDEX="76" NAME="PLB_size" SIGNAME="ppc440_0_splb0_PLB_size" VECFORMULA="[0:3]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_type" DIR="O" MPD_INDEX="77" NAME="PLB_type" SIGNAME="ppc440_0_splb0_PLB_type" VECFORMULA="[0:2]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_wrBurst" DIR="O" MPD_INDEX="78" NAME="PLB_wrBurst" SIGNAME="ppc440_0_splb0_PLB_wrBurst"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_wrDBus" DIR="O" MPD_INDEX="79" NAME="PLB_wrDBus" SIGNAME="ppc440_0_splb0_PLB_wrDBus" VECFORMULA="[0:C_PLBV46_DWIDTH-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_wrPrim" DIR="O" MPD_INDEX="80" NAME="PLB_wrPrim" SIGNAME="ppc440_0_splb0_PLB_wrPrim" VECFORMULA="[0:C_PLBV46_NUM_SLAVES-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_SaddrAck" DIR="O" MPD_INDEX="81" NAME="PLB_SaddrAck" SIGNAME="ppc440_0_splb0_PLB_SaddrAck"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_SMRdErr" DIR="O" MPD_INDEX="82" NAME="PLB_SMRdErr" SIGNAME="ppc440_0_splb0_PLB_SMRdErr" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_SMWrErr" DIR="O" MPD_INDEX="83" NAME="PLB_SMWrErr" SIGNAME="ppc440_0_splb0_PLB_SMWrErr" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_SMBusy" DIR="O" MPD_INDEX="84" NAME="PLB_SMBusy" SIGNAME="ppc440_0_splb0_PLB_SMBusy" VECFORMULA="[0:C_PLBV46_NUM_MASTERS-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_SrdBTerm" DIR="O" MPD_INDEX="85" NAME="PLB_SrdBTerm" SIGNAME="ppc440_0_splb0_PLB_SrdBTerm"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_SrdComp" DIR="O" MPD_INDEX="86" NAME="PLB_SrdComp" SIGNAME="ppc440_0_splb0_PLB_SrdComp"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_SrdDAck" DIR="O" MPD_INDEX="87" NAME="PLB_SrdDAck" SIGNAME="ppc440_0_splb0_PLB_SrdDAck"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_SrdDBus" DIR="O" MPD_INDEX="88" NAME="PLB_SrdDBus" SIGNAME="ppc440_0_splb0_PLB_SrdDBus" VECFORMULA="[0:C_PLBV46_DWIDTH-1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_SrdWdAddr" DIR="O" MPD_INDEX="89" NAME="PLB_SrdWdAddr" SIGNAME="ppc440_0_splb0_PLB_SrdWdAddr" VECFORMULA="[0:3]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_Srearbitrate" DIR="O" MPD_INDEX="90" NAME="PLB_Srearbitrate" SIGNAME="ppc440_0_splb0_PLB_Srearbitrate"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_Sssize" DIR="O" MPD_INDEX="91" NAME="PLB_Sssize" SIGNAME="ppc440_0_splb0_PLB_Sssize" VECFORMULA="[0:1]"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_Swait" DIR="O" MPD_INDEX="92" NAME="PLB_Swait" SIGNAME="ppc440_0_splb0_PLB_Swait"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_SwrBTerm" DIR="O" MPD_INDEX="93" NAME="PLB_SwrBTerm" SIGNAME="ppc440_0_splb0_PLB_SwrBTerm"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_SwrComp" DIR="O" MPD_INDEX="94" NAME="PLB_SwrComp" SIGNAME="ppc440_0_splb0_PLB_SwrComp"/>
<PORT DEF_SIGNAME="ppc440_0_splb0_PLB_SwrDAck" DIR="O" MPD_INDEX="95" NAME="PLB_SwrDAck" SIGNAME="ppc440_0_splb0_PLB_SwrDAck"/>
<PORT DIR="O" MPD_INDEX="96" NAME="Bus_Error_Det" SENSITIVITY="EDGE_RISING" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
<BUSINTERFACE BUSNAME="__NOC__" BUSSTD="DCR" BUSSTD_PSF="DCR" IS_VALID="FALSE" MPD_INDEX="0" NAME="SDCR" TYPE="SLAVE"/>
</MODULE>
<MODULE HWVERSION="2.01.a" INSTANCE="Ethernet_MAC" IPTYPE="PERIPHERAL" MHS_INDEX="13" MODCLASS="PERIPHERAL" MODTYPE="xps_ethernetlite">
<DESCRIPTION TYPE="SHORT">XPS 10/100 Ethernet MAC Lite</DESCRIPTION>
<DESCRIPTION TYPE="LONG">'IEEE Std. 802.3 MII interface MAC with PLBV46 interface, lightweight implementation'</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/xps_ethernetlite_v2_01_a/doc/xps_ethernetlite.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETER MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="virtex5">
<DESCRIPTION>Device Family</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="1" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0x81000000">
<DESCRIPTION>Base Address</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="2" NAME="C_HIGHADDR" TYPE="std_logic_vector" VALUE="0x8100ffff">
<DESCRIPTION>High Address</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="3" NAME="C_SPLB_CLK_PERIOD_PS" TYPE="INTEGER" VALUE="8000">
<DESCRIPTION>Clock Period of PLB Slave</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="4" NAME="C_SPLB_AWIDTH" TYPE="INTEGER" VALUE="32">
<DESCRIPTION>PLB Address Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="5" NAME="C_SPLB_DWIDTH" TYPE="INTEGER" VALUE="128">
<DESCRIPTION>PLB Data Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="6" NAME="C_SPLB_P2P" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>PLB Slave Uses P2P Topology</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="7" NAME="C_SPLB_MID_WIDTH" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Master ID Bus Width of PLB</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="8" NAME="C_SPLB_NUM_MASTERS" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Number of PLB Masters</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="9" NAME="C_SPLB_NATIVE_DWIDTH" TYPE="INTEGER" VALUE="32">
<DESCRIPTION>Native Data Bus Width of PLB Slave</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="10" NAME="C_SPLB_SUPPORT_BURSTS" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>PLB Slave is Capable of Bursts</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="11" NAME="C_DUPLEX" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Duplex Mode </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="12" NAME="C_TX_PING_PONG" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Include Second Transmitter Buffer </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="13" NAME="C_RX_PING_PONG" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Include Second Receiver Buffer </DESCRIPTION>
</PARAMETER>
<MEMORYMAP>
<MEMRANGE BASEDECIMAL="2164260864" BASENAME="C_BASEADDR" BASEVALUE="0x81000000" HIGHDECIMAL="2164326399" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8100ffff" MEMTYPE="REGISTER" MINSIZE="0x02000" SIZE="65536" SIZEABRV="64K">
<SLVINTERFACES>
<BUSINTERFACE NAME="SPLB"/>
</SLVINTERFACES>
</MEMRANGE>
</MEMORYMAP>
<PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="PHY_tx_clk" SIGNAME="fpga_0_Ethernet_MAC_PHY_tx_clk_pin">
<DESCRIPTION>Ethernet Transmit Clock Input</DESCRIPTION>
</PORT>
<PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="1" MPD_INDEX="1" NAME="PHY_rx_clk" SIGNAME="fpga_0_Ethernet_MAC_PHY_rx_clk_pin">
<DESCRIPTION>Ethernet Receive Clock Input</DESCRIPTION>
</PORT>
<PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="2" MPD_INDEX="2" NAME="PHY_crs" SIGNAME="fpga_0_Ethernet_MAC_PHY_crs_pin">
<DESCRIPTION>Ethernet Carrier Sense Input</DESCRIPTION>
</PORT>
<PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="3" MPD_INDEX="3" NAME="PHY_dv" SIGNAME="fpga_0_Ethernet_MAC_PHY_dv_pin">
<DESCRIPTION>Ethernet Receive Data Valid</DESCRIPTION>
</PORT>
<PORT DIR="I" ENDIAN="LITTLE" IS_INMHS="TRUE" LSB="0" MHS_INDEX="4" MPD_INDEX="4" MSB="3" NAME="PHY_rx_data" SIGNAME="fpga_0_Ethernet_MAC_PHY_rx_data_pin" VECFORMULA="[3:0]">
<DESCRIPTION>Ethernet Receive Data Input</DESCRIPTION>
</PORT>
<PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="5" MPD_INDEX="5" NAME="PHY_col" SIGNAME="fpga_0_Ethernet_MAC_PHY_col_pin">
<DESCRIPTION>Ethernet Collision Input</DESCRIPTION>
</PORT>
<PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="6" MPD_INDEX="6" NAME="PHY_rx_er" SIGNAME="fpga_0_Ethernet_MAC_PHY_rx_er_pin">
<DESCRIPTION>Ethernet Receive Error Input</DESCRIPTION>
</PORT>
<PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="7" MPD_INDEX="7" NAME="PHY_rst_n" SIGNAME="fpga_0_Ethernet_MAC_PHY_rst_n_pin">
<DESCRIPTION>Ethernet PHY Reset</DESCRIPTION>
</PORT>
<PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="8" MPD_INDEX="8" NAME="PHY_tx_en" SIGNAME="fpga_0_Ethernet_MAC_PHY_tx_en_pin">
<DESCRIPTION>Ethernet Transmit Enable</DESCRIPTION>
</PORT>
<PORT DIR="O" ENDIAN="LITTLE" IS_INMHS="TRUE" LSB="0" MHS_INDEX="9" MPD_INDEX="9" MSB="3" NAME="PHY_tx_data" SIGNAME="fpga_0_Ethernet_MAC_PHY_tx_data_pin" VECFORMULA="[3:0]">
<DESCRIPTION>Ethernet Transmit Data Output</DESCRIPTION>
</PORT>
<PORT DIR="O" MPD_INDEX="10" NAME="IP2INTC_Irpt" SENSITIVITY="EDGE_RISING" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
<PORT BUS="SPLB" CLKFREQUENCY="125000000" DEF_SIGNAME="clk_125_0000MHzPLL0_ADJUST" DIR="I" MPD_INDEX="11" NAME="SPLB_Clk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_SPLB_Rst" DIR="I" MPD_INDEX="12" NAME="SPLB_Rst" SIGIS="RST" SIGNAME="plb_v46_0_SPLB_Rst"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_ABus" DIR="I" MPD_INDEX="13" NAME="PLB_ABus" SIGNAME="plb_v46_0_PLB_ABus" VECFORMULA="[0:(C_SPLB_AWIDTH-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_UABus" DIR="I" MPD_INDEX="14" NAME="PLB_UABus" SIGNAME="plb_v46_0_PLB_UABus" VECFORMULA="[0:31]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_PAValid" DIR="I" MPD_INDEX="15" NAME="PLB_PAValid" SIGNAME="plb_v46_0_PLB_PAValid"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_SAValid" DIR="I" MPD_INDEX="16" NAME="PLB_SAValid" SIGNAME="plb_v46_0_PLB_SAValid"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPrim" DIR="I" MPD_INDEX="17" NAME="PLB_rdPrim" SIGNAME="plb_v46_0_PLB_rdPrim"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPrim" DIR="I" MPD_INDEX="18" NAME="PLB_wrPrim" SIGNAME="plb_v46_0_PLB_wrPrim"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_masterID" DIR="I" MPD_INDEX="19" NAME="PLB_masterID" SIGNAME="plb_v46_0_PLB_masterID" VECFORMULA="[0:(C_SPLB_MID_WIDTH-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_abort" DIR="I" MPD_INDEX="20" NAME="PLB_abort" SIGNAME="plb_v46_0_PLB_abort"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_busLock" DIR="I" MPD_INDEX="21" NAME="PLB_busLock" SIGNAME="plb_v46_0_PLB_busLock"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_RNW" DIR="I" MPD_INDEX="22" NAME="PLB_RNW" SIGNAME="plb_v46_0_PLB_RNW"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_BE" DIR="I" MPD_INDEX="23" NAME="PLB_BE" SIGNAME="plb_v46_0_PLB_BE" VECFORMULA="[0:((C_SPLB_DWIDTH/8)-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_MSize" DIR="I" MPD_INDEX="24" NAME="PLB_MSize" SIGNAME="plb_v46_0_PLB_MSize" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_size" DIR="I" MPD_INDEX="25" NAME="PLB_size" SIGNAME="plb_v46_0_PLB_size" VECFORMULA="[0:3]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_type" DIR="I" MPD_INDEX="26" NAME="PLB_type" SIGNAME="plb_v46_0_PLB_type" VECFORMULA="[0:2]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_lockErr" DIR="I" MPD_INDEX="27" NAME="PLB_lockErr" SIGNAME="plb_v46_0_PLB_lockErr"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrDBus" DIR="I" MPD_INDEX="28" NAME="PLB_wrDBus" SIGNAME="plb_v46_0_PLB_wrDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrBurst" DIR="I" MPD_INDEX="29" NAME="PLB_wrBurst" SIGNAME="plb_v46_0_PLB_wrBurst"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdBurst" DIR="I" MPD_INDEX="30" NAME="PLB_rdBurst" SIGNAME="plb_v46_0_PLB_rdBurst"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendReq" DIR="I" MPD_INDEX="31" NAME="PLB_wrPendReq" SIGNAME="plb_v46_0_PLB_wrPendReq"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendReq" DIR="I" MPD_INDEX="32" NAME="PLB_rdPendReq" SIGNAME="plb_v46_0_PLB_rdPendReq"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendPri" DIR="I" MPD_INDEX="33" NAME="PLB_wrPendPri" SIGNAME="plb_v46_0_PLB_wrPendPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendPri" DIR="I" MPD_INDEX="34" NAME="PLB_rdPendPri" SIGNAME="plb_v46_0_PLB_rdPendPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_reqPri" DIR="I" MPD_INDEX="35" NAME="PLB_reqPri" SIGNAME="plb_v46_0_PLB_reqPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_TAttribute" DIR="I" MPD_INDEX="36" NAME="PLB_TAttribute" SIGNAME="plb_v46_0_PLB_TAttribute" VECFORMULA="[0:15]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_addrAck" DIR="O" MPD_INDEX="37" NAME="Sl_addrAck" SIGNAME="plb_v46_0_Sl_addrAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_SSize" DIR="O" MPD_INDEX="38" NAME="Sl_SSize" SIGNAME="plb_v46_0_Sl_SSize" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wait" DIR="O" MPD_INDEX="39" NAME="Sl_wait" SIGNAME="plb_v46_0_Sl_wait"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rearbitrate" DIR="O" MPD_INDEX="40" NAME="Sl_rearbitrate" SIGNAME="plb_v46_0_Sl_rearbitrate"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrDAck" DIR="O" MPD_INDEX="41" NAME="Sl_wrDAck" SIGNAME="plb_v46_0_Sl_wrDAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrComp" DIR="O" MPD_INDEX="42" NAME="Sl_wrComp" SIGNAME="plb_v46_0_Sl_wrComp"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrBTerm" DIR="O" MPD_INDEX="43" NAME="Sl_wrBTerm" SIGNAME="plb_v46_0_Sl_wrBTerm"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDBus" DIR="O" MPD_INDEX="44" NAME="Sl_rdDBus" SIGNAME="plb_v46_0_Sl_rdDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdWdAddr" DIR="O" MPD_INDEX="45" NAME="Sl_rdWdAddr" SIGNAME="plb_v46_0_Sl_rdWdAddr" VECFORMULA="[0:3]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDAck" DIR="O" MPD_INDEX="46" NAME="Sl_rdDAck" SIGNAME="plb_v46_0_Sl_rdDAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdComp" DIR="O" MPD_INDEX="47" NAME="Sl_rdComp" SIGNAME="plb_v46_0_Sl_rdComp"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdBTerm" DIR="O" MPD_INDEX="48" NAME="Sl_rdBTerm" SIGNAME="plb_v46_0_Sl_rdBTerm"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MBusy" DIR="O" MPD_INDEX="49" NAME="Sl_MBusy" SIGNAME="plb_v46_0_Sl_MBusy" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MWrErr" DIR="O" MPD_INDEX="50" NAME="Sl_MWrErr" SIGNAME="plb_v46_0_Sl_MWrErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MRdErr" DIR="O" MPD_INDEX="51" NAME="Sl_MRdErr" SIGNAME="plb_v46_0_Sl_MRdErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MIRQ" DIR="O" MPD_INDEX="52" NAME="Sl_MIRQ" SIGNAME="plb_v46_0_Sl_MIRQ" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<BUSINTERFACE BUSNAME="plb_v46_0" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_INMHS="TRUE" MPD_INDEX="0" NAME="SPLB" TYPE="SLAVE"/>
</MODULE>
<MODULE HWVERSION="2.00.b" INSTANCE="DDR2_SDRAM" IPTYPE="PERIPHERAL" MHS_INDEX="14" MODCLASS="MEMORY_CNTLR" MODTYPE="ppc440mc_ddr2">
<DESCRIPTION TYPE="SHORT">PowerPC 440 DDR2 Memory Controller</DESCRIPTION>
<DESCRIPTION TYPE="LONG">A wrapper to instantiate the PowerPC 440 DDR2 Memory Controller</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/ppc440mc_ddr2_v2_00_b/doc/ppc440mc_ddr2.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETER MPD_INDEX="0" NAME="C_DDR_BAWIDTH" TYPE="integer" VALUE="2">
<DESCRIPTION>Bank Address Width of DDR Memory </DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="1" NAME="C_NUM_CLK_PAIRS" TYPE="integer" VALUE="2">
<DESCRIPTION>Number of Generated DDR Clock Pairs.</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="2" NAME="C_DDR_DWIDTH" TYPE="integer" VALUE="64">
<DESCRIPTION>Data Bus Width of DDR </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="3" NAME="C_DDR_CAWIDTH" TYPE="integer" VALUE="10">
<DESCRIPTION>Column Address Width of DDR Memory </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="4" NAME="C_NUM_RANKS_MEM" TYPE="integer" VALUE="1">
<DESCRIPTION>Number of DDR2 Memory Ranks</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="5" NAME="C_CS_BITS" TYPE="integer" VALUE="0">
<DESCRIPTION>Number of Chip Select in DDR2 Memory Rank (a.k.a log2C_NUM_RANKS_MEM)</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="6" NAME="C_DDR_DM_WIDTH" TYPE="integer" VALUE="8">
<DESCRIPTION>DDR2 Data Mask Width</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="7" NAME="C_DQ_BITS" TYPE="integer" VALUE="8">
<DESCRIPTION>C_DQ_BITS</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="8" NAME="C_DDR2_ODT_WIDTH" TYPE="integer" VALUE="2">
<DESCRIPTION>DDR2 On Die Termination Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="9" NAME="C_DDR2_ADDT_LAT" TYPE="integer" VALUE="0">
<DESCRIPTION>Additive Latency of DDR2 Memory </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="10" NAME="C_INCLUDE_ECC_SUPPORT" TYPE="integer" VALUE="0">
<DESCRIPTION>Support ECC Logic </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="11" NAME="C_DDR2_ODT_SETTING" TYPE="integer" VALUE="1">
<DESCRIPTION>Setting for On Die Termination</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="12" NAME="C_DQS_BITS" TYPE="integer" VALUE="3">
<DESCRIPTION>DQS Bit Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="13" NAME="C_DDR_DQS_WIDTH" TYPE="integer" VALUE="8">
<DESCRIPTION>DDR2 Strobe Width</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="14" NAME="C_DDR_RAWIDTH" TYPE="integer" VALUE="13">
<DESCRIPTION>Row Address Width of DDR Memory </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="15" NAME="C_DDR_BURST_LENGTH" TYPE="integer" VALUE="4">
<DESCRIPTION>Burst Length of DDR Memory</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="16" NAME="C_DDR_CAS_LAT" TYPE="integer" VALUE="4">
<DESCRIPTION>CAS Latency of DDR Memory </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="17" NAME="C_REG_DIMM" TYPE="integer" VALUE="0">
<DESCRIPTION>Include Support for Registered DIMMs.</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="18" NAME="C_MIB_MC_CLOCK_RATIO" TYPE="integer" VALUE="1">
<DESCRIPTION>Clock Ratio between CPMINTERCONNECTCLK to DDR2 Clock</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" CHANGEDBY="USER" MPD_INDEX="19" NAME="C_MEM_BASEADDR" VALUE="0x00000000">
<DESCRIPTION>Memory Base Address </DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" CHANGEDBY="USER" MPD_INDEX="20" NAME="C_MEM_HIGHADDR" VALUE="0x0fffffff">
<DESCRIPTION>Memory High Address </DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="21" NAME="C_DDR_TREFI" TYPE="integer" VALUE="3900">
<DESCRIPTION>TREFI of DDR </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="22" NAME="C_DDR_TRAS" TYPE="integer" VALUE="40000">
<DESCRIPTION>TRAS of DDR </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="23" NAME="C_DDR_TRCD" TYPE="integer" VALUE="15000">
<DESCRIPTION>TRCD of DDR </DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="24" NAME="C_DDR_TRFC" TYPE="integer" VALUE="75000">
<DESCRIPTION>TRFC of DDR </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="25" NAME="C_DDR_TRP" TYPE="integer" VALUE="15000">
<DESCRIPTION>TRP of DDR </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="26" NAME="C_DDR_TRTP" TYPE="integer" VALUE="7500">
<DESCRIPTION>TRTP of DDR </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="27" NAME="C_DDR_TWR" TYPE="integer" VALUE="15000">
<DESCRIPTION>TWR of DDR </DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="28" NAME="C_DDR_TWTR" TYPE="integer" VALUE="7500">
<DESCRIPTION>TWTR of DDR </DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="29" NAME="C_MC_MIBCLK_PERIOD_PS" TYPE="integer" VALUE="8000">
<DESCRIPTION>Clock Period(ps) of MIB Clock</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="30" NAME="C_IDEL_HIGH_PERF" TYPE="string" VALUE="TRUE">
<DESCRIPTION>IDELAY High Performance Mode</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="31" NAME="C_SIM_ONLY" TYPE="integer" VALUE="0">
<DESCRIPTION>SKip 200us Power-up Time for Simulation</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="32" NAME="C_NUM_IDELAYCTRL" TYPE="integer" VALUE="3">
<DESCRIPTION>Number of IDELAYCTRL Primitives (V4 only) that are explicitly instantiated</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="33" NAME="C_IDELAYCTRL_LOC" TYPE="string" VALUE="IDELAYCTRL_X0Y6-IDELAYCTRL_X0Y2-IDELAYCTRL_X0Y1">
<DESCRIPTION>LOC Constraints of IDELAYCTRL Primitive</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="34" NAME="C_READ_DATA_PIPELINE" TYPE="integer" VALUE="0">
<DESCRIPTION>Read Data Pipeline</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="35" NAME="C_DQS_IO_COL" VALUE="0b000000000000000000">
<DESCRIPTION>IO Column Location of DQS Groups</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="36" NAME="C_DQ_IO_MS" VALUE="0b000000000111010100111101000011110001111000101110110000111100000110111100">
<DESCRIPTION>Master Slave Location of DQ IO</DESCRIPTION>
</PARAMETER>
<MEMORYMAP>
<MEMRANGE BASEDECIMAL="0" BASENAME="C_MEM_BASEADDR" BASEVALUE="0x00000000" HIGHDECIMAL="268435455" HIGHNAME="C_MEM_HIGHADDR" HIGHVALUE="0x0fffffff" IS_CACHEABLE="TRUE" MEMTYPE="MEMORY" SIZE="268435456" SIZEABRV="256M">
<SLVINTERFACES>
<BUSINTERFACE NAME="PPC440MC"/>
</SLVINTERFACES>
</MEMRANGE>
</MEMORYMAP>
<PORT CLKFREQUENCY="125000000" DIR="I" IS_INMHS="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="mc_mibclk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
<PORT CLKFREQUENCY="125000000" DIR="I" IS_INMHS="TRUE" MHS_INDEX="1" MPD_INDEX="1" NAME="mi_mcclk90" SIGIS="CLK" SIGNAME="clk_125_0000MHz90PLL0_ADJUST"/>
<PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="2" MPD_INDEX="2" NAME="mi_mcreset" SIGIS="RST" SIGNAME="sys_bus_reset"/>
<PORT CLKFREQUENCY="62500000" DIR="I" IS_INMHS="TRUE" MHS_INDEX="3" MPD_INDEX="3" NAME="mi_mcclkdiv2" SIGIS="CLK" SIGNAME="clk_62_5000MHzPLL0_ADJUST"/>
<PORT CLKFREQUENCY="200000000" DIR="I" IS_INMHS="TRUE" MHS_INDEX="4" MPD_INDEX="4" NAME="mi_mcclk_200" SIGIS="CLK" SIGNAME="clk_200_0000MHz"/>
<PORT DIR="IO" ENDIAN="LITTLE" IS_INMHS="TRUE" LSB="0" MHS_INDEX="5" MPD_INDEX="17" MSB="63" NAME="DDR2_DQ" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_DQ_pin" VECFORMULA="[(C_DDR_DWIDTH-1):0]"/>
<PORT DIR="IO" ENDIAN="LITTLE" IS_INMHS="TRUE" LSB="0" MHS_INDEX="6" MPD_INDEX="18" MSB="7" NAME="DDR2_DQS" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_DQS_pin" VECFORMULA="[(C_DDR_DQS_WIDTH-1):0]"/>
<PORT DIR="IO" ENDIAN="LITTLE" IS_INMHS="TRUE" LSB="0" MHS_INDEX="7" MPD_INDEX="19" MSB="7" NAME="DDR2_DQS_N" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_DQS_N_pin" VECFORMULA="[(C_DDR_DQS_WIDTH-1):0]"/>
<PORT DIR="O" ENDIAN="LITTLE" IS_INMHS="TRUE" LSB="0" MHS_INDEX="8" MPD_INDEX="20" MSB="12" NAME="DDR2_A" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_A_pin" VECFORMULA="[(C_DDR_RAWIDTH-1):0]"/>
<PORT DIR="O" ENDIAN="LITTLE" IS_INMHS="TRUE" LSB="0" MHS_INDEX="9" MPD_INDEX="21" MSB="1" NAME="DDR2_BA" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_BA_pin" VECFORMULA="[(C_DDR_BAWIDTH-1):0]"/>
<PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="10" MPD_INDEX="22" NAME="DDR2_RAS_N" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_RAS_N_pin"/>
<PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="11" MPD_INDEX="23" NAME="DDR2_CAS_N" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_CAS_N_pin"/>
<PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="12" MPD_INDEX="24" NAME="DDR2_WE_N" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_WE_N_pin"/>
<PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="13" MPD_INDEX="25" NAME="DDR2_CS_N" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_CS_N_pin" VECFORMULA="[(C_NUM_RANKS_MEM-1):0]"/>
<PORT DIR="O" ENDIAN="LITTLE" IS_INMHS="TRUE" LSB="0" MHS_INDEX="14" MPD_INDEX="26" MSB="1" NAME="DDR2_ODT" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_ODT_pin" VECFORMULA="[(C_DDR2_ODT_WIDTH-1):0]"/>
<PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="15" MPD_INDEX="27" NAME="DDR2_CKE" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_CKE_pin" VECFORMULA="[(C_NUM_RANKS_MEM-1):0]"/>
<PORT DIR="O" ENDIAN="LITTLE" IS_INMHS="TRUE" LSB="0" MHS_INDEX="16" MPD_INDEX="28" MSB="7" NAME="DDR2_DM" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_DM_pin" VECFORMULA="[(C_DDR_DM_WIDTH-1):0]"/>
<PORT DIR="O" ENDIAN="LITTLE" IS_INMHS="TRUE" LSB="0" MHS_INDEX="17" MPD_INDEX="29" MSB="1" NAME="DDR2_CK" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_CK_pin" VECFORMULA="[(C_NUM_CLK_PAIRS-1):0]"/>
<PORT DIR="O" ENDIAN="LITTLE" IS_INMHS="TRUE" LSB="0" MHS_INDEX="18" MPD_INDEX="30" MSB="1" NAME="DDR2_CK_N" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_CK_N_pin" VECFORMULA="[(C_NUM_CLK_PAIRS-1):0]"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_mimcaddressvalid" DIR="I" MPD_INDEX="5" NAME="mi_mcaddressvalid" SIGNAME="ppc440_0_PPC440MC_mimcaddressvalid"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_mimcaddress" DIR="I" MPD_INDEX="6" NAME="mi_mcaddress" SIGNAME="ppc440_0_PPC440MC_mimcaddress" VECFORMULA="[0:35]"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_mimcbankconflict" DIR="I" MPD_INDEX="7" NAME="mi_mcbankconflict" SIGNAME="ppc440_0_PPC440MC_mimcbankconflict"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_mimcrowconflict" DIR="I" MPD_INDEX="8" NAME="mi_mcrowconflict" SIGNAME="ppc440_0_PPC440MC_mimcrowconflict"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_mimcbyteenable" DIR="I" MPD_INDEX="9" NAME="mi_mcbyteenable" SIGNAME="ppc440_0_PPC440MC_mimcbyteenable" VECFORMULA="[0:15]"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_mimcwritedata" DIR="I" MPD_INDEX="10" NAME="mi_mcwritedata" SIGNAME="ppc440_0_PPC440MC_mimcwritedata" VECFORMULA="[0:127]"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_mimcreadnotwrite" DIR="I" MPD_INDEX="11" NAME="mi_mcreadnotwrite" SIGNAME="ppc440_0_PPC440MC_mimcreadnotwrite"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_mimcwritedatavalid" DIR="I" MPD_INDEX="12" NAME="mi_mcwritedatavalid" SIGNAME="ppc440_0_PPC440MC_mimcwritedatavalid"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_mcmiaddrreadytoaccept" DIR="O" MPD_INDEX="13" NAME="mc_miaddrreadytoaccept" SIGNAME="ppc440_0_PPC440MC_mcmiaddrreadytoaccept"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_mcmireaddata" DIR="O" MPD_INDEX="14" NAME="mc_mireaddata" SIGNAME="ppc440_0_PPC440MC_mcmireaddata" VECFORMULA="[0:127]"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_mcmireaddataerr" DIR="O" MPD_INDEX="15" NAME="mc_mireaddataerr" SIGNAME="ppc440_0_PPC440MC_mcmireaddataerr"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_mcmireaddatavalid" DIR="O" MPD_INDEX="16" NAME="mc_mireaddatavalid" SIGNAME="ppc440_0_PPC440MC_mcmireaddatavalid"/>
<BUSINTERFACE BUSNAME="ppc440_0_PPC440MC" BUSSTD="XIL" BUSSTD_PSF="XIL_PPC440MC" IS_INMHS="TRUE" MPD_INDEX="0" NAME="PPC440MC" TYPE="TARGET"/>
</MODULE>
<MODULE HWVERSION="1.01.a" INSTANCE="SysACE_CompactFlash" IPTYPE="PERIPHERAL" MHS_INDEX="15" MODCLASS="PERIPHERAL" MODTYPE="xps_sysace">
<DESCRIPTION TYPE="SHORT">XPS System ACE Interface Controller(Compact Flash)</DESCRIPTION>
<DESCRIPTION TYPE="LONG">Interface between the PLBV46 and the Microprocessor Interface (MPU) of the System ACE Compact Flash solution peripheral</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/xps_sysace_v1_01_a/doc/xps_sysace.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="0" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0x83600000">
<DESCRIPTION>Base Address</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="1" NAME="C_HIGHADDR" TYPE="std_logic_vector" VALUE="0x8360ffff">
<DESCRIPTION>High Address</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="2" NAME="C_MEM_WIDTH" TYPE="INTEGER" VALUE="16">
<DESCRIPTION>Width of System ACE Data Bus </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="3" NAME="C_SPLB_AWIDTH" TYPE="INTEGER" VALUE="32">
<DESCRIPTION>PLB Address Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="4" NAME="C_SPLB_DWIDTH" TYPE="INTEGER" VALUE="128">
<DESCRIPTION>PLB Data Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="5" NAME="C_SPLB_P2P" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>PLB Slave Uses P2P Topology</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="6" NAME="C_SPLB_MID_WIDTH" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Master ID Bus Width of PLB</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="7" NAME="C_SPLB_NUM_MASTERS" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Number of PLB Masters</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="8" NAME="C_SPLB_NATIVE_DWIDTH" TYPE="INTEGER" VALUE="32">
<DESCRIPTION>Native Data Bus Width of PLB Slave</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="9" NAME="C_SPLB_SUPPORT_BURSTS" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>PLB Slave is Capable of Bursts</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="10" NAME="C_FAMILY" TYPE="STRING" VALUE="virtex5">
<DESCRIPTION>Device Family</DESCRIPTION>
</PARAMETER>
<MEMORYMAP>
<MEMRANGE BASEDECIMAL="2204106752" BASENAME="C_BASEADDR" BASEVALUE="0x83600000" HIGHDECIMAL="2204172287" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8360ffff" MEMTYPE="REGISTER" MINSIZE="0x80" SIZE="65536" SIZEABRV="64K">
<SLVINTERFACES>
<BUSINTERFACE NAME="SPLB"/>
</SLVINTERFACES>
</MEMRANGE>
</MEMORYMAP>
<PORT DIR="O" ENDIAN="LITTLE" IS_INMHS="TRUE" LSB="0" MHS_INDEX="0" MPD_INDEX="42" MSB="6" NAME="SysACE_MPA" SIGNAME="fpga_0_SysACE_CompactFlash_SysACE_MPA_pin" VECFORMULA="[6:0]">
<DESCRIPTION>Address Input</DESCRIPTION>
</PORT>
<PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="1" MPD_INDEX="43" NAME="SysACE_CLK" SIGNAME="fpga_0_SysACE_CompactFlash_SysACE_CLK_pin">
<DESCRIPTION>Clock Input</DESCRIPTION>
</PORT>
<PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="2" MPD_INDEX="44" NAME="SysACE_MPIRQ" SIGNAME="fpga_0_SysACE_CompactFlash_SysACE_MPIRQ_pin">
<DESCRIPTION>Active high Interrupt Output</DESCRIPTION>
</PORT>
<PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="3" MPD_INDEX="48" NAME="SysACE_CEN" SIGNAME="fpga_0_SysACE_CompactFlash_SysACE_CEN_pin">
<DESCRIPTION>Active LOW Chip Enable</DESCRIPTION>
</PORT>
<PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="4" MPD_INDEX="49" NAME="SysACE_OEN" SIGNAME="fpga_0_SysACE_CompactFlash_SysACE_OEN_pin">
<DESCRIPTION>Active LOW Output Enable</DESCRIPTION>
</PORT>
<PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="5" MPD_INDEX="50" NAME="SysACE_WEN" SIGNAME="fpga_0_SysACE_CompactFlash_SysACE_WEN_pin">
<DESCRIPTION>Active LOW Write Enable</DESCRIPTION>
</PORT>
<PORT DIR="IO" ENDIAN="LITTLE" IS_INMHS="TRUE" LSB="0" MHS_INDEX="6" MPD_INDEX="52" MSB="15" NAME="SysACE_MPD" SIGNAME="fpga_0_SysACE_CompactFlash_SysACE_MPD_pin" VECFORMULA="[(C_MEM_WIDTH-1):0]">
<DESCRIPTION>Data Input/Output</DESCRIPTION>
</PORT>
<PORT BUS="SPLB" CLKFREQUENCY="125000000" DEF_SIGNAME="clk_125_0000MHzPLL0_ADJUST" DIR="I" MPD_INDEX="0" NAME="SPLB_Clk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_SPLB_Rst" DIR="I" MPD_INDEX="1" NAME="SPLB_Rst" SIGIS="RST" SIGNAME="plb_v46_0_SPLB_Rst"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_ABus" DIR="I" MPD_INDEX="2" NAME="PLB_ABus" SIGNAME="plb_v46_0_PLB_ABus" VECFORMULA="[0:31]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_UABus" DIR="I" MPD_INDEX="3" NAME="PLB_UABus" SIGNAME="plb_v46_0_PLB_UABus" VECFORMULA="[0:31]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_PAValid" DIR="I" MPD_INDEX="4" NAME="PLB_PAValid" SIGNAME="plb_v46_0_PLB_PAValid"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_SAValid" DIR="I" MPD_INDEX="5" NAME="PLB_SAValid" SIGNAME="plb_v46_0_PLB_SAValid"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPrim" DIR="I" MPD_INDEX="6" NAME="PLB_rdPrim" SIGNAME="plb_v46_0_PLB_rdPrim"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPrim" DIR="I" MPD_INDEX="7" NAME="PLB_wrPrim" SIGNAME="plb_v46_0_PLB_wrPrim"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_masterID" DIR="I" MPD_INDEX="8" NAME="PLB_masterID" SIGNAME="plb_v46_0_PLB_masterID" VECFORMULA="[0:(C_SPLB_MID_WIDTH-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_abort" DIR="I" MPD_INDEX="9" NAME="PLB_abort" SIGNAME="plb_v46_0_PLB_abort"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_busLock" DIR="I" MPD_INDEX="10" NAME="PLB_busLock" SIGNAME="plb_v46_0_PLB_busLock"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_RNW" DIR="I" MPD_INDEX="11" NAME="PLB_RNW" SIGNAME="plb_v46_0_PLB_RNW"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_BE" DIR="I" MPD_INDEX="12" NAME="PLB_BE" SIGNAME="plb_v46_0_PLB_BE" VECFORMULA="[0:((C_SPLB_DWIDTH/8)-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_MSize" DIR="I" MPD_INDEX="13" NAME="PLB_MSize" SIGNAME="plb_v46_0_PLB_MSize" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_size" DIR="I" MPD_INDEX="14" NAME="PLB_size" SIGNAME="plb_v46_0_PLB_size" VECFORMULA="[0:3]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_type" DIR="I" MPD_INDEX="15" NAME="PLB_type" SIGNAME="plb_v46_0_PLB_type" VECFORMULA="[0:2]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_lockErr" DIR="I" MPD_INDEX="16" NAME="PLB_lockErr" SIGNAME="plb_v46_0_PLB_lockErr"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrDBus" DIR="I" MPD_INDEX="17" NAME="PLB_wrDBus" SIGNAME="plb_v46_0_PLB_wrDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrBurst" DIR="I" MPD_INDEX="18" NAME="PLB_wrBurst" SIGNAME="plb_v46_0_PLB_wrBurst"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdBurst" DIR="I" MPD_INDEX="19" NAME="PLB_rdBurst" SIGNAME="plb_v46_0_PLB_rdBurst"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendReq" DIR="I" MPD_INDEX="20" NAME="PLB_wrPendReq" SIGNAME="plb_v46_0_PLB_wrPendReq"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendReq" DIR="I" MPD_INDEX="21" NAME="PLB_rdPendReq" SIGNAME="plb_v46_0_PLB_rdPendReq"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendPri" DIR="I" MPD_INDEX="22" NAME="PLB_wrPendPri" SIGNAME="plb_v46_0_PLB_wrPendPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendPri" DIR="I" MPD_INDEX="23" NAME="PLB_rdPendPri" SIGNAME="plb_v46_0_PLB_rdPendPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_reqPri" DIR="I" MPD_INDEX="24" NAME="PLB_reqPri" SIGNAME="plb_v46_0_PLB_reqPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_TAttribute" DIR="I" MPD_INDEX="25" NAME="PLB_TAttribute" SIGNAME="plb_v46_0_PLB_TAttribute" VECFORMULA="[0:15]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_addrAck" DIR="O" MPD_INDEX="26" NAME="Sl_addrAck" SIGNAME="plb_v46_0_Sl_addrAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_SSize" DIR="O" MPD_INDEX="27" NAME="Sl_SSize" SIGNAME="plb_v46_0_Sl_SSize" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wait" DIR="O" MPD_INDEX="28" NAME="Sl_wait" SIGNAME="plb_v46_0_Sl_wait"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rearbitrate" DIR="O" MPD_INDEX="29" NAME="Sl_rearbitrate" SIGNAME="plb_v46_0_Sl_rearbitrate"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrDAck" DIR="O" MPD_INDEX="30" NAME="Sl_wrDAck" SIGNAME="plb_v46_0_Sl_wrDAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrComp" DIR="O" MPD_INDEX="31" NAME="Sl_wrComp" SIGNAME="plb_v46_0_Sl_wrComp"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrBTerm" DIR="O" MPD_INDEX="32" NAME="Sl_wrBTerm" SIGNAME="plb_v46_0_Sl_wrBTerm"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDBus" DIR="O" MPD_INDEX="33" NAME="Sl_rdDBus" SIGNAME="plb_v46_0_Sl_rdDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdWdAddr" DIR="O" MPD_INDEX="34" NAME="Sl_rdWdAddr" SIGNAME="plb_v46_0_Sl_rdWdAddr" VECFORMULA="[0:3]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDAck" DIR="O" MPD_INDEX="35" NAME="Sl_rdDAck" SIGNAME="plb_v46_0_Sl_rdDAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdComp" DIR="O" MPD_INDEX="36" NAME="Sl_rdComp" SIGNAME="plb_v46_0_Sl_rdComp"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdBTerm" DIR="O" MPD_INDEX="37" NAME="Sl_rdBTerm" SIGNAME="plb_v46_0_Sl_rdBTerm"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MBusy" DIR="O" MPD_INDEX="38" NAME="Sl_MBusy" SIGNAME="plb_v46_0_Sl_MBusy" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MWrErr" DIR="O" MPD_INDEX="39" NAME="Sl_MWrErr" SIGNAME="plb_v46_0_Sl_MWrErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MRdErr" DIR="O" MPD_INDEX="40" NAME="Sl_MRdErr" SIGNAME="plb_v46_0_Sl_MRdErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MIRQ" DIR="O" MPD_INDEX="41" NAME="Sl_MIRQ" SIGNAME="plb_v46_0_Sl_MIRQ" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT DIR="I" MPD_INDEX="45" NAME="SysACE_MPD_I" SIGNAME="__NOC__" VECFORMULA="[(C_MEM_WIDTH-1):0]"/>
<PORT DIR="O" MPD_INDEX="46" NAME="SysACE_MPD_O" SIGNAME="__NOC__" VECFORMULA="[(C_MEM_WIDTH-1):0]"/>
<PORT DIR="O" MPD_INDEX="47" NAME="SysACE_MPD_T" SIGNAME="__NOC__" VECFORMULA="[(C_MEM_WIDTH-1):0]"/>
<PORT DIR="O" MPD_INDEX="51" NAME="SysACE_IRQ" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
<BUSINTERFACE BUSNAME="plb_v46_0" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_INMHS="TRUE" MPD_INDEX="0" NAME="SPLB" TYPE="SLAVE"/>
</MODULE>
<MODULE HWVERSION="3.01.a" INSTANCE="clock_generator_0" IPTYPE="PERIPHERAL" MHS_INDEX="16" MODCLASS="IP" MODTYPE="clock_generator">
<DESCRIPTION TYPE="SHORT">Clock Generator</DESCRIPTION>
<DESCRIPTION TYPE="LONG">Clock generator for processor system.</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/clock_generator_v3_01_a/doc/clock_generator.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETER MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="virtex5"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_SPEEDGRADE" TYPE="STRING" VALUE="-1"/>
<PARAMETER MPD_INDEX="2" NAME="C_EXT_RESET_HIGH" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="3" NAME="C_CLK_GEN" TYPE="STRING" VALUE="update"/>
<PARAMETER MPD_INDEX="4" NAME="C_CLKOUT0_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="5" NAME="C_CLKOUT0_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="6" NAME="C_CLKOUT1_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="7" NAME="C_CLKOUT1_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="8" NAME="C_CLKOUT2_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="9" NAME="C_CLKOUT2_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="10" NAME="C_CLKOUT3_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="11" NAME="C_CLKOUT3_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="12" NAME="C_CLKOUT4_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="13" NAME="C_CLKOUT4_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="14" NAME="C_CLKOUT5_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="15" NAME="C_CLKOUT5_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="16" NAME="C_CLKOUT6_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="17" NAME="C_CLKOUT6_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="18" NAME="C_CLKOUT7_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="19" NAME="C_CLKOUT7_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="20" NAME="C_CLKOUT8_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="21" NAME="C_CLKOUT8_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="22" NAME="C_CLKOUT9_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="23" NAME="C_CLKOUT9_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="24" NAME="C_CLKOUT10_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="25" NAME="C_CLKOUT10_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="26" NAME="C_CLKOUT11_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="27" NAME="C_CLKOUT11_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="28" NAME="C_CLKOUT12_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="29" NAME="C_CLKOUT12_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="30" NAME="C_CLKOUT13_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="31" NAME="C_CLKOUT13_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="32" NAME="C_CLKOUT14_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="33" NAME="C_CLKOUT14_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="34" NAME="C_CLKOUT15_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="35" NAME="C_CLKOUT15_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="36" NAME="C_CLKFBOUT_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="37" NAME="C_CLKFBOUT_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="38" NAME="C_PSDONE_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="39" NAME="C_PLL0_DIVCLK_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="40" NAME="C_PLL0_CLKFBOUT_MULT" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="41" NAME="C_PLL0_CLKFBOUT_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="42" NAME="C_PLL0_CLKIN1_PERIOD" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="43" NAME="C_PLL0_CLKOUT0_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="44" NAME="C_PLL0_CLKOUT0_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="45" NAME="C_PLL0_CLKOUT0_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="46" NAME="C_PLL0_CLKOUT1_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="47" NAME="C_PLL0_CLKOUT1_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="48" NAME="C_PLL0_CLKOUT1_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="49" NAME="C_PLL0_CLKOUT2_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="50" NAME="C_PLL0_CLKOUT2_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="51" NAME="C_PLL0_CLKOUT2_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="52" NAME="C_PLL0_CLKOUT3_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="53" NAME="C_PLL0_CLKOUT3_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="54" NAME="C_PLL0_CLKOUT3_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="55" NAME="C_PLL0_CLKOUT4_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="56" NAME="C_PLL0_CLKOUT4_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="57" NAME="C_PLL0_CLKOUT4_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="58" NAME="C_PLL0_CLKOUT5_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="59" NAME="C_PLL0_CLKOUT5_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="60" NAME="C_PLL0_CLKOUT5_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="61" NAME="C_PLL0_BANDWIDTH" TYPE="STRING" VALUE="OPTIMIZED"/>
<PARAMETER MPD_INDEX="62" NAME="C_PLL0_COMPENSATION" TYPE="STRING" VALUE="SYSTEM_SYNCHRONOUS"/>
<PARAMETER MPD_INDEX="63" NAME="C_PLL0_REF_JITTER" TYPE="REAL" VALUE="0.100000"/>
<PARAMETER MPD_INDEX="64" NAME="C_PLL0_RESET_ON_LOSS_OF_LOCK" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="65" NAME="C_PLL0_RST_DEASSERT_CLK" TYPE="STRING" VALUE="CLKIN1"/>
<PARAMETER MPD_INDEX="66" NAME="C_PLL0_EXT_RESET_HIGH" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="67" NAME="C_PLL0_FAMILY" TYPE="STRING" VALUE="virtex5"/>
<PARAMETER MPD_INDEX="68" NAME="C_PLL0_CLKOUT0_DESKEW_ADJUST" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="69" NAME="C_PLL0_CLKOUT1_DESKEW_ADJUST" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="70" NAME="C_PLL0_CLKOUT2_DESKEW_ADJUST" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="71" NAME="C_PLL0_CLKOUT3_DESKEW_ADJUST" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="72" NAME="C_PLL0_CLKOUT4_DESKEW_ADJUST" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="73" NAME="C_PLL0_CLKOUT5_DESKEW_ADJUST" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="74" NAME="C_PLL0_CLKFBOUT_DESKEW_ADJUST" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="75" NAME="C_PLL0_CLKIN1_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="76" NAME="C_PLL0_CLKFBOUT_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="77" NAME="C_PLL0_CLKOUT0_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="78" NAME="C_PLL0_CLKOUT1_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="79" NAME="C_PLL0_CLKOUT2_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="80" NAME="C_PLL0_CLKOUT3_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="81" NAME="C_PLL0_CLKOUT4_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="82" NAME="C_PLL0_CLKOUT5_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="83" NAME="C_PLL0_CLKIN1_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="84" NAME="C_PLL0_CLKIN1_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="85" NAME="C_PLL0_CLKFBIN_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="86" NAME="C_PLL0_CLKFBIN_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="87" NAME="C_PLL0_RST_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="88" NAME="C_PLL1_DIVCLK_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="89" NAME="C_PLL1_CLKFBOUT_MULT" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="90" NAME="C_PLL1_CLKFBOUT_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="91" NAME="C_PLL1_CLKIN1_PERIOD" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="92" NAME="C_PLL1_CLKOUT0_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="93" NAME="C_PLL1_CLKOUT0_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="94" NAME="C_PLL1_CLKOUT0_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="95" NAME="C_PLL1_CLKOUT1_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="96" NAME="C_PLL1_CLKOUT1_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="97" NAME="C_PLL1_CLKOUT1_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="98" NAME="C_PLL1_CLKOUT2_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="99" NAME="C_PLL1_CLKOUT2_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="100" NAME="C_PLL1_CLKOUT2_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="101" NAME="C_PLL1_CLKOUT3_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="102" NAME="C_PLL1_CLKOUT3_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="103" NAME="C_PLL1_CLKOUT3_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="104" NAME="C_PLL1_CLKOUT4_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="105" NAME="C_PLL1_CLKOUT4_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="106" NAME="C_PLL1_CLKOUT4_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="107" NAME="C_PLL1_CLKOUT5_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="108" NAME="C_PLL1_CLKOUT5_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="109" NAME="C_PLL1_CLKOUT5_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="110" NAME="C_PLL1_BANDWIDTH" TYPE="STRING" VALUE="OPTIMIZED"/>
<PARAMETER MPD_INDEX="111" NAME="C_PLL1_COMPENSATION" TYPE="STRING" VALUE="SYSTEM_SYNCHRONOUS"/>
<PARAMETER MPD_INDEX="112" NAME="C_PLL1_REF_JITTER" TYPE="REAL" VALUE="0.100000"/>
<PARAMETER MPD_INDEX="113" NAME="C_PLL1_RESET_ON_LOSS_OF_LOCK" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="114" NAME="C_PLL1_RST_DEASSERT_CLK" TYPE="STRING" VALUE="CLKIN1"/>
<PARAMETER MPD_INDEX="115" NAME="C_PLL1_EXT_RESET_HIGH" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="116" NAME="C_PLL1_FAMILY" TYPE="STRING" VALUE="virtex5"/>
<PARAMETER MPD_INDEX="117" NAME="C_PLL1_CLKOUT0_DESKEW_ADJUST" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="118" NAME="C_PLL1_CLKOUT1_DESKEW_ADJUST" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="119" NAME="C_PLL1_CLKOUT2_DESKEW_ADJUST" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="120" NAME="C_PLL1_CLKOUT3_DESKEW_ADJUST" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="121" NAME="C_PLL1_CLKOUT4_DESKEW_ADJUST" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="122" NAME="C_PLL1_CLKOUT5_DESKEW_ADJUST" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="123" NAME="C_PLL1_CLKFBOUT_DESKEW_ADJUST" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="124" NAME="C_PLL1_CLKIN1_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="125" NAME="C_PLL1_CLKFBOUT_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="126" NAME="C_PLL1_CLKOUT0_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="127" NAME="C_PLL1_CLKOUT1_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="128" NAME="C_PLL1_CLKOUT2_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="129" NAME="C_PLL1_CLKOUT3_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="130" NAME="C_PLL1_CLKOUT4_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="131" NAME="C_PLL1_CLKOUT5_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="132" NAME="C_PLL1_CLKIN1_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="133" NAME="C_PLL1_CLKIN1_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="134" NAME="C_PLL1_CLKFBIN_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="135" NAME="C_PLL1_CLKFBIN_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="136" NAME="C_PLL1_RST_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="137" NAME="C_DCM0_DFS_FREQUENCY_MODE" TYPE="STRING" VALUE="LOW"/>
<PARAMETER MPD_INDEX="138" NAME="C_DCM0_DLL_FREQUENCY_MODE" TYPE="STRING" VALUE="LOW"/>
<PARAMETER MPD_INDEX="139" NAME="C_DCM0_DUTY_CYCLE_CORRECTION" TYPE="BOOLEAN" VALUE="true"/>
<PARAMETER MPD_INDEX="140" NAME="C_DCM0_CLKIN_DIVIDE_BY_2" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="141" NAME="C_DCM0_CLK_FEEDBACK" TYPE="STRING" VALUE="1X"/>
<PARAMETER MPD_INDEX="142" NAME="C_DCM0_CLKOUT_PHASE_SHIFT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="143" NAME="C_DCM0_DSS_MODE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="144" NAME="C_DCM0_STARTUP_WAIT" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="145" NAME="C_DCM0_PHASE_SHIFT" TYPE="INTEGER" VALUE="0"/>
<PARAMETER MPD_INDEX="146" NAME="C_DCM0_CLKFX_MULTIPLY" TYPE="INTEGER" VALUE="4"/>
<PARAMETER MPD_INDEX="147" NAME="C_DCM0_CLKFX_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="148" NAME="C_DCM0_CLKDV_DIVIDE" TYPE="REAL" VALUE="2.000000"/>
<PARAMETER MPD_INDEX="149" NAME="C_DCM0_CLKIN_PERIOD" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="150" NAME="C_DCM0_DESKEW_ADJUST" TYPE="STRING" VALUE="SYSTEM_SYNCHRONOUS"/>
<PARAMETER MPD_INDEX="151" NAME="C_DCM0_CLKIN_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="152" NAME="C_DCM0_CLKFB_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="153" NAME="C_DCM0_CLK0_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="154" NAME="C_DCM0_CLK90_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="155" NAME="C_DCM0_CLK180_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="156" NAME="C_DCM0_CLK270_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="157" NAME="C_DCM0_CLKDV_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="158" NAME="C_DCM0_CLKDV180_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="159" NAME="C_DCM0_CLK2X_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="160" NAME="C_DCM0_CLK2X180_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="161" NAME="C_DCM0_CLKFX_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="162" NAME="C_DCM0_CLKFX180_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="163" NAME="C_DCM0_EXT_RESET_HIGH" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="164" NAME="C_DCM0_FAMILY" TYPE="STRING" VALUE="virtex5"/>
<PARAMETER MPD_INDEX="165" NAME="C_DCM0_CLKIN_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="166" NAME="C_DCM0_CLKIN_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="167" NAME="C_DCM0_CLKFB_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="168" NAME="C_DCM0_CLKFB_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="169" NAME="C_DCM0_RST_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="170" NAME="C_DCM1_DFS_FREQUENCY_MODE" TYPE="STRING" VALUE="LOW"/>
<PARAMETER MPD_INDEX="171" NAME="C_DCM1_DLL_FREQUENCY_MODE" TYPE="STRING" VALUE="LOW"/>
<PARAMETER MPD_INDEX="172" NAME="C_DCM1_DUTY_CYCLE_CORRECTION" TYPE="BOOLEAN" VALUE="true"/>
<PARAMETER MPD_INDEX="173" NAME="C_DCM1_CLKIN_DIVIDE_BY_2" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="174" NAME="C_DCM1_CLK_FEEDBACK" TYPE="STRING" VALUE="1X"/>
<PARAMETER MPD_INDEX="175" NAME="C_DCM1_CLKOUT_PHASE_SHIFT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="176" NAME="C_DCM1_DSS_MODE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="177" NAME="C_DCM1_STARTUP_WAIT" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="178" NAME="C_DCM1_PHASE_SHIFT" TYPE="INTEGER" VALUE="0"/>
<PARAMETER MPD_INDEX="179" NAME="C_DCM1_CLKFX_MULTIPLY" TYPE="INTEGER" VALUE="4"/>
<PARAMETER MPD_INDEX="180" NAME="C_DCM1_CLKFX_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="181" NAME="C_DCM1_CLKDV_DIVIDE" TYPE="REAL" VALUE="2.000000"/>
<PARAMETER MPD_INDEX="182" NAME="C_DCM1_CLKIN_PERIOD" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="183" NAME="C_DCM1_DESKEW_ADJUST" TYPE="STRING" VALUE="SYSTEM_SYNCHRONOUS"/>
<PARAMETER MPD_INDEX="184" NAME="C_DCM1_CLKIN_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="185" NAME="C_DCM1_CLKFB_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="186" NAME="C_DCM1_CLK0_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="187" NAME="C_DCM1_CLK90_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="188" NAME="C_DCM1_CLK180_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="189" NAME="C_DCM1_CLK270_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="190" NAME="C_DCM1_CLKDV_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="191" NAME="C_DCM1_CLKDV180_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="192" NAME="C_DCM1_CLK2X_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="193" NAME="C_DCM1_CLK2X180_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="194" NAME="C_DCM1_CLKFX_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="195" NAME="C_DCM1_CLKFX180_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="196" NAME="C_DCM1_EXT_RESET_HIGH" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="197" NAME="C_DCM1_FAMILY" TYPE="STRING" VALUE="virtex5"/>
<PARAMETER MPD_INDEX="198" NAME="C_DCM1_CLKIN_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="199" NAME="C_DCM1_CLKIN_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="200" NAME="C_DCM1_CLKFB_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="201" NAME="C_DCM1_CLKFB_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="202" NAME="C_DCM1_RST_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="203" NAME="C_DCM2_DFS_FREQUENCY_MODE" TYPE="STRING" VALUE="LOW"/>
<PARAMETER MPD_INDEX="204" NAME="C_DCM2_DLL_FREQUENCY_MODE" TYPE="STRING" VALUE="LOW"/>
<PARAMETER MPD_INDEX="205" NAME="C_DCM2_DUTY_CYCLE_CORRECTION" TYPE="BOOLEAN" VALUE="true"/>
<PARAMETER MPD_INDEX="206" NAME="C_DCM2_CLKIN_DIVIDE_BY_2" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="207" NAME="C_DCM2_CLK_FEEDBACK" TYPE="STRING" VALUE="1X"/>
<PARAMETER MPD_INDEX="208" NAME="C_DCM2_CLKOUT_PHASE_SHIFT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="209" NAME="C_DCM2_DSS_MODE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="210" NAME="C_DCM2_STARTUP_WAIT" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="211" NAME="C_DCM2_PHASE_SHIFT" TYPE="INTEGER" VALUE="0"/>
<PARAMETER MPD_INDEX="212" NAME="C_DCM2_CLKFX_MULTIPLY" TYPE="INTEGER" VALUE="4"/>
<PARAMETER MPD_INDEX="213" NAME="C_DCM2_CLKFX_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="214" NAME="C_DCM2_CLKDV_DIVIDE" TYPE="REAL" VALUE="2.000000"/>
<PARAMETER MPD_INDEX="215" NAME="C_DCM2_CLKIN_PERIOD" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="216" NAME="C_DCM2_DESKEW_ADJUST" TYPE="STRING" VALUE="SYSTEM_SYNCHRONOUS"/>
<PARAMETER MPD_INDEX="217" NAME="C_DCM2_CLKIN_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="218" NAME="C_DCM2_CLKFB_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="219" NAME="C_DCM2_CLK0_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="220" NAME="C_DCM2_CLK90_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="221" NAME="C_DCM2_CLK180_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="222" NAME="C_DCM2_CLK270_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="223" NAME="C_DCM2_CLKDV_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="224" NAME="C_DCM2_CLKDV180_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="225" NAME="C_DCM2_CLK2X_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="226" NAME="C_DCM2_CLK2X180_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="227" NAME="C_DCM2_CLKFX_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="228" NAME="C_DCM2_CLKFX180_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="229" NAME="C_DCM2_EXT_RESET_HIGH" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="230" NAME="C_DCM2_FAMILY" TYPE="STRING" VALUE="virtex5"/>
<PARAMETER MPD_INDEX="231" NAME="C_DCM2_CLKIN_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="232" NAME="C_DCM2_CLKIN_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="233" NAME="C_DCM2_CLKFB_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="234" NAME="C_DCM2_CLKFB_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="235" NAME="C_DCM2_RST_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="236" NAME="C_DCM3_DFS_FREQUENCY_MODE" TYPE="STRING" VALUE="LOW"/>
<PARAMETER MPD_INDEX="237" NAME="C_DCM3_DLL_FREQUENCY_MODE" TYPE="STRING" VALUE="LOW"/>
<PARAMETER MPD_INDEX="238" NAME="C_DCM3_DUTY_CYCLE_CORRECTION" TYPE="BOOLEAN" VALUE="true"/>
<PARAMETER MPD_INDEX="239" NAME="C_DCM3_CLKIN_DIVIDE_BY_2" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="240" NAME="C_DCM3_CLK_FEEDBACK" TYPE="STRING" VALUE="1X"/>
<PARAMETER MPD_INDEX="241" NAME="C_DCM3_CLKOUT_PHASE_SHIFT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="242" NAME="C_DCM3_DSS_MODE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="243" NAME="C_DCM3_STARTUP_WAIT" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="244" NAME="C_DCM3_PHASE_SHIFT" TYPE="INTEGER" VALUE="0"/>
<PARAMETER MPD_INDEX="245" NAME="C_DCM3_CLKFX_MULTIPLY" TYPE="INTEGER" VALUE="4"/>
<PARAMETER MPD_INDEX="246" NAME="C_DCM3_CLKFX_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="247" NAME="C_DCM3_CLKDV_DIVIDE" TYPE="REAL" VALUE="2.000000"/>
<PARAMETER MPD_INDEX="248" NAME="C_DCM3_CLKIN_PERIOD" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="249" NAME="C_DCM3_DESKEW_ADJUST" TYPE="STRING" VALUE="SYSTEM_SYNCHRONOUS"/>
<PARAMETER MPD_INDEX="250" NAME="C_DCM3_CLKIN_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="251" NAME="C_DCM3_CLKFB_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="252" NAME="C_DCM3_CLK0_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="253" NAME="C_DCM3_CLK90_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="254" NAME="C_DCM3_CLK180_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="255" NAME="C_DCM3_CLK270_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="256" NAME="C_DCM3_CLKDV_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="257" NAME="C_DCM3_CLKDV180_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="258" NAME="C_DCM3_CLK2X_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="259" NAME="C_DCM3_CLK2X180_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="260" NAME="C_DCM3_CLKFX_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="261" NAME="C_DCM3_CLKFX180_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="262" NAME="C_DCM3_EXT_RESET_HIGH" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="263" NAME="C_DCM3_FAMILY" TYPE="STRING" VALUE="virtex5"/>
<PARAMETER MPD_INDEX="264" NAME="C_DCM3_CLKIN_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="265" NAME="C_DCM3_CLKIN_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="266" NAME="C_DCM3_CLKFB_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="267" NAME="C_DCM3_CLKFB_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="268" NAME="C_DCM3_RST_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="269" NAME="C_MMCM0_BANDWIDTH" TYPE="STRING" VALUE="OPTIMIZED"/>
<PARAMETER MPD_INDEX="270" NAME="C_MMCM0_CLKFBOUT_MULT_F" TYPE="REAL" VALUE="1.000000"/>
<PARAMETER MPD_INDEX="271" NAME="C_MMCM0_CLKFBOUT_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="272" NAME="C_MMCM0_CLKFBOUT_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="273" NAME="C_MMCM0_CLKIN1_PERIOD" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="274" NAME="C_MMCM0_CLKOUT0_DIVIDE_F" TYPE="REAL" VALUE="1.000000"/>
<PARAMETER MPD_INDEX="275" NAME="C_MMCM0_CLKOUT0_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="276" NAME="C_MMCM0_CLKOUT0_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="277" NAME="C_MMCM0_CLKOUT1_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="278" NAME="C_MMCM0_CLKOUT1_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="279" NAME="C_MMCM0_CLKOUT1_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="280" NAME="C_MMCM0_CLKOUT2_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="281" NAME="C_MMCM0_CLKOUT2_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="282" NAME="C_MMCM0_CLKOUT2_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="283" NAME="C_MMCM0_CLKOUT3_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="284" NAME="C_MMCM0_CLKOUT3_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="285" NAME="C_MMCM0_CLKOUT3_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="286" NAME="C_MMCM0_CLKOUT4_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="287" NAME="C_MMCM0_CLKOUT4_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="288" NAME="C_MMCM0_CLKOUT4_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="289" NAME="C_MMCM0_CLKOUT4_CASCADE" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="290" NAME="C_MMCM0_CLKOUT5_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="291" NAME="C_MMCM0_CLKOUT5_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="292" NAME="C_MMCM0_CLKOUT5_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="293" NAME="C_MMCM0_CLKOUT6_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="294" NAME="C_MMCM0_CLKOUT6_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="295" NAME="C_MMCM0_CLKOUT6_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="296" NAME="C_MMCM0_CLKOUT0_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="297" NAME="C_MMCM0_CLKOUT1_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="298" NAME="C_MMCM0_CLKOUT2_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="299" NAME="C_MMCM0_CLKOUT3_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="300" NAME="C_MMCM0_CLKOUT4_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="301" NAME="C_MMCM0_CLKOUT5_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="302" NAME="C_MMCM0_CLKOUT6_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="303" NAME="C_MMCM0_COMPENSATION" TYPE="STRING" VALUE="ZHOLD"/>
<PARAMETER MPD_INDEX="304" NAME="C_MMCM0_DIVCLK_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="305" NAME="C_MMCM0_REF_JITTER1" TYPE="REAL" VALUE="0.010000"/>
<PARAMETER MPD_INDEX="306" NAME="C_MMCM0_CLKIN1_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="307" NAME="C_MMCM0_CLKFBOUT_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="308" NAME="C_MMCM0_CLOCK_HOLD" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="309" NAME="C_MMCM0_STARTUP_WAIT" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="310" NAME="C_MMCM0_EXT_RESET_HIGH" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="311" NAME="C_MMCM0_FAMILY" TYPE="STRING" VALUE="virtex6"/>
<PARAMETER MPD_INDEX="312" NAME="C_MMCM0_CLKOUT0_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="313" NAME="C_MMCM0_CLKOUT1_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="314" NAME="C_MMCM0_CLKOUT2_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="315" NAME="C_MMCM0_CLKOUT3_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="316" NAME="C_MMCM0_CLKOUT4_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="317" NAME="C_MMCM0_CLKOUT5_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="318" NAME="C_MMCM0_CLKOUT6_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="319" NAME="C_MMCM0_CLKIN1_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="320" NAME="C_MMCM0_CLKIN1_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="321" NAME="C_MMCM0_CLKFBIN_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="322" NAME="C_MMCM0_CLKFBIN_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="323" NAME="C_MMCM0_RST_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="324" NAME="C_MMCM1_BANDWIDTH" TYPE="STRING" VALUE="OPTIMIZED"/>
<PARAMETER MPD_INDEX="325" NAME="C_MMCM1_CLKFBOUT_MULT_F" TYPE="REAL" VALUE="1.000000"/>
<PARAMETER MPD_INDEX="326" NAME="C_MMCM1_CLKFBOUT_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="327" NAME="C_MMCM1_CLKFBOUT_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="328" NAME="C_MMCM1_CLKIN1_PERIOD" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="329" NAME="C_MMCM1_CLKOUT0_DIVIDE_F" TYPE="REAL" VALUE="1.000000"/>
<PARAMETER MPD_INDEX="330" NAME="C_MMCM1_CLKOUT0_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="331" NAME="C_MMCM1_CLKOUT0_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="332" NAME="C_MMCM1_CLKOUT1_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="333" NAME="C_MMCM1_CLKOUT1_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="334" NAME="C_MMCM1_CLKOUT1_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="335" NAME="C_MMCM1_CLKOUT2_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="336" NAME="C_MMCM1_CLKOUT2_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="337" NAME="C_MMCM1_CLKOUT2_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="338" NAME="C_MMCM1_CLKOUT3_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="339" NAME="C_MMCM1_CLKOUT3_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="340" NAME="C_MMCM1_CLKOUT3_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="341" NAME="C_MMCM1_CLKOUT4_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="342" NAME="C_MMCM1_CLKOUT4_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="343" NAME="C_MMCM1_CLKOUT4_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="344" NAME="C_MMCM1_CLKOUT4_CASCADE" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="345" NAME="C_MMCM1_CLKOUT5_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="346" NAME="C_MMCM1_CLKOUT5_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="347" NAME="C_MMCM1_CLKOUT5_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="348" NAME="C_MMCM1_CLKOUT6_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="349" NAME="C_MMCM1_CLKOUT6_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="350" NAME="C_MMCM1_CLKOUT6_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="351" NAME="C_MMCM1_CLKOUT0_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="352" NAME="C_MMCM1_CLKOUT1_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="353" NAME="C_MMCM1_CLKOUT2_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="354" NAME="C_MMCM1_CLKOUT3_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="355" NAME="C_MMCM1_CLKOUT4_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="356" NAME="C_MMCM1_CLKOUT5_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="357" NAME="C_MMCM1_CLKOUT6_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="358" NAME="C_MMCM1_COMPENSATION" TYPE="STRING" VALUE="ZHOLD"/>
<PARAMETER MPD_INDEX="359" NAME="C_MMCM1_DIVCLK_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="360" NAME="C_MMCM1_REF_JITTER1" TYPE="REAL" VALUE="0.010000"/>
<PARAMETER MPD_INDEX="361" NAME="C_MMCM1_CLKIN1_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="362" NAME="C_MMCM1_CLKFBOUT_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="363" NAME="C_MMCM1_CLOCK_HOLD" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="364" NAME="C_MMCM1_STARTUP_WAIT" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="365" NAME="C_MMCM1_EXT_RESET_HIGH" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="366" NAME="C_MMCM1_FAMILY" TYPE="STRING" VALUE="virtex6"/>
<PARAMETER MPD_INDEX="367" NAME="C_MMCM1_CLKOUT0_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="368" NAME="C_MMCM1_CLKOUT1_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="369" NAME="C_MMCM1_CLKOUT2_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="370" NAME="C_MMCM1_CLKOUT3_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="371" NAME="C_MMCM1_CLKOUT4_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="372" NAME="C_MMCM1_CLKOUT5_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="373" NAME="C_MMCM1_CLKOUT6_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="374" NAME="C_MMCM1_CLKIN1_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="375" NAME="C_MMCM1_CLKIN1_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="376" NAME="C_MMCM1_CLKFBIN_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="377" NAME="C_MMCM1_CLKFBIN_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="378" NAME="C_MMCM1_RST_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="379" NAME="C_MMCM2_BANDWIDTH" TYPE="STRING" VALUE="OPTIMIZED"/>
<PARAMETER MPD_INDEX="380" NAME="C_MMCM2_CLKFBOUT_MULT_F" TYPE="REAL" VALUE="1.000000"/>
<PARAMETER MPD_INDEX="381" NAME="C_MMCM2_CLKFBOUT_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="382" NAME="C_MMCM2_CLKFBOUT_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="383" NAME="C_MMCM2_CLKIN1_PERIOD" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="384" NAME="C_MMCM2_CLKOUT0_DIVIDE_F" TYPE="REAL" VALUE="1.000000"/>
<PARAMETER MPD_INDEX="385" NAME="C_MMCM2_CLKOUT0_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="386" NAME="C_MMCM2_CLKOUT0_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="387" NAME="C_MMCM2_CLKOUT1_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="388" NAME="C_MMCM2_CLKOUT1_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="389" NAME="C_MMCM2_CLKOUT1_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="390" NAME="C_MMCM2_CLKOUT2_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="391" NAME="C_MMCM2_CLKOUT2_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="392" NAME="C_MMCM2_CLKOUT2_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="393" NAME="C_MMCM2_CLKOUT3_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="394" NAME="C_MMCM2_CLKOUT3_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="395" NAME="C_MMCM2_CLKOUT3_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="396" NAME="C_MMCM2_CLKOUT4_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="397" NAME="C_MMCM2_CLKOUT4_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="398" NAME="C_MMCM2_CLKOUT4_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="399" NAME="C_MMCM2_CLKOUT4_CASCADE" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="400" NAME="C_MMCM2_CLKOUT5_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="401" NAME="C_MMCM2_CLKOUT5_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="402" NAME="C_MMCM2_CLKOUT5_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="403" NAME="C_MMCM2_CLKOUT6_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="404" NAME="C_MMCM2_CLKOUT6_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="405" NAME="C_MMCM2_CLKOUT6_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="406" NAME="C_MMCM2_CLKOUT0_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="407" NAME="C_MMCM2_CLKOUT1_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="408" NAME="C_MMCM2_CLKOUT2_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="409" NAME="C_MMCM2_CLKOUT3_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="410" NAME="C_MMCM2_CLKOUT4_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="411" NAME="C_MMCM2_CLKOUT5_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="412" NAME="C_MMCM2_CLKOUT6_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="413" NAME="C_MMCM2_COMPENSATION" TYPE="STRING" VALUE="ZHOLD"/>
<PARAMETER MPD_INDEX="414" NAME="C_MMCM2_DIVCLK_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="415" NAME="C_MMCM2_REF_JITTER1" TYPE="REAL" VALUE="0.010000"/>
<PARAMETER MPD_INDEX="416" NAME="C_MMCM2_CLKIN1_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="417" NAME="C_MMCM2_CLKFBOUT_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="418" NAME="C_MMCM2_CLOCK_HOLD" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="419" NAME="C_MMCM2_STARTUP_WAIT" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="420" NAME="C_MMCM2_EXT_RESET_HIGH" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="421" NAME="C_MMCM2_FAMILY" TYPE="STRING" VALUE="virtex6"/>
<PARAMETER MPD_INDEX="422" NAME="C_MMCM2_CLKOUT0_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="423" NAME="C_MMCM2_CLKOUT1_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="424" NAME="C_MMCM2_CLKOUT2_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="425" NAME="C_MMCM2_CLKOUT3_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="426" NAME="C_MMCM2_CLKOUT4_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="427" NAME="C_MMCM2_CLKOUT5_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="428" NAME="C_MMCM2_CLKOUT6_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="429" NAME="C_MMCM2_CLKIN1_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="430" NAME="C_MMCM2_CLKIN1_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="431" NAME="C_MMCM2_CLKFBIN_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="432" NAME="C_MMCM2_CLKFBIN_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="433" NAME="C_MMCM2_RST_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="434" NAME="C_MMCM3_BANDWIDTH" TYPE="STRING" VALUE="OPTIMIZED"/>
<PARAMETER MPD_INDEX="435" NAME="C_MMCM3_CLKFBOUT_MULT_F" TYPE="REAL" VALUE="1.000000"/>
<PARAMETER MPD_INDEX="436" NAME="C_MMCM3_CLKFBOUT_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="437" NAME="C_MMCM3_CLKFBOUT_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="438" NAME="C_MMCM3_CLKIN1_PERIOD" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="439" NAME="C_MMCM3_CLKOUT0_DIVIDE_F" TYPE="REAL" VALUE="1.000000"/>
<PARAMETER MPD_INDEX="440" NAME="C_MMCM3_CLKOUT0_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="441" NAME="C_MMCM3_CLKOUT0_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="442" NAME="C_MMCM3_CLKOUT1_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="443" NAME="C_MMCM3_CLKOUT1_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="444" NAME="C_MMCM3_CLKOUT1_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="445" NAME="C_MMCM3_CLKOUT2_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="446" NAME="C_MMCM3_CLKOUT2_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="447" NAME="C_MMCM3_CLKOUT2_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="448" NAME="C_MMCM3_CLKOUT3_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="449" NAME="C_MMCM3_CLKOUT3_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="450" NAME="C_MMCM3_CLKOUT3_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="451" NAME="C_MMCM3_CLKOUT4_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="452" NAME="C_MMCM3_CLKOUT4_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="453" NAME="C_MMCM3_CLKOUT4_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="454" NAME="C_MMCM3_CLKOUT4_CASCADE" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="455" NAME="C_MMCM3_CLKOUT5_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="456" NAME="C_MMCM3_CLKOUT5_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="457" NAME="C_MMCM3_CLKOUT5_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="458" NAME="C_MMCM3_CLKOUT6_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="459" NAME="C_MMCM3_CLKOUT6_DUTY_CYCLE" TYPE="REAL" VALUE="0.500000"/>
<PARAMETER MPD_INDEX="460" NAME="C_MMCM3_CLKOUT6_PHASE" TYPE="REAL" VALUE="0.000000"/>
<PARAMETER MPD_INDEX="461" NAME="C_MMCM3_CLKOUT0_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="462" NAME="C_MMCM3_CLKOUT1_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="463" NAME="C_MMCM3_CLKOUT2_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="464" NAME="C_MMCM3_CLKOUT3_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="465" NAME="C_MMCM3_CLKOUT4_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="466" NAME="C_MMCM3_CLKOUT5_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="467" NAME="C_MMCM3_CLKOUT6_USE_FINE_PS" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="468" NAME="C_MMCM3_COMPENSATION" TYPE="STRING" VALUE="ZHOLD"/>
<PARAMETER MPD_INDEX="469" NAME="C_MMCM3_DIVCLK_DIVIDE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="470" NAME="C_MMCM3_REF_JITTER1" TYPE="REAL" VALUE="0.010000"/>
<PARAMETER MPD_INDEX="471" NAME="C_MMCM3_CLKIN1_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="472" NAME="C_MMCM3_CLKFBOUT_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="473" NAME="C_MMCM3_CLOCK_HOLD" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="474" NAME="C_MMCM3_STARTUP_WAIT" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="475" NAME="C_MMCM3_EXT_RESET_HIGH" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="476" NAME="C_MMCM3_FAMILY" TYPE="STRING" VALUE="virtex6"/>
<PARAMETER MPD_INDEX="477" NAME="C_MMCM3_CLKOUT0_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="478" NAME="C_MMCM3_CLKOUT1_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="479" NAME="C_MMCM3_CLKOUT2_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="480" NAME="C_MMCM3_CLKOUT3_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="481" NAME="C_MMCM3_CLKOUT4_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="482" NAME="C_MMCM3_CLKOUT5_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="483" NAME="C_MMCM3_CLKOUT6_BUF" TYPE="BOOLEAN" VALUE="false"/>
<PARAMETER MPD_INDEX="484" NAME="C_MMCM3_CLKIN1_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="485" NAME="C_MMCM3_CLKIN1_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="486" NAME="C_MMCM3_CLKFBIN_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="487" NAME="C_MMCM3_CLKFBIN_PORT" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="488" NAME="C_MMCM3_RST_MODULE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="489" NAME="C_CLKIN_FREQ" TYPE="INTEGER" VALUE="100000000"/>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="490" NAME="C_CLKFBIN_FREQ" TYPE="INTEGER" VALUE="125000000"/>
<PARAMETER MPD_INDEX="491" NAME="C_CLKFBIN_DESKEW" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="492" NAME="C_PSDONE_GROUP" TYPE="STRING" VALUE="NONE"/>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="493" NAME="C_CLKOUT0_FREQ" TYPE="INTEGER" VALUE="125000000"/>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="494" NAME="C_CLKOUT0_PHASE" TYPE="INTEGER" VALUE="90"/>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="495" NAME="C_CLKOUT0_GROUP" TYPE="STRING" VALUE="PLL0_ADJUST"/>
<PARAMETER MPD_INDEX="496" NAME="C_CLKOUT0_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
<PARAMETER MPD_INDEX="497" NAME="C_CLKOUT0_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="498" NAME="C_CLKOUT1_FREQ" TYPE="INTEGER" VALUE="125000000"/>
<PARAMETER MPD_INDEX="499" NAME="C_CLKOUT1_PHASE" TYPE="INTEGER" VALUE="0"/>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="500" NAME="C_CLKOUT1_GROUP" TYPE="STRING" VALUE="PLL0"/>
<PARAMETER MPD_INDEX="501" NAME="C_CLKOUT1_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
<PARAMETER MPD_INDEX="502" NAME="C_CLKOUT1_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="503" NAME="C_CLKOUT2_FREQ" TYPE="INTEGER" VALUE="125000000"/>
<PARAMETER MPD_INDEX="504" NAME="C_CLKOUT2_PHASE" TYPE="INTEGER" VALUE="0"/>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="505" NAME="C_CLKOUT2_GROUP" TYPE="STRING" VALUE="PLL0_ADJUST"/>
<PARAMETER MPD_INDEX="506" NAME="C_CLKOUT2_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
<PARAMETER MPD_INDEX="507" NAME="C_CLKOUT2_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="508" NAME="C_CLKOUT3_FREQ" TYPE="INTEGER" VALUE="200000000"/>
<PARAMETER MPD_INDEX="509" NAME="C_CLKOUT3_PHASE" TYPE="INTEGER" VALUE="0"/>
<PARAMETER MPD_INDEX="510" NAME="C_CLKOUT3_GROUP" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="511" NAME="C_CLKOUT3_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
<PARAMETER MPD_INDEX="512" NAME="C_CLKOUT3_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="513" NAME="C_CLKOUT4_FREQ" TYPE="INTEGER" VALUE="62500000"/>
<PARAMETER MPD_INDEX="514" NAME="C_CLKOUT4_PHASE" TYPE="INTEGER" VALUE="0"/>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="515" NAME="C_CLKOUT4_GROUP" TYPE="STRING" VALUE="PLL0_ADJUST"/>
<PARAMETER MPD_INDEX="516" NAME="C_CLKOUT4_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
<PARAMETER MPD_INDEX="517" NAME="C_CLKOUT4_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
<PARAMETER MPD_INDEX="518" NAME="C_CLKOUT5_FREQ" TYPE="INTEGER" VALUE="0"/>
<PARAMETER MPD_INDEX="519" NAME="C_CLKOUT5_PHASE" TYPE="INTEGER" VALUE="0"/>
<PARAMETER MPD_INDEX="520" NAME="C_CLKOUT5_GROUP" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="521" NAME="C_CLKOUT5_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
<PARAMETER MPD_INDEX="522" NAME="C_CLKOUT5_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
<PARAMETER MPD_INDEX="523" NAME="C_CLKOUT6_FREQ" TYPE="INTEGER" VALUE="0"/>
<PARAMETER MPD_INDEX="524" NAME="C_CLKOUT6_PHASE" TYPE="INTEGER" VALUE="0"/>
<PARAMETER MPD_INDEX="525" NAME="C_CLKOUT6_GROUP" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="526" NAME="C_CLKOUT6_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
<PARAMETER MPD_INDEX="527" NAME="C_CLKOUT6_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
<PARAMETER MPD_INDEX="528" NAME="C_CLKOUT7_FREQ" TYPE="INTEGER" VALUE="0"/>
<PARAMETER MPD_INDEX="529" NAME="C_CLKOUT7_PHASE" TYPE="INTEGER" VALUE="0"/>
<PARAMETER MPD_INDEX="530" NAME="C_CLKOUT7_GROUP" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="531" NAME="C_CLKOUT7_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
<PARAMETER MPD_INDEX="532" NAME="C_CLKOUT7_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
<PARAMETER MPD_INDEX="533" NAME="C_CLKOUT8_FREQ" TYPE="INTEGER" VALUE="0"/>
<PARAMETER MPD_INDEX="534" NAME="C_CLKOUT8_PHASE" TYPE="INTEGER" VALUE="0"/>
<PARAMETER MPD_INDEX="535" NAME="C_CLKOUT8_GROUP" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="536" NAME="C_CLKOUT8_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
<PARAMETER MPD_INDEX="537" NAME="C_CLKOUT8_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
<PARAMETER MPD_INDEX="538" NAME="C_CLKOUT9_FREQ" TYPE="INTEGER" VALUE="0"/>
<PARAMETER MPD_INDEX="539" NAME="C_CLKOUT9_PHASE" TYPE="INTEGER" VALUE="0"/>
<PARAMETER MPD_INDEX="540" NAME="C_CLKOUT9_GROUP" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="541" NAME="C_CLKOUT9_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
<PARAMETER MPD_INDEX="542" NAME="C_CLKOUT9_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
<PARAMETER MPD_INDEX="543" NAME="C_CLKOUT10_FREQ" TYPE="INTEGER" VALUE="0"/>
<PARAMETER MPD_INDEX="544" NAME="C_CLKOUT10_PHASE" TYPE="INTEGER" VALUE="0"/>
<PARAMETER MPD_INDEX="545" NAME="C_CLKOUT10_GROUP" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="546" NAME="C_CLKOUT10_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
<PARAMETER MPD_INDEX="547" NAME="C_CLKOUT10_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
<PARAMETER MPD_INDEX="548" NAME="C_CLKOUT11_FREQ" TYPE="INTEGER" VALUE="0"/>
<PARAMETER MPD_INDEX="549" NAME="C_CLKOUT11_PHASE" TYPE="INTEGER" VALUE="0"/>
<PARAMETER MPD_INDEX="550" NAME="C_CLKOUT11_GROUP" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="551" NAME="C_CLKOUT11_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
<PARAMETER MPD_INDEX="552" NAME="C_CLKOUT11_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
<PARAMETER MPD_INDEX="553" NAME="C_CLKOUT12_FREQ" TYPE="INTEGER" VALUE="0"/>
<PARAMETER MPD_INDEX="554" NAME="C_CLKOUT12_PHASE" TYPE="INTEGER" VALUE="0"/>
<PARAMETER MPD_INDEX="555" NAME="C_CLKOUT12_GROUP" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="556" NAME="C_CLKOUT12_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
<PARAMETER MPD_INDEX="557" NAME="C_CLKOUT12_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
<PARAMETER MPD_INDEX="558" NAME="C_CLKOUT13_FREQ" TYPE="INTEGER" VALUE="0"/>
<PARAMETER MPD_INDEX="559" NAME="C_CLKOUT13_PHASE" TYPE="INTEGER" VALUE="0"/>
<PARAMETER MPD_INDEX="560" NAME="C_CLKOUT13_GROUP" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="561" NAME="C_CLKOUT13_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
<PARAMETER MPD_INDEX="562" NAME="C_CLKOUT13_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
<PARAMETER MPD_INDEX="563" NAME="C_CLKOUT14_FREQ" TYPE="INTEGER" VALUE="0"/>
<PARAMETER MPD_INDEX="564" NAME="C_CLKOUT14_PHASE" TYPE="INTEGER" VALUE="0"/>
<PARAMETER MPD_INDEX="565" NAME="C_CLKOUT14_GROUP" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="566" NAME="C_CLKOUT14_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
<PARAMETER MPD_INDEX="567" NAME="C_CLKOUT14_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
<PARAMETER MPD_INDEX="568" NAME="C_CLKOUT15_FREQ" TYPE="INTEGER" VALUE="0"/>
<PARAMETER MPD_INDEX="569" NAME="C_CLKOUT15_PHASE" TYPE="INTEGER" VALUE="0"/>
<PARAMETER MPD_INDEX="570" NAME="C_CLKOUT15_GROUP" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="571" NAME="C_CLKOUT15_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
<PARAMETER MPD_INDEX="572" NAME="C_CLKOUT15_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="573" NAME="C_CLKFBOUT_FREQ" TYPE="INTEGER" VALUE="125000000"/>
<PARAMETER MPD_INDEX="574" NAME="C_CLKFBOUT_PHASE" TYPE="INTEGER" VALUE="0"/>
<PARAMETER MPD_INDEX="575" NAME="C_CLKFBOUT_GROUP" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="576" NAME="C_CLKFBOUT_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
<PORT CLKFREQUENCY="100000000" DIR="I" IS_INMHS="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="CLKIN" SIGIS="CLK" SIGNAME="dcm_clk_s"/>
<PORT CLKFREQUENCY="125000000" DIR="I" IS_INMHS="TRUE" MHS_INDEX="1" MPD_INDEX="1" NAME="CLKFBIN" SIGIS="CLK" SIGNAME="SRAM_CLK_FB_s"/>
<PORT CLKFREQUENCY="125000000" DIR="O" IS_INMHS="TRUE" MHS_INDEX="2" MPD_INDEX="2" NAME="CLKOUT0" SIGIS="CLK" SIGNAME="clk_125_0000MHz90PLL0_ADJUST"/>
<PORT CLKFREQUENCY="125000000" DIR="O" IS_INMHS="TRUE" MHS_INDEX="3" MPD_INDEX="3" NAME="CLKOUT1" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0"/>
<PORT CLKFREQUENCY="125000000" DIR="O" IS_INMHS="TRUE" MHS_INDEX="4" MPD_INDEX="4" NAME="CLKOUT2" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
<PORT CLKFREQUENCY="200000000" DIR="O" IS_INMHS="TRUE" MHS_INDEX="5" MPD_INDEX="5" NAME="CLKOUT3" SIGIS="CLK" SIGNAME="clk_200_0000MHz"/>
<PORT CLKFREQUENCY="62500000" DIR="O" IS_INMHS="TRUE" MHS_INDEX="6" MPD_INDEX="6" NAME="CLKOUT4" SIGIS="CLK" SIGNAME="clk_62_5000MHzPLL0_ADJUST"/>
<PORT CLKFREQUENCY="125000000" DIR="O" IS_INMHS="TRUE" MHS_INDEX="7" MPD_INDEX="18" NAME="CLKFBOUT" SIGIS="CLK" SIGNAME="SRAM_CLK_OUT_s"/>
<PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="8" MPD_INDEX="23" NAME="RST" SIGIS="RST" SIGNAME="net_gnd"/>
<PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="9" MPD_INDEX="24" NAME="LOCKED" SIGNAME="Dcm_all_locked"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="7" NAME="CLKOUT5" SIGIS="CLK" SIGNAME="__NOC__"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="8" NAME="CLKOUT6" SIGIS="CLK" SIGNAME="__NOC__"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="9" NAME="CLKOUT7" SIGIS="CLK" SIGNAME="__NOC__"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="10" NAME="CLKOUT8" SIGIS="CLK" SIGNAME="__NOC__"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="11" NAME="CLKOUT9" SIGIS="CLK" SIGNAME="__NOC__"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="12" NAME="CLKOUT10" SIGIS="CLK" SIGNAME="__NOC__"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="13" NAME="CLKOUT11" SIGIS="CLK" SIGNAME="__NOC__"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="14" NAME="CLKOUT12" SIGIS="CLK" SIGNAME="__NOC__"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="15" NAME="CLKOUT13" SIGIS="CLK" SIGNAME="__NOC__"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="16" NAME="CLKOUT14" SIGIS="CLK" SIGNAME="__NOC__"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="17" NAME="CLKOUT15" SIGIS="CLK" SIGNAME="__NOC__"/>
<PORT DIR="I" MPD_INDEX="19" NAME="PSCLK" SIGIS="CLK" SIGNAME="__NOC__"/>
<PORT DIR="I" MPD_INDEX="20" NAME="PSEN" SIGNAME="__NOC__"/>
<PORT DIR="I" MPD_INDEX="21" NAME="PSINCDEC" SIGNAME="__NOC__"/>
<PORT DIR="O" MPD_INDEX="22" NAME="PSDONE" SIGNAME="__NOC__"/>
</MODULE>
<MODULE HWVERSION="2.01.c" INSTANCE="jtagppc_cntlr_inst" IPTYPE="PERIPHERAL" MHS_INDEX="17" MODCLASS="PERIPHERAL" MODTYPE="jtagppc_cntlr">
<DESCRIPTION TYPE="SHORT">PowerPC JTAG Controller</DESCRIPTION>
<DESCRIPTION TYPE="LONG">JTAGPPC wrapper allows the PowerPC to connect to the JTAG chain of the FPGA.</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/jtagppc_cntlr_v2_01_c/doc/jtagppc_cntlr.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_DEVICE" TYPE="string" VALUE="5vfx70t"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_NUM_PPC_USED" TYPE="integer" VALUE="1"/>
<PORT DIR="I" MPD_INDEX="0" NAME="TRSTNEG" SIGNAME="__NOC__"/>
<PORT DIR="I" MPD_INDEX="1" NAME="HALTNEG0" SIGNAME="__NOC__"/>
<PORT DIR="O" MPD_INDEX="2" NAME="DBGC405DEBUGHALT0" SIGNAME="__NOC__"/>
<PORT DIR="I" MPD_INDEX="3" NAME="HALTNEG1" SIGNAME="__NOC__"/>
<PORT DIR="O" MPD_INDEX="4" NAME="DBGC405DEBUGHALT1" SIGNAME="__NOC__"/>
<PORT BUS="JTAGPPC0" DEF_SIGNAME="ppc440_0_jtagppc_bus_C405JTGTDO" DIR="I" MPD_INDEX="5" NAME="C405JTGTDO0" SIGNAME="ppc440_0_jtagppc_bus_C405JTGTDO"/>
<PORT BUS="JTAGPPC0" DEF_SIGNAME="ppc440_0_jtagppc_bus_C405JTGTDOEN" DIR="I" MPD_INDEX="6" NAME="C405JTGTDOEN0" SIGNAME="ppc440_0_jtagppc_bus_C405JTGTDOEN"/>
<PORT BUS="JTAGPPC0" DEF_SIGNAME="ppc440_0_jtagppc_bus_JTGC405TCK" DIR="O" MPD_INDEX="7" NAME="JTGC405TCK0" SIGNAME="ppc440_0_jtagppc_bus_JTGC405TCK"/>
<PORT BUS="JTAGPPC0" DEF_SIGNAME="ppc440_0_jtagppc_bus_JTGC405TDI" DIR="O" MPD_INDEX="8" NAME="JTGC405TDI0" SIGNAME="ppc440_0_jtagppc_bus_JTGC405TDI"/>
<PORT BUS="JTAGPPC0" DEF_SIGNAME="ppc440_0_jtagppc_bus_JTGC405TMS" DIR="O" MPD_INDEX="9" NAME="JTGC405TMS0" SIGNAME="ppc440_0_jtagppc_bus_JTGC405TMS"/>
<PORT BUS="JTAGPPC0" DEF_SIGNAME="ppc440_0_jtagppc_bus_JTGC405TRSTNEG" DIR="O" MPD_INDEX="10" NAME="JTGC405TRSTNEG0" SIGNAME="ppc440_0_jtagppc_bus_JTGC405TRSTNEG"/>
<PORT BUS="JTAGPPC1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="11" NAME="C405JTGTDO1" SIGNAME="__NOC__"/>
<PORT BUS="JTAGPPC1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="12" NAME="C405JTGTDOEN1" SIGNAME="__NOC__"/>
<PORT BUS="JTAGPPC1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="13" NAME="JTGC405TCK1" SIGNAME="__NOC__"/>
<PORT BUS="JTAGPPC1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="14" NAME="JTGC405TDI1" SIGNAME="__NOC__"/>
<PORT BUS="JTAGPPC1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="15" NAME="JTGC405TMS1" SIGNAME="__NOC__"/>
<PORT BUS="JTAGPPC1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="16" NAME="JTGC405TRSTNEG1" SIGNAME="__NOC__"/>
<BUSINTERFACE BUSNAME="ppc440_0_jtagppc_bus" BUSSTD="XIL" BUSSTD_PSF="XIL_JTAGPPC" IS_INMHS="TRUE" MPD_INDEX="0" NAME="JTAGPPC0" TYPE="INITIATOR"/>
<BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_JTAGPPC" IS_VALID="FALSE" MPD_INDEX="1" NAME="JTAGPPC1" TYPE="INITIATOR"/>
</MODULE>
<MODULE HWVERSION="2.00.a" INSTANCE="proc_sys_reset_0" IPTYPE="PERIPHERAL" MHS_INDEX="18" MODCLASS="PERIPHERAL" MODTYPE="proc_sys_reset">
<DESCRIPTION TYPE="SHORT">Processor System Reset Module</DESCRIPTION>
<DESCRIPTION TYPE="LONG">Reset management module</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/proc_sys_reset_v2_00_a/doc/proc_sys_reset.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_SUBFAMILY" TYPE="string" VALUE="fx">
<DESCRIPTION>Device Subfamily</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="1" NAME="C_EXT_RST_WIDTH" TYPE="integer" VALUE="4">
<DESCRIPTION>Number of Clocks Before Input Change is Recognized On The External Reset Input </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="2" NAME="C_AUX_RST_WIDTH" TYPE="integer" VALUE="4">
<DESCRIPTION>Number of Clocks Before Input Change is Recognized On The Auxiliary Reset Input </DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" MPD_INDEX="3" NAME="C_EXT_RESET_HIGH" TYPE="std_logic" VALUE="0">
<DESCRIPTION>External Reset Active High </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="4" NAME="C_AUX_RESET_HIGH" TYPE="std_logic" VALUE="1">
<DESCRIPTION>Auxiliary Reset Active High </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="5" NAME="C_NUM_BUS_RST" TYPE="integer" VALUE="1">
<DESCRIPTION>Number of Bus Structure Reset Registered Outputs </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="6" NAME="C_NUM_PERP_RST" TYPE="integer" VALUE="1">
<DESCRIPTION>Number of Peripheral Reset Registered Outputs </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="7" NAME="C_FAMILY" VALUE="virtex5">
<DESCRIPTION>Device Family</DESCRIPTION>
</PARAMETER>
<PORT CLKFREQUENCY="125000000" DIR="I" IS_INMHS="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="Slowest_sync_clk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
<PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="1" MPD_INDEX="1" NAME="Ext_Reset_In" SIGIS="RST" SIGNAME="sys_rst_s"/>
<PORT DIR="I" IS_INMHS="TRUE" MHS_INDEX="2" MPD_INDEX="10" NAME="Dcm_locked" SIGNAME="Dcm_all_locked"/>
<PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="3" MPD_INDEX="18" NAME="Bus_Struct_Reset" SIGIS="RST" SIGNAME="sys_bus_reset" VECFORMULA="[0:C_NUM_BUS_RST-1]"/>
<PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="4" MPD_INDEX="19" NAME="Peripheral_Reset" SIGIS="RST" SIGNAME="sys_periph_reset" VECFORMULA="[0:C_NUM_PERP_RST-1]"/>
<PORT DIR="I" MPD_INDEX="2" NAME="Aux_Reset_In" SIGIS="RST" SIGNAME="__NOC__"/>
<PORT DIR="I" MPD_INDEX="3" NAME="MB_Debug_Sys_Rst" SIGIS="RST" SIGNAME="__NOC__"/>
<PORT BUS="RESETPPC0" DEF_SIGNAME="ppc_reset_bus_Core_Reset_Req" DIR="I" MPD_INDEX="4" NAME="Core_Reset_Req_0" SIGIS="RST" SIGNAME="ppc_reset_bus_Core_Reset_Req"/>
<PORT BUS="RESETPPC0" DEF_SIGNAME="ppc_reset_bus_Chip_Reset_Req" DIR="I" MPD_INDEX="5" NAME="Chip_Reset_Req_0" SIGIS="RST" SIGNAME="ppc_reset_bus_Chip_Reset_Req"/>
<PORT BUS="RESETPPC0" DEF_SIGNAME="ppc_reset_bus_System_Reset_Req" DIR="I" MPD_INDEX="6" NAME="System_Reset_Req_0" SIGIS="RST" SIGNAME="ppc_reset_bus_System_Reset_Req"/>
<PORT BUS="RESETPPC1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="7" NAME="Core_Reset_Req_1" SIGIS="RST" SIGNAME="__NOC__"/>
<PORT BUS="RESETPPC1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="8" NAME="Chip_Reset_Req_1" SIGIS="RST" SIGNAME="__NOC__"/>
<PORT BUS="RESETPPC1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="9" NAME="System_Reset_Req_1" SIGIS="RST" SIGNAME="__NOC__"/>
<PORT BUS="RESETPPC0" DEF_SIGNAME="ppc_reset_bus_RstcPPCresetcore" DIR="O" MPD_INDEX="11" NAME="RstcPPCresetcore_0" SIGIS="RST" SIGNAME="ppc_reset_bus_RstcPPCresetcore"/>
<PORT BUS="RESETPPC0" DEF_SIGNAME="ppc_reset_bus_RstsPPCresetchip" DIR="O" MPD_INDEX="12" NAME="RstcPPCresetchip_0" SIGIS="RST" SIGNAME="ppc_reset_bus_RstsPPCresetchip"/>
<PORT BUS="RESETPPC0" DEF_SIGNAME="ppc_reset_bus_RstcPPCresetsys" DIR="O" MPD_INDEX="13" NAME="RstcPPCresetsys_0" SIGIS="RST" SIGNAME="ppc_reset_bus_RstcPPCresetsys"/>
<PORT BUS="RESETPPC1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="14" NAME="RstcPPCresetcore_1" SIGIS="RST" SIGNAME="__NOC__"/>
<PORT BUS="RESETPPC1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="15" NAME="RstcPPCresetchip_1" SIGIS="RST" SIGNAME="__NOC__"/>
<PORT BUS="RESETPPC1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="16" NAME="RstcPPCresetsys_1" SIGIS="RST" SIGNAME="__NOC__"/>
<PORT DIR="O" MPD_INDEX="17" NAME="MB_Reset" SIGIS="RST" SIGNAME="__NOC__"/>
<BUSINTERFACE BUSNAME="ppc_reset_bus" BUSSTD="XIL" BUSSTD_PSF="XIL_RESETPPC" IS_INMHS="TRUE" MPD_INDEX="0" NAME="RESETPPC0" TYPE="INITIATOR"/>
<BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_RESETPPC" IS_VALID="FALSE" MPD_INDEX="1" NAME="RESETPPC1" TYPE="INITIATOR"/>
</MODULE>
<MODULE HWVERSION="2.00.a" INSTANCE="xps_intc_0" IPTYPE="PERIPHERAL" MHS_INDEX="19" MODCLASS="INTERRUPT_CNTLR" MODTYPE="xps_intc">
<DESCRIPTION TYPE="SHORT">XPS Interrupt Controller</DESCRIPTION>
<DESCRIPTION TYPE="LONG">intc core attached to the PLBV46</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="c:/devtools/Xilinx/11.1/EDK/hw/XilinxProcessorIPLib/pcores/xps_intc_v2_00_a/doc/xps_intc.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETER MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="virtex5">
<DESCRIPTION>Device Family</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="1" NAME="C_BASEADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x81800000">
<DESCRIPTION>Base Address</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" MPD_INDEX="2" NAME="C_HIGHADDR" TYPE="std_logic_vector(0 to 31)" VALUE="0x8180ffff">
<DESCRIPTION>High Address</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="3" NAME="C_SPLB_AWIDTH" TYPE="INTEGER" VALUE="32">
<DESCRIPTION>PLB Address Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="4" NAME="C_SPLB_DWIDTH" TYPE="INTEGER" VALUE="128">
<DESCRIPTION>PLB Data Bus Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="5" NAME="C_SPLB_P2P" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>PLB Slave Uses P2P Topology</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="6" NAME="C_SPLB_NUM_MASTERS" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Number of PLB Masters</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="7" NAME="C_SPLB_MID_WIDTH" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Master ID Bus Width of PLB</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="8" NAME="C_SPLB_NATIVE_DWIDTH" TYPE="INTEGER" VALUE="32">
<DESCRIPTION>Native Data Bus Width of PLB Slave</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="9" NAME="C_SPLB_SUPPORT_BURSTS" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>PLB Slave is Capable of Bursts</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="10" NAME="C_NUM_INTR_INPUTS" TYPE="INTEGER" VALUE="2">
<DESCRIPTION>Number of Interrupt Inputs </DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="11" NAME="C_KIND_OF_INTR" TYPE="std_logic_vector(31 downto 0)" VALUE="0b00000000000000000000000000000001">
<DESCRIPTION>Type of Interrupt for Each Input </DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="12" NAME="C_KIND_OF_EDGE" TYPE="std_logic_vector(31 downto 0)" VALUE="0b00000000000000000000000000000001">
<DESCRIPTION>Type of Each Edge Senstive Interrupt </DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="13" NAME="C_KIND_OF_LVL" TYPE="std_logic_vector(31 downto 0)" VALUE="0b00000000000000000000000000000000">
<DESCRIPTION>Type of Each Level Sensitive Interrupt </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="14" NAME="C_HAS_IPR" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Support IPR </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="15" NAME="C_HAS_SIE" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Support SIE </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="16" NAME="C_HAS_CIE" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Support CIE </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="17" NAME="C_HAS_IVR" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Support IVR </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="18" NAME="C_IRQ_IS_LEVEL" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>IRQ Output Use Level </DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="19" NAME="C_IRQ_ACTIVE" TYPE="std_logic" VALUE="1">
<DESCRIPTION>The Sense of IRQ Output </DESCRIPTION>
</PARAMETER>
<MEMORYMAP>
<MEMRANGE BASEDECIMAL="2172649472" BASENAME="C_BASEADDR" BASEVALUE="0x81800000" HIGHDECIMAL="2172715007" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8180ffff" MEMTYPE="REGISTER" MINSIZE="0x20" SIZE="65536" SIZEABRV="64K">
<SLVINTERFACES>
<BUSINTERFACE NAME="SPLB"/>
</SLVINTERFACES>
</MEMRANGE>
</MEMORYMAP>
<PORT DIR="I" ENDIAN="LITTLE" IS_INMHS="TRUE" LSB="0" MHS_INDEX="0" MPD_INDEX="42" MSB="1" NAME="Intr" SENSITIVITY="EDGE_RISING" SIGIS="INTERRUPT" SIGNAME="fpga_0_Ethernet_MAC_MDINT_pin&amp;RS232_Uart_1_Interrupt" VECFORMULA="[(C_NUM_INTR_INPUTS-1):0]"/>
<PORT DIR="O" IS_INMHS="TRUE" MHS_INDEX="1" MPD_INDEX="43" NAME="Irq" SENSITIVITY="EDGE_RISING" SIGIS="INTERRUPT" SIGNAME="ppc440_0_EICC440EXTIRQ"/>
<PORT BUS="SPLB" CLKFREQUENCY="125000000" DEF_SIGNAME="clk_125_0000MHzPLL0_ADJUST" DIR="I" MPD_INDEX="0" NAME="SPLB_Clk" SIGIS="CLK" SIGNAME="clk_125_0000MHzPLL0_ADJUST"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_SPLB_Rst" DIR="I" MPD_INDEX="1" NAME="SPLB_Rst" SIGIS="RST" SIGNAME="plb_v46_0_SPLB_Rst"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_ABus" DIR="I" MPD_INDEX="2" NAME="PLB_ABus" SIGNAME="plb_v46_0_PLB_ABus" VECFORMULA="[0:31]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_PAValid" DIR="I" MPD_INDEX="3" NAME="PLB_PAValid" SIGNAME="plb_v46_0_PLB_PAValid"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_masterID" DIR="I" MPD_INDEX="4" NAME="PLB_masterID" SIGNAME="plb_v46_0_PLB_masterID" VECFORMULA="[0:(C_SPLB_MID_WIDTH-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_RNW" DIR="I" MPD_INDEX="5" NAME="PLB_RNW" SIGNAME="plb_v46_0_PLB_RNW"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_BE" DIR="I" MPD_INDEX="6" NAME="PLB_BE" SIGNAME="plb_v46_0_PLB_BE" VECFORMULA="[0:((C_SPLB_DWIDTH/8)-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_size" DIR="I" MPD_INDEX="7" NAME="PLB_size" SIGNAME="plb_v46_0_PLB_size" VECFORMULA="[0:3]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_type" DIR="I" MPD_INDEX="8" NAME="PLB_type" SIGNAME="plb_v46_0_PLB_type" VECFORMULA="[0:2]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrDBus" DIR="I" MPD_INDEX="9" NAME="PLB_wrDBus" SIGNAME="plb_v46_0_PLB_wrDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_UABus" DIR="I" MPD_INDEX="10" NAME="PLB_UABus" SIGNAME="plb_v46_0_PLB_UABus" VECFORMULA="[0:31]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_SAValid" DIR="I" MPD_INDEX="11" NAME="PLB_SAValid" SIGNAME="plb_v46_0_PLB_SAValid"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPrim" DIR="I" MPD_INDEX="12" NAME="PLB_rdPrim" SIGNAME="plb_v46_0_PLB_rdPrim"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPrim" DIR="I" MPD_INDEX="13" NAME="PLB_wrPrim" SIGNAME="plb_v46_0_PLB_wrPrim"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_abort" DIR="I" MPD_INDEX="14" NAME="PLB_abort" SIGNAME="plb_v46_0_PLB_abort"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_busLock" DIR="I" MPD_INDEX="15" NAME="PLB_busLock" SIGNAME="plb_v46_0_PLB_busLock"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_MSize" DIR="I" MPD_INDEX="16" NAME="PLB_MSize" SIGNAME="plb_v46_0_PLB_MSize" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_lockErr" DIR="I" MPD_INDEX="17" NAME="PLB_lockErr" SIGNAME="plb_v46_0_PLB_lockErr"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrBurst" DIR="I" MPD_INDEX="18" NAME="PLB_wrBurst" SIGNAME="plb_v46_0_PLB_wrBurst"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdBurst" DIR="I" MPD_INDEX="19" NAME="PLB_rdBurst" SIGNAME="plb_v46_0_PLB_rdBurst"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendReq" DIR="I" MPD_INDEX="20" NAME="PLB_wrPendReq" SIGNAME="plb_v46_0_PLB_wrPendReq"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendReq" DIR="I" MPD_INDEX="21" NAME="PLB_rdPendReq" SIGNAME="plb_v46_0_PLB_rdPendReq"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendPri" DIR="I" MPD_INDEX="22" NAME="PLB_wrPendPri" SIGNAME="plb_v46_0_PLB_wrPendPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendPri" DIR="I" MPD_INDEX="23" NAME="PLB_rdPendPri" SIGNAME="plb_v46_0_PLB_rdPendPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_reqPri" DIR="I" MPD_INDEX="24" NAME="PLB_reqPri" SIGNAME="plb_v46_0_PLB_reqPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_PLB_TAttribute" DIR="I" MPD_INDEX="25" NAME="PLB_TAttribute" SIGNAME="plb_v46_0_PLB_TAttribute" VECFORMULA="[0:15]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_addrAck" DIR="O" MPD_INDEX="26" NAME="Sl_addrAck" SIGNAME="plb_v46_0_Sl_addrAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_SSize" DIR="O" MPD_INDEX="27" NAME="Sl_SSize" SIGNAME="plb_v46_0_Sl_SSize" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wait" DIR="O" MPD_INDEX="28" NAME="Sl_wait" SIGNAME="plb_v46_0_Sl_wait"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rearbitrate" DIR="O" MPD_INDEX="29" NAME="Sl_rearbitrate" SIGNAME="plb_v46_0_Sl_rearbitrate"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrDAck" DIR="O" MPD_INDEX="30" NAME="Sl_wrDAck" SIGNAME="plb_v46_0_Sl_wrDAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrComp" DIR="O" MPD_INDEX="31" NAME="Sl_wrComp" SIGNAME="plb_v46_0_Sl_wrComp"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDBus" DIR="O" MPD_INDEX="32" NAME="Sl_rdDBus" SIGNAME="plb_v46_0_Sl_rdDBus" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdDAck" DIR="O" MPD_INDEX="33" NAME="Sl_rdDAck" SIGNAME="plb_v46_0_Sl_rdDAck"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdComp" DIR="O" MPD_INDEX="34" NAME="Sl_rdComp" SIGNAME="plb_v46_0_Sl_rdComp"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MBusy" DIR="O" MPD_INDEX="35" NAME="Sl_MBusy" SIGNAME="plb_v46_0_Sl_MBusy" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MWrErr" DIR="O" MPD_INDEX="36" NAME="Sl_MWrErr" SIGNAME="plb_v46_0_Sl_MWrErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MRdErr" DIR="O" MPD_INDEX="37" NAME="Sl_MRdErr" SIGNAME="plb_v46_0_Sl_MRdErr" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_wrBTerm" DIR="O" MPD_INDEX="38" NAME="Sl_wrBTerm" SIGNAME="plb_v46_0_Sl_wrBTerm"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdWdAddr" DIR="O" MPD_INDEX="39" NAME="Sl_rdWdAddr" SIGNAME="plb_v46_0_Sl_rdWdAddr" VECFORMULA="[0:3]"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_rdBTerm" DIR="O" MPD_INDEX="40" NAME="Sl_rdBTerm" SIGNAME="plb_v46_0_Sl_rdBTerm"/>
<PORT BUS="SPLB" DEF_SIGNAME="plb_v46_0_Sl_MIRQ" DIR="O" MPD_INDEX="41" NAME="Sl_MIRQ" SIGNAME="plb_v46_0_Sl_MIRQ" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
<BUSINTERFACE BUSNAME="plb_v46_0" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_INMHS="TRUE" MPD_INDEX="0" NAME="SPLB" TYPE="SLAVE"/>
<INTERRUPTINFO INTC_INDEX="0" PROCESSOR="ppc440_0" TYPE="CONTROLLER">
<SOURCE PRIORITY="0" SIGNAME="fpga_0_Ethernet_MAC_MDINT_pin"/>
<SOURCE INSTANCE="RS232_Uart_1" PRIORITY="1" SIGNAME="RS232_Uart_1_Interrupt"/>
</INTERRUPTINFO>
</MODULE>
</MODULES>
</EDKSYSTEM>