/*********************************************************************************************************************** | |
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* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. | |
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* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved. | |
***********************************************************************************************************************/ | |
/*********************************************************************************************************************** | |
* File Name : r_cg_cgc.c | |
* Version : Code Generator for RX71M V1.00.02.02 [28 May 2015] | |
* Device(s) : R5F571MLCxFC | |
* Tool-Chain : CCRX | |
* Description : This file implements device driver for CGC module. | |
* Creation Date: 20/09/2015 | |
***********************************************************************************************************************/ | |
/*********************************************************************************************************************** | |
Pragma directive | |
***********************************************************************************************************************/ | |
/* Start user code for pragma. Do not edit comment generated here */ | |
/* End user code. Do not edit comment generated here */ | |
/*********************************************************************************************************************** | |
Includes | |
***********************************************************************************************************************/ | |
#include "r_cg_macrodriver.h" | |
#include "r_cg_cgc.h" | |
/* Start user code for include. Do not edit comment generated here */ | |
/* End user code. Do not edit comment generated here */ | |
#include "r_cg_userdefine.h" | |
/*********************************************************************************************************************** | |
Global variables and functions | |
***********************************************************************************************************************/ | |
/* Start user code for global. Do not edit comment generated here */ | |
/* End user code. Do not edit comment generated here */ | |
/*********************************************************************************************************************** | |
* Function Name: R_CGC_Create | |
* Description : This function initializes the clock generator. | |
* Arguments : None | |
* Return Value : None | |
***********************************************************************************************************************/ | |
void R_CGC_Create(void) | |
{ | |
volatile uint32_t memorywaitcycle; | |
/* Set main clock control registers */ | |
SYSTEM.MOFCR.BYTE = _00_CGC_MAINOSC_RESONATOR | _00_CGC_MAINOSC_UNDER24M; | |
SYSTEM.MOSCWTCR.BYTE = _5C_CGC_MOSCWTCR_VALUE; | |
/* Set main clock operation */ | |
SYSTEM.MOSCCR.BIT.MOSTP = 0U; | |
/* Wait for main clock oscillator wait counter overflow */ | |
while (1U != SYSTEM.OSCOVFSR.BIT.MOOVF); | |
/* Set system clock */ | |
SYSTEM.SCKCR.LONG = _00000002_CGC_PCLKD_DIV_4 | _00000020_CGC_PCLKC_DIV_4 | _00000200_CGC_PCLKB_DIV_4 | | |
_00001000_CGC_PCLKA_DIV_2 | _00020000_CGC_BCLK_DIV_4 | _00000000_CGC_ICLK_DIV_1 | | |
_20000000_CGC_FCLK_DIV_4; | |
/* Set PLL circuit */ | |
SYSTEM.PLLCR.WORD = _0000_CGC_PLL_FREQ_DIV_1 | _0000_CGC_PLL_SOURCE_MAIN | _1300_CGC_PLL_FREQ_MUL_10_0; | |
SYSTEM.PLLCR2.BIT.PLLEN = 0U; | |
/* Wait for PLL wait counter overflow */ | |
while (1U != SYSTEM.OSCOVFSR.BIT.PLOVF); | |
/* Stop sub-clock */ | |
RTC.RCR3.BIT.RTCEN = 0U; | |
/* Wait for the register modification to complete */ | |
while (0U != RTC.RCR3.BIT.RTCEN); | |
/* Stop sub-clock */ | |
SYSTEM.SOSCCR.BIT.SOSTP = 1U; | |
/* Wait for the register modification to complete */ | |
while (1U != SYSTEM.SOSCCR.BIT.SOSTP); | |
/* Wait for sub-clock oscillation stopping */ | |
while (0U != SYSTEM.OSCOVFSR.BIT.SOOVF); | |
/* Set UCLK */ | |
SYSTEM.SCKCR2.WORD = _0040_CGC_UCLK_DIV_5 | _0001_SCKCR2_BIT0; | |
/* Set BCLK */ | |
SYSTEM.SCKCR.BIT.PSTOP1 = 1U; | |
/* Set SDCLK */ | |
SYSTEM.SCKCR.BIT.PSTOP0 = 1U; | |
/* Set memory wait cycle setting register */ | |
SYSTEM.MEMWAIT.BIT.MEMWAIT = 1U; | |
memorywaitcycle = SYSTEM.MEMWAIT.LONG; | |
memorywaitcycle++; | |
/* Set clock source */ | |
SYSTEM.SCKCR3.WORD = _0400_CGC_CLOCKSOURCE_PLL; | |
/* Set LOCO */ | |
SYSTEM.LOCOCR.BIT.LCSTP = 0U; | |
} | |
/* Start user code for adding. Do not edit comment generated here */ | |
/* End user code. Do not edit comment generated here */ |