tree 32bdc8b37abf9a4f11a1f9692dbaa469fb9244e0
parent 9149af9a6f647851bafecec75d27e39056b115f9
author Devaraj Ranganna <devaraj.ranganna@arm.com> 1683823260 +0100
committer GitHub <noreply@github.com> 1683823260 -0700
gpgsig -----BEGIN PGP SIGNATURE-----
 
 wsBcBAABCAAQBQJkXRqcCRBK7hj4Ov3rIwAAuqwIAIIXvPp4zQxnvmfNvRw9mBQn
 wlEX+YFP9fnNenOf3nBApz3qvvptbWDO4p+Ky6LXpL6iiw+xFyCMEZmYfpTYknMu
 HK82pozAarQTLte8Bq3wVUCM9uvT28enQT6FMCfJ/jR1KQVfCSm8Ugpv6tGn9eYa
 JzdKH/Xz2aH1PF27dIPhF31TiUsPaptXf4NhEnWshWl+TX8scdh0SL+yZ/q/uinQ
 mTa4EB/0B2nzHxXVmgm34ZyxWgQK1wWXR6kp4r4fwfo6P4rJI4klgW1foB8Lik4Y
 P+T0QxDXIWaGOmgMX9xyMFIaS3jaMblkOdIDyVjEYeFj0hU4HH7dfF/CszGvM6g=
 =UCv/
 -----END PGP SIGNATURE-----
 

Armv8-M (except Cortex-M23) interrupt priority checking (#673)

* Armv8-M: Formatting changes

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>

* Armv8-M: Add support for interrupt priority check

FreeRTOS provides `FromISR` system calls which can be called directly
from interrupt service routines. It is crucial that the priority of
these ISRs is set to same or lower value (numerically higher) than that
of `configMAX_SYSCALL_INTERRUPT_PRIORITY`. For more information refer
to https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html.

Add a check to trigger an assert when an ISR with priority higher
(numerically lower) than `configMAX_SYSCALL_INTERRUPT_PRIORITY` calls
`FromISR` system calls if `configASSERT` macro is defined.

In addition, add a config option
`configQEMU_DISABLE_INTERRUPT_PRIO_BITS_CHECK` to disable interrupt
priority check while running on QEMU. Based on the discussion
https://gitlab.com/qemu-project/qemu/-/issues/1122, The interrupt
priority bits in QEMU do not match the real hardware. Therefore the
assert that checks the number of implemented bits and __NVIC_PRIO_BITS
will always fail. The config option
 `configQEMU_DISABLE_INTERRUPT_PRIO_BITS_CHECK` should be defined in the
`FreeRTOSConfig.h` for QEMU targets.

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>

* Use SHPR2 for calculating interrupt priority bits

This removes the dependency on the secure software to mark the interrupt
as non-secure.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>