)]}'
{
  "commit": "bb47bc02f2a8705707258c254a3cea5bc74cc9e5",
  "tree": "3d88e1f370dd753c39ecff6e1bd6689adee7a87a",
  "parents": [
    "4d9cd906d3f7c339ee3d6d64a00c416d58a8b003"
  ],
  "author": {
    "name": "Saiiijchan",
    "email": "49641410+Saiiijchan@users.noreply.github.com",
    "time": "Thu Mar 13 13:52:38 2025 +0800"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Thu Mar 13 11:22:38 2025 +0530"
  },
  "message": "RISC-V: refine fpu offset according to portFPU_REG_SIZE (#1256)\n\nSigned-off-by: wangfei_chen \u003cwangfei_chen@realsil.com.cn\u003e\nCo-authored-by: wangfei_chen \u003cwangfei_chen@realsil.com.cn\u003e",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "9afe6eef38f28d0a372a5175bf0cf4e6a658728e",
      "old_mode": 33188,
      "old_path": "portable/GCC/RISC-V/portContext.h",
      "new_id": "d191b4aea36797e1ff8ee5ab09d0f671192a7675",
      "new_mode": 33188,
      "new_path": "portable/GCC/RISC-V/portContext.h"
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}
