| ;******************** (C) COPYRIGHT 2012 STMicroelectronics ******************** | |
| ;* File Name : startup_stm32f0xx.s | |
| ;* Author : MCD Application Team | |
| ;* Version : V1.0.0RC1 | |
| ;* Date : 27-January-2012 | |
| ;* Description : STM32F0xx Devices vector table for MDK-ARM toolchain. | |
| ;* This module performs: | |
| ;* - Set the initial SP | |
| ;* - Set the initial PC == Reset_Handler | |
| ;* - Set the vector table entries with the exceptions ISR address | |
| ;* - Branches to __main in the C library (which eventually | |
| ;* calls main()). | |
| ;* After Reset the CortexM0 processor is in Thread mode, | |
| ;* priority is Privileged, and the Stack is set to Main. | |
| ;* <<< Use Configuration Wizard in Context Menu >>> | |
| ;******************************************************************************* | |
| ; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS | |
| ; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. | |
| ; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, | |
| ; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE | |
| ; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING | |
| ; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. | |
| ; FOR MORE INFORMATION PLEASE READ CAREFULLY THE LICENSE AGREEMENT FILE | |
| ; LOCATED IN THE ROOT DIRECTORY OF THIS FIRMWARE PACKAGE. | |
| ;******************************************************************************* | |
| ; Amount of memory (in bytes) allocated for Stack | |
| ; Tailor this value to your application needs | |
| ; <h> Stack Configuration | |
| ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> | |
| ; </h> | |
| Stack_Size EQU 0x00000400 | |
| AREA STACK, NOINIT, READWRITE, ALIGN=3 | |
| Stack_Mem SPACE Stack_Size | |
| __initial_sp | |
| ; <h> Heap Configuration | |
| ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> | |
| ; </h> | |
| Heap_Size EQU 0x00000200 | |
| AREA HEAP, NOINIT, READWRITE, ALIGN=3 | |
| __heap_base | |
| Heap_Mem SPACE Heap_Size | |
| __heap_limit | |
| PRESERVE8 | |
| THUMB | |
| ; Vector Table Mapped to Address 0 at Reset | |
| AREA RESET, DATA, READONLY | |
| EXPORT __Vectors | |
| EXPORT __Vectors_End | |
| EXPORT __Vectors_Size | |
| __Vectors DCD __initial_sp ; Top of Stack | |
| DCD Reset_Handler ; Reset Handler | |
| DCD NMI_Handler ; NMI Handler | |
| DCD HardFault_Handler ; Hard Fault Handler | |
| DCD 0 ; Reserved | |
| DCD 0 ; Reserved | |
| DCD 0 ; Reserved | |
| DCD 0 ; Reserved | |
| DCD 0 ; Reserved | |
| DCD 0 ; Reserved | |
| DCD 0 ; Reserved | |
| DCD SVC_Handler ; SVCall Handler | |
| DCD 0 ; Reserved | |
| DCD 0 ; Reserved | |
| DCD PendSV_Handler ; PendSV Handler | |
| DCD SysTick_Handler ; SysTick Handler | |
| ; External Interrupts | |
| DCD WWDG_IRQHandler ; Window Watchdog | |
| DCD PVD_IRQHandler ; PVD through EXTI Line detect | |
| DCD RTC_IRQHandler ; RTC through EXTI Line | |
| DCD FLASH_IRQHandler ; FLASH | |
| DCD RCC_IRQHandler ; RCC | |
| DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1 | |
| DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3 | |
| DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15 | |
| DCD TS_IRQHandler ; TS | |
| DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 | |
| DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3 | |
| DCD DMA1_Channel4_5_IRQHandler ; DMA1 Channel 4 and Channel 5 | |
| DCD ADC1_COMP_IRQHandler ; ADC1, COMP1 and COMP2 | |
| DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation | |
| DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare | |
| DCD TIM2_IRQHandler ; TIM2 | |
| DCD TIM3_IRQHandler ; TIM3 | |
| DCD TIM6_DAC_IRQHandler ; TIM6 and DAC | |
| DCD 0 ; Reserved | |
| DCD TIM14_IRQHandler ; TIM14 | |
| DCD TIM15_IRQHandler ; TIM15 | |
| DCD TIM16_IRQHandler ; TIM16 | |
| DCD TIM17_IRQHandler ; TIM17 | |
| DCD I2C1_IRQHandler ; I2C1 | |
| DCD I2C2_IRQHandler ; I2C2 | |
| DCD SPI1_IRQHandler ; SPI1 | |
| DCD SPI2_IRQHandler ; SPI2 | |
| DCD USART1_IRQHandler ; USART1 | |
| DCD USART2_IRQHandler ; USART2 | |
| DCD 0 ; Reserved | |
| DCD CEC_IRQHandler ; CEC | |
| DCD 0 ; Reserved | |
| __Vectors_End | |
| __Vectors_Size EQU __Vectors_End - __Vectors | |
| AREA |.text|, CODE, READONLY | |
| ; Reset handler routine | |
| Reset_Handler PROC | |
| EXPORT Reset_Handler [WEAK] | |
| IMPORT __main | |
| IMPORT SystemInit | |
| LDR R0, =SystemInit | |
| BLX R0 | |
| LDR R0, =__main | |
| BX R0 | |
| ENDP | |
| ; Dummy Exception Handlers (infinite loops which can be modified) | |
| NMI_Handler PROC | |
| EXPORT NMI_Handler [WEAK] | |
| B . | |
| ENDP | |
| HardFault_Handler\ | |
| PROC | |
| EXPORT HardFault_Handler [WEAK] | |
| B . | |
| ENDP | |
| SVC_Handler PROC | |
| EXPORT SVC_Handler [WEAK] | |
| B . | |
| ENDP | |
| PendSV_Handler PROC | |
| EXPORT PendSV_Handler [WEAK] | |
| B . | |
| ENDP | |
| SysTick_Handler PROC | |
| EXPORT SysTick_Handler [WEAK] | |
| B . | |
| ENDP | |
| Default_Handler PROC | |
| EXPORT WWDG_IRQHandler [WEAK] | |
| EXPORT PVD_IRQHandler [WEAK] | |
| EXPORT RTC_IRQHandler [WEAK] | |
| EXPORT FLASH_IRQHandler [WEAK] | |
| EXPORT RCC_IRQHandler [WEAK] | |
| EXPORT EXTI0_1_IRQHandler [WEAK] | |
| EXPORT EXTI2_3_IRQHandler [WEAK] | |
| EXPORT EXTI4_15_IRQHandler [WEAK] | |
| EXPORT TS_IRQHandler [WEAK] | |
| EXPORT DMA1_Channel1_IRQHandler [WEAK] | |
| EXPORT DMA1_Channel2_3_IRQHandler [WEAK] | |
| EXPORT DMA1_Channel4_5_IRQHandler [WEAK] | |
| EXPORT ADC1_COMP_IRQHandler [WEAK] | |
| EXPORT TIM1_BRK_UP_TRG_COM_IRQHandler [WEAK] | |
| EXPORT TIM1_CC_IRQHandler [WEAK] | |
| EXPORT TIM2_IRQHandler [WEAK] | |
| EXPORT TIM3_IRQHandler [WEAK] | |
| EXPORT TIM6_DAC_IRQHandler [WEAK] | |
| EXPORT TIM14_IRQHandler [WEAK] | |
| EXPORT TIM15_IRQHandler [WEAK] | |
| EXPORT TIM16_IRQHandler [WEAK] | |
| EXPORT TIM17_IRQHandler [WEAK] | |
| EXPORT I2C1_IRQHandler [WEAK] | |
| EXPORT I2C2_IRQHandler [WEAK] | |
| EXPORT SPI1_IRQHandler [WEAK] | |
| EXPORT SPI2_IRQHandler [WEAK] | |
| EXPORT USART1_IRQHandler [WEAK] | |
| EXPORT USART2_IRQHandler [WEAK] | |
| EXPORT CEC_IRQHandler [WEAK] | |
| WWDG_IRQHandler | |
| PVD_IRQHandler | |
| RTC_IRQHandler | |
| FLASH_IRQHandler | |
| RCC_IRQHandler | |
| EXTI0_1_IRQHandler | |
| EXTI2_3_IRQHandler | |
| EXTI4_15_IRQHandler | |
| TS_IRQHandler | |
| DMA1_Channel1_IRQHandler | |
| DMA1_Channel2_3_IRQHandler | |
| DMA1_Channel4_5_IRQHandler | |
| ADC1_COMP_IRQHandler | |
| TIM1_BRK_UP_TRG_COM_IRQHandler | |
| TIM1_CC_IRQHandler | |
| TIM2_IRQHandler | |
| TIM3_IRQHandler | |
| TIM6_DAC_IRQHandler | |
| TIM14_IRQHandler | |
| TIM15_IRQHandler | |
| TIM16_IRQHandler | |
| TIM17_IRQHandler | |
| I2C1_IRQHandler | |
| I2C2_IRQHandler | |
| SPI1_IRQHandler | |
| SPI2_IRQHandler | |
| USART1_IRQHandler | |
| USART2_IRQHandler | |
| CEC_IRQHandler | |
| B . | |
| ENDP | |
| ALIGN | |
| ;******************************************************************************* | |
| ; User Stack and Heap initialization | |
| ;******************************************************************************* | |
| IF :DEF:__MICROLIB | |
| EXPORT __initial_sp | |
| EXPORT __heap_base | |
| EXPORT __heap_limit | |
| ELSE | |
| IMPORT __use_two_region_memory | |
| EXPORT __user_initial_stackheap | |
| __user_initial_stackheap | |
| LDR R0, = Heap_Mem | |
| LDR R1, =(Stack_Mem + Stack_Size) | |
| LDR R2, = (Heap_Mem + Heap_Size) | |
| LDR R3, = Stack_Mem | |
| BX LR | |
| ALIGN | |
| ENDIF | |
| END | |
| ;******************* (C) COPYRIGHT 2012 STMicroelectronics *****END OF FILE***** |