)]}'
{
  "commit": "66a2773b367309a4aa92ac938ee10a34c843f4dc",
  "tree": "8fcc061d75f658ab87dda3d21358255f1dd7666e",
  "parents": [
    "2cb37c6f9c1bb9d3c39ab2f1e7c3b6c0a88daadf"
  ],
  "author": {
    "name": "Anthony Rocha",
    "email": "anthony.rocha@amd.com",
    "time": "Mon Sep 14 12:49:55 2026 -0700"
  },
  "committer": {
    "name": "Anthony Rocha",
    "email": "116300062+rusty1968@users.noreply.github.com",
    "time": "Tue Sep 15 09:38:02 2026 -0700"
  },
  "message": "feat: implement the fpga interface in caliptra_runner.py\n\nAdds an `elif interface \u003d\u003d \"fpga\":` branch alongside the existing\n\"emulator\" branch in load_and_run(). It reads the VCK190_FPGA_HOST env\nvar (FPGA_HOST constant), fails loudly with a non-zero exit if unset,\nscps the image to the board, invokes launch_openocd.sh over ssh,\ndetokenizes the captured output with the existing pw_tokenizer\nDetokenizer mechanism, and calls scan_output_for_result() (from Task 4)\nto decide pass/fail.\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "7832aeefb7d9a3e15298c4486c6b77e3b8aef4af",
      "old_mode": 33261,
      "old_path": "target/veer/tooling/caliptra_runner.py",
      "new_id": "4b4c53b286bc3d7466ceda6fd48add93a1e9c79e",
      "new_mode": 33261,
      "new_path": "target/veer/tooling/caliptra_runner.py"
    }
  ]
}