fix: address whole-branch review findings for veer fpga target

- target/veer/BUILD.bazel: add the crate_features select to the
  console rust_library that entry/config already had, so
  #[cfg(feature = "fpga")] in console.rs actually compiles in when
  building for the fpga target_type. Previously the fpga console
  backend (writing to the FPGA wrapper's debug FIFO) was dead code
  and fpga images silently kept using the emulator-only UART address.
- target/veer/tooling/caliptra_runner.py: in the fpga branch of
  load_and_run, drop the Detokenizer/detokenize_text call (this
  target's log backend is log_backend_basic, a plain-text logger, so
  detokenization was a no-op that only added a hard, unmet ELF-file
  runfiles dependency causing a FileNotFoundError at runtime) and scan
  proc.stdout directly instead. Also: print the captured device output
  so operators get diagnostics on both PASS and FAIL, add a timeout to
  the remote subprocess.run call with a TimeoutExpired handler (the
  VeeR core spins forever after signaling its exit sentinel, so an
  unreachable/stuck board no longer hangs indefinitely), and check
  proc.returncode so an outright ssh/remote failure is logged
  distinctly from "board ran but printed nothing".
- .bazelrc: forward VCK190_FPGA_HOST into the k_veer test sandbox
  (Bazel scrubs the test environment by default), matching the
  existing k_ast1060_evb pattern.