tree 0c358d3164cf6befbd11925133a6e3a3b570ca84
parent 83d57da3a06c2a9c4342ce990de6c3909dd4035b
author Anthony Rocha <anthony.rocha@amd.com> 1789421511 -0700
committer Anthony Rocha <116300062+rusty1968@users.noreply.github.com> 1789490282 -0700

ci: build the veer fpga target image on every CI run

Adds a build-only (no lab hardware needed) CI job that builds
//target/veer/unittest_runner:fpga_test under target_type=fpga, so a
regression like the console rust_library silently losing its fpga
cfg feature (caught by the final review of the fpga-target plan) gets
flagged automatically instead of only being visible under
bazel aquery. Actually running the test still requires a VCK190 board
and is left manual/opt-in.