)]}'
{
  "commit": "a40d059beddcf9327666af9380fac46992a0d578",
  "tree": "429e45160b1860d3bfc75a0bab4a9b38fbe6ab7b",
  "parents": [
    "6d3ba62f95ad8d5de0ca810f1f346cf1bc55cc03"
  ],
  "author": {
    "name": "Anthony Rocha",
    "email": "anthony.rocha@amd.com",
    "time": "Wed Jul 15 20:13:04 2026 -0700"
  },
  "committer": {
    "name": "Anthony Rocha",
    "email": "116300062+rusty1968@users.noreply.github.com",
    "time": "Thu Jul 16 06:42:47 2026 -0700"
  },
  "message": "ast10x0/hace: fix DMA cache coherency; decouple SCU from HACE ops\n",
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