)]}'
{
  "commit": "c49440637faf71d0d6c0267cc78383e5c299eafd",
  "tree": "159ce7eaceade5e48b112cf733d45d793ae2f0df",
  "parents": [
    "a4033c22e02d58f92113f4e729c9d65bf292b897"
  ],
  "author": {
    "name": "Anthony Rocha",
    "email": "anthony.rocha@amd.com",
    "time": "Mon Sep 14 13:17:06 2026 -0700"
  },
  "committer": {
    "name": "Anthony Rocha",
    "email": "116300062+rusty1968@users.noreply.github.com",
    "time": "Tue Sep 15 09:38:02 2026 -0700"
  },
  "message": "build: add a manual fpga_test target for the veer unittest runner\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "ada0f88f91dc6d13b37e6412433d67b82eb4b947",
      "old_mode": 33188,
      "old_path": "target/veer/unittest_runner/BUILD.bazel",
      "new_id": "c0e6c2224ea938636b643557084a13b9e44cbe8d",
      "new_mode": 33188,
      "new_path": "target/veer/unittest_runner/BUILD.bazel"
    }
  ]
}