)]}'
{
  "commit": "fe88726b075d748c0bdaddee0dae4669c8730632",
  "tree": "7c67c9c14baa9412d9f97d98c71c0466a7980d22",
  "parents": [
    "8ad1ca0088c6c427fe98c2bdb7bfe663c0879d6f"
  ],
  "author": {
    "name": "Steven Lee",
    "email": "steven_lee@aspeedtech.com",
    "time": "Thu Jun 04 14:30:57 2026 +0800"
  },
  "committer": {
    "name": "Steven Lee",
    "email": "steven_lee@aspeedtech.com",
    "time": "Fri Jul 24 12:41:07 2026 +0800"
  },
  "message": "Move I3C register operations into the I3cRegisters facade\n\nComplete the SmcRegisters alignment: instead of only confining the\npointer derefs, every register operation now goes through an\nintent-named method on I3cRegisters (enable_controller_primary,\nassert_all_queue_resets, dat_program_addr, ...), so hardware.rs is pure\nprotocol logic with zero PAC register types and zero MMIO unsafe. Its\nremaining unsafe is non-MMIO only: the IRQ-registry critical-section\nleaves, the forwarded constructor gate, the curr_xfer handoff cast, and\nthe transfer buffer re-slicing.\n\nThe per-bus I3C-global reg0/reg1 dispatch and the eight-slot DAT\ndispatch move into private macros inside the facade (the bus index\nalready lives there), deleting the macro layer from hardware.rs along\nwith its unreachable fallback arms. The FIFO word loops sink into the\nfacade as tx_fifo_write/rx_fifo_read/rx_fifo_drain/ibi_fifo_*, which\nalso retires the closure-taking rd_fifo/drain_fifo trait methods.\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "7463987b1a73e52875926f38babbdc8362c93f46",
      "old_mode": 33188,
      "old_path": "target/ast10x0/peripherals/i3c/hardware.rs",
      "new_id": "98e639ed70c60cf02dd938375a7d4fcb088d4a37",
      "new_mode": 33188,
      "new_path": "target/ast10x0/peripherals/i3c/hardware.rs"
    },
    {
      "type": "modify",
      "old_id": "7292e02ee82095d206263bd25a7e647c17175421",
      "old_mode": 33188,
      "old_path": "target/ast10x0/peripherals/i3c/registers.rs",
      "new_id": "d11e41ca4734732bff053029e206421ec2b887a9",
      "new_mode": 33188,
      "new_path": "target/ast10x0/peripherals/i3c/registers.rs"
    }
  ]
}