)]}'
{
  "commit": "c6cbdac84a99e580ba8e3d3e668bf797fe3f57a3",
  "tree": "f2c9796ad574d66b4605f742602cb7ec5c733611",
  "parents": [
    "b2c650bb25f3e2dd94e08df2072f89085f076cec"
  ],
  "author": {
    "name": "Anthony Rocha",
    "email": "anthony.rocha@amd.com",
    "time": "Mon Jun 01 22:45:29 2026 -0700"
  },
  "committer": {
    "name": "Anthony Rocha",
    "email": "anthony.rocha@amd.com",
    "time": "Mon Jun 01 22:45:29 2026 -0700"
  },
  "message": "Add i3c module with pointer-based architecture and minimal coupling\n\nIntegrate i3c controller from aspeed-rust into peripherals crate with:\n- Raw pointer architecture: Replace generic Instance trait with direct\n  *const pointers to i3c and i3cglobal register blocks\n- Yield closure pattern: Use Y: FnMut(u32) for cooperative polling instead\n  of blocking DelayNs trait calls\n- No SCU coupling: Remove all SCU reset/clock operations; caller responsible\n  for pre-initialization\n- No Logger coupling: Remove Logger trait; provide no-op stubs in common.rs\n- Aligned with i2c module design: Minimal hardware abstraction layer with\n  safe helper methods for register access\n\nComplete build with all tests passing.\n\nCo-Authored-By: Claude Haiku 4.5 \u003cnoreply@anthropic.com\u003e\n",
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