)]}'
{
  "commit": "79ddd63e0a3fe13beada13c6f9d6a53e4c11bf81",
  "tree": "58519ba82c6b6e96d23735075deddb37cb4af17d",
  "parents": [
    "99f146e04bcaf3129491388e83b5e5bea08b8e74"
  ],
  "author": {
    "name": "Christina Quast",
    "email": "christina.quast@9elements.com",
    "time": "Sun Oct 04 19:20:32 2026 +0200"
  },
  "committer": {
    "name": "Christina Quast",
    "email": "chrysh.ng+github@gmail.com",
    "time": "Sun Oct 04 21:02:43 2026 +0200"
  },
  "message": "orchestrator: Say start, not arm, outside the watchdogs\n\nBootWatch::arm becomes BootWatch::start and Phase::Armed becomes\nPhase::Started. The trait doc already said \"starts a fresh attempt\", so\nthe name now says what the method does.\n\nArm stays where a deadline is involved: the boot and commit watchdogs,\nthe timer, and BootWatchdogs in the server. It also stays in the i2c,\ni3c, usart and sgpiom drivers, which are not ours.\n\nThe rest is prose. The trial-boot record is set pending, matching\nset_trial_pending and is_pending on the trait. The SPI write filter is\nenabled, which is what the register does. The GPIO boot monitor cannot\nclear the latch.\n\nAssisted-by: Claude\n",
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