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| <div id="projectbrief">CMSIS-CORE support for Cortex-M processor-based devices</div> |
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| <div class="title">Startup File startup_<device>.s </div> </div> |
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| <div class="contents"> |
| <div class="textblock"><p>The <a class="el" href="startup_s_pg.html">Startup File startup_<device>.s</a> contains:</p> |
| <ul> |
| <li>The reset handler which is executed after CPU reset and typically calls the <a class="el" href="group__system__init__gr.html#ga93f514700ccf00d08dbdcff7f1224eb2">SystemInit</a> function.</li> |
| <li>The setup values for the Main Stack Pointer (MSP).</li> |
| <li>Exception vectors of the Cortex-M Processor with weak functions that implement default routines.</li> |
| <li>Interrupt vectors that are device specific with weak functions that implement default routines.</li> |
| </ul> |
| <p>The file exists for each supported toolchain and is the only tool-chain specific CMSIS file.</p> |
| <p>To adapt the file to a new device only the interrupt vector table needs to be extended with the device-specific interrupt handlers. The naming convention for the interrupt handler names are <interrupt_name>_IRQHandler. This table needs to be consistent with <a class="el" href="group___n_v_i_c__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> that defines all the IRQ numbers for each interrupt.</p> |
| <p><b>Example:</b> </p> |
| <p>The following example shows the extension of the interrupt vector table for the LPC1100 device family.</p> |
| <div class="fragment"><div class="line"> ; External Interrupts</div> |
| <div class="line"> DCD WAKEUP0_IRQHandler ; 16+ 0: Wakeup PIO0.0</div> |
| <div class="line"> DCD WAKEUP1_IRQHandler ; 16+ 1: Wakeup PIO0.1</div> |
| <div class="line"> DCD WAKEUP2_IRQHandler ; 16+ 2: Wakeup PIO0.2</div> |
| <div class="line"> : :</div> |
| <div class="line"> : :</div> |
| <div class="line"> DCD EINT1_IRQHandler ; 16+30: PIO INT1</div> |
| <div class="line"> DCD EINT0_IRQHandler ; 16+31: PIO INT0</div> |
| <div class="line"> : </div> |
| <div class="line"> :</div> |
| <div class="line"> EXPORT WAKEUP0_IRQHandler [WEAK]</div> |
| <div class="line"> EXPORT WAKEUP1_IRQHandler [WEAK]</div> |
| <div class="line"> EXPORT WAKEUP2_IRQHandler [WEAK]</div> |
| <div class="line"> : :</div> |
| <div class="line"> : : </div> |
| <div class="line"> EXPORT EINT1_IRQHandler [WEAK]</div> |
| <div class="line"> EXPORT EINT0_IRQHandler [WEAK]</div> |
| <div class="line"></div> |
| <div class="line">WAKEUP0_IRQHandler</div> |
| <div class="line">WAKEUP1_IRQHandler</div> |
| <div class="line">WAKEUP1_IRQHandler</div> |
| <div class="line"> :</div> |
| <div class="line"> :</div> |
| <div class="line">EINT1_IRQHandler</div> |
| <div class="line">EINT0_IRQHandler</div> |
| <div class="line"> B .</div> |
| </div><!-- fragment --><h1><a class="anchor" id="startup_s_sec"></a> |
| startup_Device.s Template File</h1> |
| <p>The <a class="el" href="startup_s_pg.html#startup_s_sec">startup_Device.s Template File</a> for the Cortex-M3 and the ARMCC compiler is shown below. The files for other compiler vendors differ slightly in the syntax, but not in the overall structure.</p> |
| <pre class="fragment">;/**************************************************************************//** |
| ; * @file startup_<Device>.s |
| ; * @brief CMSIS Cortex-M# Core Device Startup File for |
| ; * Device <Device> |
| ; * @version V3.10 |
| ; * @date 23. November 2012 |
| ; * |
| ; * @note |
| ; * |
| ; ******************************************************************************/ |
| ;/* Copyright (c) 2012 ARM LIMITED |
| ; |
| ; All rights reserved. |
| ; Redistribution and use in source and binary forms, with or without |
| ; modification, are permitted provided that the following conditions are met: |
| ; - Redistributions of source code must retain the above copyright |
| ; notice, this list of conditions and the following disclaimer. |
| ; - Redistributions in binary form must reproduce the above copyright |
| ; notice, this list of conditions and the following disclaimer in the |
| ; documentation and/or other materials provided with the distribution. |
| ; - Neither the name of ARM nor the names of its contributors may be used |
| ; to endorse or promote products derived from this software without |
| ; specific prior written permission. |
| ; * |
| ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| ; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| ; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| ; ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE |
| ; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| ; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| ; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| ; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| ; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| ; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| ; POSSIBILITY OF SUCH DAMAGE. |
| ; ---------------------------------------------------------------------------*/ |
| ;/* |
| ;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ |
| ;*/ |
| |
| |
| ; <h> Stack Configuration |
| ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> |
| ; </h> |
| |
| Stack_Size EQU 0x00000400 |
| |
| AREA STACK, NOINIT, READWRITE, ALIGN=3 |
| Stack_Mem SPACE Stack_Size |
| __initial_sp |
| |
| |
| ; <h> Heap Configuration |
| ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> |
| ; </h> |
| |
| Heap_Size EQU 0x00000100 |
| |
| AREA HEAP, NOINIT, READWRITE, ALIGN=3 |
| __heap_base |
| Heap_Mem SPACE Heap_Size |
| __heap_limit |
| |
| |
| PRESERVE8 |
| THUMB |
| |
| |
| ; Vector Table Mapped to Address 0 at Reset |
| |
| AREA RESET, DATA, READONLY |
| EXPORT __Vectors |
| EXPORT __Vectors_End |
| EXPORT __Vectors_Size |
| |
| __Vectors DCD __initial_sp ; Top of Stack |
| DCD Reset_Handler ; Reset Handler |
| DCD NMI_Handler ; NMI Handler |
| DCD HardFault_Handler ; Hard Fault Handler |
| DCD MemManage_Handler ; MPU Fault Handler |
| DCD BusFault_Handler ; Bus Fault Handler |
| DCD UsageFault_Handler ; Usage Fault Handler |
| DCD 0 ; Reserved |
| DCD 0 ; Reserved |
| DCD 0 ; Reserved |
| DCD 0 ; Reserved |
| DCD SVC_Handler ; SVCall Handler |
| DCD DebugMon_Handler ; Debug Monitor Handler |
| DCD 0 ; Reserved |
| DCD PendSV_Handler ; PendSV Handler |
| DCD SysTick_Handler ; SysTick Handler |
| |
| ; External Interrupts |
| ; ToDo: Add here the vectors for the device specific external interrupts handler |
| DCD <DeviceInterrupt>_IRQHandler ; 0: Default |
| __Vectors_End |
| |
| __Vectors_Size EQU __Vectors_End - __Vectors |
| |
| AREA |.text|, CODE, READONLY |
| |
| |
| ; Reset Handler |
| |
| Reset_Handler PROC |
| EXPORT Reset_Handler [WEAK] |
| IMPORT SystemInit |
| IMPORT __main |
| LDR R0, =SystemInit |
| BLX R0 |
| LDR R0, =__main |
| BX R0 |
| ENDP |
| |
| |
| ; Dummy Exception Handlers (infinite loops which can be modified) |
| |
| NMI_Handler PROC |
| EXPORT NMI_Handler [WEAK] |
| B . |
| ENDP |
| HardFault_Handler\ |
| PROC |
| EXPORT HardFault_Handler [WEAK] |
| B . |
| ENDP |
| MemManage_Handler\ |
| PROC |
| EXPORT MemManage_Handler [WEAK] |
| B . |
| ENDP |
| BusFault_Handler\ |
| PROC |
| EXPORT BusFault_Handler [WEAK] |
| B . |
| ENDP |
| UsageFault_Handler\ |
| PROC |
| EXPORT UsageFault_Handler [WEAK] |
| B . |
| ENDP |
| SVC_Handler PROC |
| EXPORT SVC_Handler [WEAK] |
| B . |
| ENDP |
| DebugMon_Handler\ |
| PROC |
| EXPORT DebugMon_Handler [WEAK] |
| B . |
| ENDP |
| PendSV_Handler\ |
| PROC |
| EXPORT PendSV_Handler [WEAK] |
| B . |
| ENDP |
| SysTick_Handler\ |
| PROC |
| EXPORT SysTick_Handler [WEAK] |
| B . |
| ENDP |
| |
| Default_Handler PROC |
| ; ToDo: Add here the export definition for the device specific external interrupts handler |
| EXPORT <DeviceInterrupt>_IRQHandler [WEAK] |
| |
| ; ToDo: Add here the names for the device specific external interrupts handler |
| <DeviceInterrupt>_IRQHandler |
| B . |
| ENDP |
| |
| |
| ALIGN |
| |
| |
| ; User Initial Stack & Heap |
| |
| IF :DEF:__MICROLIB |
| |
| EXPORT __initial_sp |
| EXPORT __heap_base |
| EXPORT __heap_limit |
| |
| ELSE |
| |
| IMPORT __use_two_region_memory |
| EXPORT __user_initial_stackheap |
| |
| __user_initial_stackheap PROC |
| LDR R0, = Heap_Mem |
| LDR R1, =(Stack_Mem + Stack_Size) |
| LDR R2, = (Heap_Mem + Heap_Size) |
| LDR R3, = Stack_Mem |
| BX LR |
| ENDP |
| |
| ALIGN |
| |
| ENDIF |
| |
| |
| END |
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