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| |
| <p>Functions that generate specific Cortex-A CPU Instructions. |
| <a href="#details">More...</a></p> |
| <table class="memberdecls"> |
| <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a> |
| Macros</h2></td></tr> |
| <tr class="memitem:gabd585ddc865fb9b7f2493af1eee1a572"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__Core__InstructionInterface.html#gabd585ddc865fb9b7f2493af1eee1a572">__NOP</a>   __nop</td></tr> |
| <tr class="memdesc:gabd585ddc865fb9b7f2493af1eee1a572"><td class="mdescLeft"> </td><td class="mdescRight">No Operation. <a href="#gabd585ddc865fb9b7f2493af1eee1a572">More...</a><br/></td></tr> |
| <tr class="separator:gabd585ddc865fb9b7f2493af1eee1a572"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:gad23bf2b78a9a4524157c9de0d30b7448"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__Core__InstructionInterface.html#gad23bf2b78a9a4524157c9de0d30b7448">__WFI</a>   __wfi</td></tr> |
| <tr class="memdesc:gad23bf2b78a9a4524157c9de0d30b7448"><td class="mdescLeft"> </td><td class="mdescRight">Wait For Interrupt. <a href="#gad23bf2b78a9a4524157c9de0d30b7448">More...</a><br/></td></tr> |
| <tr class="separator:gad23bf2b78a9a4524157c9de0d30b7448"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:gaac6cc7dd4325d9cb40d3290fa5244b3d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__Core__InstructionInterface.html#gaac6cc7dd4325d9cb40d3290fa5244b3d">__WFE</a>   __wfe</td></tr> |
| <tr class="memdesc:gaac6cc7dd4325d9cb40d3290fa5244b3d"><td class="mdescLeft"> </td><td class="mdescRight">Wait For Event. <a href="#gaac6cc7dd4325d9cb40d3290fa5244b3d">More...</a><br/></td></tr> |
| <tr class="separator:gaac6cc7dd4325d9cb40d3290fa5244b3d"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:gaab4f296d0022b4b10dc0976eb22052f9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__Core__InstructionInterface.html#gaab4f296d0022b4b10dc0976eb22052f9">__SEV</a>   __sev</td></tr> |
| <tr class="memdesc:gaab4f296d0022b4b10dc0976eb22052f9"><td class="mdescLeft"> </td><td class="mdescRight">Send Event. <a href="#gaab4f296d0022b4b10dc0976eb22052f9">More...</a><br/></td></tr> |
| <tr class="separator:gaab4f296d0022b4b10dc0976eb22052f9"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:gaad233022e850a009fc6f7602be1182f6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__Core__InstructionInterface.html#gaad233022e850a009fc6f7602be1182f6">__ISB</a>()</td></tr> |
| <tr class="memdesc:gaad233022e850a009fc6f7602be1182f6"><td class="mdescLeft"> </td><td class="mdescRight">Instruction Synchronization Barrier. <a href="#gaad233022e850a009fc6f7602be1182f6">More...</a><br/></td></tr> |
| <tr class="separator:gaad233022e850a009fc6f7602be1182f6"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga067d257a2b34565410acefb5afef2203"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__Core__InstructionInterface.html#ga067d257a2b34565410acefb5afef2203">__DSB</a>()</td></tr> |
| <tr class="memdesc:ga067d257a2b34565410acefb5afef2203"><td class="mdescLeft"> </td><td class="mdescRight">Data Synchronization Barrier. <a href="#ga067d257a2b34565410acefb5afef2203">More...</a><br/></td></tr> |
| <tr class="separator:ga067d257a2b34565410acefb5afef2203"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga671101179b5943990785f36f8c1e2269"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__Core__InstructionInterface.html#ga671101179b5943990785f36f8c1e2269">__DMB</a>()</td></tr> |
| <tr class="memdesc:ga671101179b5943990785f36f8c1e2269"><td class="mdescLeft"> </td><td class="mdescRight">Data Memory Barrier. <a href="#ga671101179b5943990785f36f8c1e2269">More...</a><br/></td></tr> |
| <tr class="separator:ga671101179b5943990785f36f8c1e2269"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga15ea6bd3c507d3e81c3b3a1258e46397"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__Core__InstructionInterface.html#ga15ea6bd3c507d3e81c3b3a1258e46397">__BKPT</a>(value)   __breakpoint(value)</td></tr> |
| <tr class="memdesc:ga15ea6bd3c507d3e81c3b3a1258e46397"><td class="mdescLeft"> </td><td class="mdescRight">Breakpoint. <a href="#ga15ea6bd3c507d3e81c3b3a1258e46397">More...</a><br/></td></tr> |
| <tr class="separator:ga15ea6bd3c507d3e81c3b3a1258e46397"><td class="memSeparator" colspan="2"> </td></tr> |
| </table><table class="memberdecls"> |
| <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a> |
| Functions</h2></td></tr> |
| <tr class="memitem:ga4717abc17af5ba29b1e4c055e0a0d9b8"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__Core__InstructionInterface.html#ga4717abc17af5ba29b1e4c055e0a0d9b8">__REV</a> (uint32_t value)</td></tr> |
| <tr class="memdesc:ga4717abc17af5ba29b1e4c055e0a0d9b8"><td class="mdescLeft"> </td><td class="mdescRight">Reverse byte order (32 bit) <a href="#ga4717abc17af5ba29b1e4c055e0a0d9b8">More...</a><br/></td></tr> |
| <tr class="separator:ga4717abc17af5ba29b1e4c055e0a0d9b8"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga926d702cf1de59d54f4e62ab8e3c8b8d"><td class="memItemLeft" align="right" valign="top">uint16_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__Core__InstructionInterface.html#ga926d702cf1de59d54f4e62ab8e3c8b8d">__REV16</a> (uint16_t value)</td></tr> |
| <tr class="memdesc:ga926d702cf1de59d54f4e62ab8e3c8b8d"><td class="mdescLeft"> </td><td class="mdescRight">Reverse byte order (16 bit) <a href="#ga926d702cf1de59d54f4e62ab8e3c8b8d">More...</a><br/></td></tr> |
| <tr class="separator:ga926d702cf1de59d54f4e62ab8e3c8b8d"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga1ec006e6d79063363cb0c2a2e0b3adbe"><td class="memItemLeft" align="right" valign="top">int32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__Core__InstructionInterface.html#ga1ec006e6d79063363cb0c2a2e0b3adbe">__REVSH</a> (int32_t value)</td></tr> |
| <tr class="memdesc:ga1ec006e6d79063363cb0c2a2e0b3adbe"><td class="mdescLeft"> </td><td class="mdescRight">Reverse byte order (16 bit) <a href="#ga1ec006e6d79063363cb0c2a2e0b3adbe">More...</a><br/></td></tr> |
| <tr class="separator:ga1ec006e6d79063363cb0c2a2e0b3adbe"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:gae05c1a2dac5bb7a399420c804c3048ca"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__Core__InstructionInterface.html#gae05c1a2dac5bb7a399420c804c3048ca">__ROR</a> (uint32_t op1, uint32_t op2)</td></tr> |
| <tr class="memdesc:gae05c1a2dac5bb7a399420c804c3048ca"><td class="mdescLeft"> </td><td class="mdescRight">Rotate Right in unsigned value (32 bit) <a href="#gae05c1a2dac5bb7a399420c804c3048ca">More...</a><br/></td></tr> |
| <tr class="separator:gae05c1a2dac5bb7a399420c804c3048ca"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:gad6f9f297f6b91a995ee199fbc796b863"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__Core__InstructionInterface.html#gad6f9f297f6b91a995ee199fbc796b863">__RBIT</a> (uint32_t value)</td></tr> |
| <tr class="memdesc:gad6f9f297f6b91a995ee199fbc796b863"><td class="mdescLeft"> </td><td class="mdescRight">Reverse bit order of value. <a href="#gad6f9f297f6b91a995ee199fbc796b863">More...</a><br/></td></tr> |
| <tr class="separator:gad6f9f297f6b91a995ee199fbc796b863"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga90884c591ac5d73d6069334eba9d6c02"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__Core__InstructionInterface.html#ga90884c591ac5d73d6069334eba9d6c02">__CLZ</a> (uint32_t value)</td></tr> |
| <tr class="memdesc:ga90884c591ac5d73d6069334eba9d6c02"><td class="mdescLeft"> </td><td class="mdescRight">Count leading zeros. <a href="#ga90884c591ac5d73d6069334eba9d6c02">More...</a><br/></td></tr> |
| <tr class="separator:ga90884c591ac5d73d6069334eba9d6c02"><td class="memSeparator" colspan="2"> </td></tr> |
| </table> |
| <a name="details" id="details"></a><h2 class="groupheader">Description</h2> |
| <h2 class="groupheader">Macro Definition Documentation</h2> |
| <a class="anchor" id="ga15ea6bd3c507d3e81c3b3a1258e46397"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define __BKPT</td> |
| <td>(</td> |
| <td class="paramtype"> </td> |
| <td class="paramname">value</td><td>)</td> |
| <td>   __breakpoint(value)</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| <p>Causes the processor to enter Debug state. Debug tools can use this to investigate system state when the instruction at a particular address is reached.</p> |
| <dl class="params"><dt>Parameters</dt><dd> |
| <table class="params"> |
| <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>is ignored by the processor. If required, a debugger can use it to store additional information about the breakpoint. </td></tr> |
| </table> |
| </dd> |
| </dl> |
| |
| </div> |
| </div> |
| <a class="anchor" id="ga671101179b5943990785f36f8c1e2269"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define __DMB</td> |
| <td>(</td> |
| <td class="paramname"></td><td>)</td> |
| <td></td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| <p>Ensures the apparent order of the explicit memory operations before and after the instruction, without ensuring their completion. </p> |
| |
| </div> |
| </div> |
| <a class="anchor" id="ga067d257a2b34565410acefb5afef2203"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define __DSB</td> |
| <td>(</td> |
| <td class="paramname"></td><td>)</td> |
| <td></td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| <p>Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete. </p> |
| |
| </div> |
| </div> |
| <a class="anchor" id="gaad233022e850a009fc6f7602be1182f6"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define __ISB</td> |
| <td>(</td> |
| <td class="paramname"></td><td>)</td> |
| <td></td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| <p>Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructions following the ISB are fetched from cache or memory, after the instruction has been completed. </p> |
| |
| </div> |
| </div> |
| <a class="anchor" id="gabd585ddc865fb9b7f2493af1eee1a572"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define __NOP   __nop</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| <p>No Operation does nothing. This instruction can be used for code alignment purposes. </p> |
| |
| </div> |
| </div> |
| <a class="anchor" id="gaab4f296d0022b4b10dc0976eb22052f9"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define __SEV   __sev</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| <p>Send Event is a hint instruction. It causes an event to be signaled to the CPU. </p> |
| |
| </div> |
| </div> |
| <a class="anchor" id="gaac6cc7dd4325d9cb40d3290fa5244b3d"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define __WFE   __wfe</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| <p>Wait For Event is a hint instruction that permits the processor to enter </p> |
| |
| </div> |
| </div> |
| <a class="anchor" id="gad23bf2b78a9a4524157c9de0d30b7448"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define __WFI   __wfi</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| <p>Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs. </p> |
| |
| </div> |
| </div> |
| <h2 class="groupheader">Function Documentation</h2> |
| <a class="anchor" id="ga90884c591ac5d73d6069334eba9d6c02"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">uint8_t __CLZ </td> |
| <td>(</td> |
| <td class="paramtype">uint32_t </td> |
| <td class="paramname"><em>value</em></td><td>)</td> |
| <td></td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| <p>Counts the number of leading zeros of a data value. </p> |
| <dl class="params"><dt>Parameters</dt><dd> |
| <table class="params"> |
| <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to count the leading zeros </td></tr> |
| </table> |
| </dd> |
| </dl> |
| <dl class="section return"><dt>Returns</dt><dd>number of leading zeros in value </dd></dl> |
| |
| </div> |
| </div> |
| <a class="anchor" id="gad6f9f297f6b91a995ee199fbc796b863"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">uint32_t __RBIT </td> |
| <td>(</td> |
| <td class="paramtype">uint32_t </td> |
| <td class="paramname"><em>value</em></td><td>)</td> |
| <td></td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| <p>Reverses the bit order of the given value. </p> |
| <dl class="params"><dt>Parameters</dt><dd> |
| <table class="params"> |
| <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to reverse </td></tr> |
| </table> |
| </dd> |
| </dl> |
| <dl class="section return"><dt>Returns</dt><dd>Reversed value </dd></dl> |
| |
| </div> |
| </div> |
| <a class="anchor" id="ga4717abc17af5ba29b1e4c055e0a0d9b8"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">uint32_t __REV </td> |
| <td>(</td> |
| <td class="paramtype">uint32_t </td> |
| <td class="paramname"><em>value</em></td><td>)</td> |
| <td></td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| <p>Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412. </p> |
| <dl class="params"><dt>Parameters</dt><dd> |
| <table class="params"> |
| <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to reverse </td></tr> |
| </table> |
| </dd> |
| </dl> |
| <dl class="section return"><dt>Returns</dt><dd>Reversed value </dd></dl> |
| |
| </div> |
| </div> |
| <a class="anchor" id="ga926d702cf1de59d54f4e62ab8e3c8b8d"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">uint16_t __REV16 </td> |
| <td>(</td> |
| <td class="paramtype">uint16_t </td> |
| <td class="paramname"><em>value</em></td><td>)</td> |
| <td></td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| <p>Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856. </p> |
| <dl class="params"><dt>Parameters</dt><dd> |
| <table class="params"> |
| <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to reverse </td></tr> |
| </table> |
| </dd> |
| </dl> |
| <dl class="section return"><dt>Returns</dt><dd>Reversed value </dd></dl> |
| |
| </div> |
| </div> |
| <a class="anchor" id="ga1ec006e6d79063363cb0c2a2e0b3adbe"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">int32_t __REVSH </td> |
| <td>(</td> |
| <td class="paramtype">int32_t </td> |
| <td class="paramname"><em>value</em></td><td>)</td> |
| <td></td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| <p>Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000. </p> |
| <dl class="params"><dt>Parameters</dt><dd> |
| <table class="params"> |
| <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to reverse </td></tr> |
| </table> |
| </dd> |
| </dl> |
| <dl class="section return"><dt>Returns</dt><dd>Reversed value </dd></dl> |
| |
| </div> |
| </div> |
| <a class="anchor" id="gae05c1a2dac5bb7a399420c804c3048ca"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">uint32_t __ROR </td> |
| <td>(</td> |
| <td class="paramtype">uint32_t </td> |
| <td class="paramname"><em>op1</em>, </td> |
| </tr> |
| <tr> |
| <td class="paramkey"></td> |
| <td></td> |
| <td class="paramtype">uint32_t </td> |
| <td class="paramname"><em>op2</em> </td> |
| </tr> |
| <tr> |
| <td></td> |
| <td>)</td> |
| <td></td><td></td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| <p>Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits. </p> |
| <dl class="params"><dt>Parameters</dt><dd> |
| <table class="params"> |
| <tr><td class="paramdir">[in]</td><td class="paramname">op1</td><td>Value to rotate </td></tr> |
| <tr><td class="paramdir">[in]</td><td class="paramname">op2</td><td>Number of Bits to rotate </td></tr> |
| </table> |
| </dd> |
| </dl> |
| <dl class="section return"><dt>Returns</dt><dd>Rotated value </dd></dl> |
| |
| </div> |
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