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<div class="title">Memory Configuration Files mem_&lt;device&gt;.h </div> </div>
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<div class="textblock"><pre class="fragment">/**************************************************************************//**
* @file mem_&lt;Device&gt;.h
* @brief CMSIS Cortex-A Memory base and size definitions (used in scatter file)
* @version V1.00
* @date 10. January 2018
******************************************************************************/
/*
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MEM_&lt;Device&gt;_H /* ToDo: replace '&lt;Device&gt;' with your device name */
#define MEM_&lt;Device&gt;_H
/*----------------------------------------------------------------------------
User Stack &amp; Heap size definition
*----------------------------------------------------------------------------*/
/*
//-------- &lt;&lt;&lt; Use Configuration Wizard in Context Menu &gt;&gt;&gt; ------------------
*/
/*--------------------- ROM Configuration ------------------------------------
//
// &lt;h&gt; ROM Configuration
// &lt;o0&gt; ROM Base Address &lt;0x0-0xFFFFFFFF:8&gt;
// &lt;o1&gt; ROM Size (in Bytes) &lt;0x0-0xFFFFFFFF:8&gt;
// &lt;/h&gt;
*----------------------------------------------------------------------------*/
#define __ROM_BASE 0x80000000
#define __ROM_SIZE 0x00200000
/*--------------------- RAM Configuration -----------------------------------
// &lt;h&gt; RAM Configuration
// &lt;o0&gt; RAM Base Address &lt;0x0-0xFFFFFFFF:8&gt;
// &lt;o1&gt; RAM Total Size (in Bytes) &lt;0x0-0xFFFFFFFF:8&gt;
// &lt;o2&gt; RW_DATA Size (in Bytes) &lt;0x0-0xFFFFFFFF:8&gt;
// &lt;o3&gt; ZI_DATA Size (in Bytes) &lt;0x0-0xFFFFFFFF:8&gt;
// &lt;h&gt; Stack / Heap Configuration
// &lt;o4&gt; Stack Size (in Bytes) &lt;0x0-0xFFFFFFFF:8&gt;
// &lt;o5&gt; Heap Size (in Bytes) &lt;0x0-0xFFFFFFFF:8&gt;
// &lt;h&gt; Exceptional Modes
// &lt;o6&gt; UND Stack Size (in Bytes) &lt;0x0-0xFFFFFFFF:8&gt;
// &lt;o7&gt; ABT Stack Size (in Bytes) &lt;0x0-0xFFFFFFFF:8&gt;
// &lt;o8&gt; SVC Stack Size (in Bytes) &lt;0x0-0xFFFFFFFF:8&gt;
// &lt;o9&gt; IRQ Stack Size (in Bytes) &lt;0x0-0xFFFFFFFF:8&gt;
// &lt;o10&gt; FIQ Stack Size (in Bytes) &lt;0x0-0xFFFFFFFF:8&gt;
// &lt;/h&gt;
// &lt;/h&gt;
// &lt;/h&gt;
*----------------------------------------------------------------------------*/
#define __RAM_BASE 0x80200000
#define __RAM_SIZE 0x00200000
#define __RW_DATA_SIZE 0x00100000
#define __ZI_DATA_SIZE 0x000F0000
#define __STACK_SIZE 0x00001000
#define __HEAP_SIZE 0x00008000
#define __UND_STACK_SIZE 0x00000100
#define __ABT_STACK_SIZE 0x00000100
#define __SVC_STACK_SIZE 0x00000100
#define __IRQ_STACK_SIZE 0x00000100
#define __FIQ_STACK_SIZE 0x00000100
/*----------------------------------------------------------------------------*/
/*--------------------- TTB Configuration ------------------------------------
//
// &lt;h&gt; TTB Configuration
// &lt;o0&gt; TTB Base Address &lt;0x0-0xFFFFFFFF:8&gt;
// &lt;o1&gt; TTB Size (in Bytes) &lt;0x0-0xFFFFFFFF:8&gt;
// &lt;/h&gt;
*----------------------------------------------------------------------------*/
#define __TTB_BASE 0x80500000
#define __TTB_SIZE 0x00004000
#endif /* MEM_&lt;Device&gt;_H */
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