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| <p>Functions that relate to the Floating-Point Arithmetic Unit. |
| <a href="#details">More...</a></p> |
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| Functions</h2></td></tr> |
| <tr class="memitem:ga6bcad99ce80a0e7e4ddc6f2379081756"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__fpu__functions.html#ga6bcad99ce80a0e7e4ddc6f2379081756">SCB_GetFPUType</a> (void)</td></tr> |
| <tr class="memdesc:ga6bcad99ce80a0e7e4ddc6f2379081756"><td class="mdescLeft"> </td><td class="mdescRight">Get the FPU type. <a href="#ga6bcad99ce80a0e7e4ddc6f2379081756">More...</a><br/></td></tr> |
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| <a name="details" id="details"></a><h2 class="groupheader">Description</h2> |
| <p>Some Cortex-M processors include optional floating-point arithmetic functionality, with support for single and double-precision arithmetic. The Cortex-M processor with FPU is an implementation of the single-precision and double-precision variant of the Armv7-M Architecture with Floating-Point Extension (FPv5). </p> |
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| <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t SCB_GetFPUType </td> |
| <td>(</td> |
| <td class="paramtype">void </td> |
| <td class="paramname"></td><td>)</td> |
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| <dl class="section return"><dt>Returns</dt><dd><ul> |
| <li><b>0</b>: No FPU</li> |
| <li><b>1</b>: Single precision FPU</li> |
| <li><b>2</b>: Double + Single precision FPU</li> |
| </ul> |
| </dd></dl> |
| <p>The function returns the implemented FPU type. </p> |
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