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| <p>Structure type to access the System Control and ID Register not in the SCB. |
| </p> |
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| Data Fields</h2></td></tr> |
| <tr class="memitem:afe1d5fd2966d5062716613b05c8d0ae1"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structSCnSCB__Type.html#afe1d5fd2966d5062716613b05c8d0ae1">RESERVED0</a> [1]</td></tr> |
| <tr class="memdesc:afe1d5fd2966d5062716613b05c8d0ae1"><td class="mdescLeft"> </td><td class="mdescRight">Reserved. <a href="#afe1d5fd2966d5062716613b05c8d0ae1">More...</a><br/></td></tr> |
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| <tr class="memitem:a34ec1d771245eb9bd0e3ec9336949762"><td class="memItemLeft" align="right" valign="top">__IM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structSCnSCB__Type.html#a34ec1d771245eb9bd0e3ec9336949762">ICTR</a></td></tr> |
| <tr class="memdesc:a34ec1d771245eb9bd0e3ec9336949762"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x004 (R/ ) Interrupt Controller Type Register. <a href="#a34ec1d771245eb9bd0e3ec9336949762">More...</a><br/></td></tr> |
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| <tr class="memitem:a13af9b718dde7481f1c0344f00593c23"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structSCnSCB__Type.html#a13af9b718dde7481f1c0344f00593c23">ACTLR</a></td></tr> |
| <tr class="memdesc:a13af9b718dde7481f1c0344f00593c23"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x008 (R/W) Auxiliary Control Register. <a href="#a13af9b718dde7481f1c0344f00593c23">More...</a><br/></td></tr> |
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| <h2 class="groupheader">Field Documentation</h2> |
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| <td class="memname">__IOM uint32_t SCnSCB_Type::ACTLR</td> |
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| <td class="memname">__IM uint32_t SCnSCB_Type::ICTR</td> |
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| <td class="memname">uint32_t SCnSCB_Type::RESERVED0[1]</td> |
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