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| <div class="title">ACTLR Bits<div class="ingroups"><a class="el" href="group__CMSIS__ACTLR.html">Auxiliary Control Register (ACTLR)</a></div></div> </div> |
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| <p>Bit position and mask macros. |
| <a href="#details">More...</a></p> |
| <table class="memberdecls"> |
| <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a> |
| Macros</h2></td></tr> |
| <tr class="memitem:ga5468e93550ce28af7114cbc1e19474c0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga5468e93550ce28af7114cbc1e19474c0">ACTLR_DDI_Pos</a>   28U</td></tr> |
| <tr class="memdesc:ga5468e93550ce28af7114cbc1e19474c0"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: DDI Position. <a href="#ga5468e93550ce28af7114cbc1e19474c0">More...</a><br/></td></tr> |
| <tr class="separator:ga5468e93550ce28af7114cbc1e19474c0"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:gaeee8e0fc7b28f2a405b234e7d2c7486e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#gaeee8e0fc7b28f2a405b234e7d2c7486e">ACTLR_DDI_Msk</a>   (1UL << ACTLR_DDI_Pos)</td></tr> |
| <tr class="memdesc:gaeee8e0fc7b28f2a405b234e7d2c7486e"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: DDI Mask. <a href="#gaeee8e0fc7b28f2a405b234e7d2c7486e">More...</a><br/></td></tr> |
| <tr class="separator:gaeee8e0fc7b28f2a405b234e7d2c7486e"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga0367a8413c0a37d6c1de7b90f3a56aee"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga0367a8413c0a37d6c1de7b90f3a56aee">ACTLR_DBDI_Pos</a>   28U</td></tr> |
| <tr class="memdesc:ga0367a8413c0a37d6c1de7b90f3a56aee"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: DBDI Position. <a href="#ga0367a8413c0a37d6c1de7b90f3a56aee">More...</a><br/></td></tr> |
| <tr class="separator:ga0367a8413c0a37d6c1de7b90f3a56aee"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga0a3d58754927731758c53bd945ac35fe"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga0a3d58754927731758c53bd945ac35fe">ACTLR_DBDI_Msk</a>   (1UL << ACTLR_DBDI_Pos)</td></tr> |
| <tr class="memdesc:ga0a3d58754927731758c53bd945ac35fe"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: DBDI Mask. <a href="#ga0a3d58754927731758c53bd945ac35fe">More...</a><br/></td></tr> |
| <tr class="separator:ga0a3d58754927731758c53bd945ac35fe"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga8c81a1e1522400322f215c52ca80d47d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga8c81a1e1522400322f215c52ca80d47d">ACTLR_BTDIS_Pos</a>   18U</td></tr> |
| <tr class="memdesc:ga8c81a1e1522400322f215c52ca80d47d"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: BTDIS Position. <a href="#ga8c81a1e1522400322f215c52ca80d47d">More...</a><br/></td></tr> |
| <tr class="separator:ga8c81a1e1522400322f215c52ca80d47d"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:gad48e0a1c1e59e6721547b45f37baa48b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#gad48e0a1c1e59e6721547b45f37baa48b">ACTLR_BTDIS_Msk</a>   (1UL << ACTLR_BTDIS_Pos)</td></tr> |
| <tr class="memdesc:gad48e0a1c1e59e6721547b45f37baa48b"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: BTDIS Mask. <a href="#gad48e0a1c1e59e6721547b45f37baa48b">More...</a><br/></td></tr> |
| <tr class="separator:gad48e0a1c1e59e6721547b45f37baa48b"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga4412a55ce52db3c5a4f035fcd0e350c6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga4412a55ce52db3c5a4f035fcd0e350c6">ACTLR_RSDIS_Pos</a>   17U</td></tr> |
| <tr class="memdesc:ga4412a55ce52db3c5a4f035fcd0e350c6"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: RSDIS Position. <a href="#ga4412a55ce52db3c5a4f035fcd0e350c6">More...</a><br/></td></tr> |
| <tr class="separator:ga4412a55ce52db3c5a4f035fcd0e350c6"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga8487babc3514e2bb8f3d524e5f80d95f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga8487babc3514e2bb8f3d524e5f80d95f">ACTLR_RSDIS_Msk</a>   (1UL << ACTLR_RSDIS_Pos)</td></tr> |
| <tr class="memdesc:ga8487babc3514e2bb8f3d524e5f80d95f"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: RSDIS Mask. <a href="#ga8487babc3514e2bb8f3d524e5f80d95f">More...</a><br/></td></tr> |
| <tr class="separator:ga8487babc3514e2bb8f3d524e5f80d95f"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga120f5d653af52bd711c27c2495ce78f6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga120f5d653af52bd711c27c2495ce78f6">ACTLR_BP_Pos</a>   15U</td></tr> |
| <tr class="memdesc:ga120f5d653af52bd711c27c2495ce78f6"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: BP Position. <a href="#ga120f5d653af52bd711c27c2495ce78f6">More...</a><br/></td></tr> |
| <tr class="separator:ga120f5d653af52bd711c27c2495ce78f6"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga677211818d8a2c7b118115361fbef2e7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga677211818d8a2c7b118115361fbef2e7">ACTLR_BP_Msk</a>   (3UL << ACTLR_BP_Pos)</td></tr> |
| <tr class="memdesc:ga677211818d8a2c7b118115361fbef2e7"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: BP Mask. <a href="#ga677211818d8a2c7b118115361fbef2e7">More...</a><br/></td></tr> |
| <tr class="separator:ga677211818d8a2c7b118115361fbef2e7"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:gaa9fe7651aa9bb48eea4f5301c69ee54d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#gaa9fe7651aa9bb48eea4f5301c69ee54d">ACTLR_DDVM_Pos</a>   15U</td></tr> |
| <tr class="memdesc:gaa9fe7651aa9bb48eea4f5301c69ee54d"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: DDVM Position. <a href="#gaa9fe7651aa9bb48eea4f5301c69ee54d">More...</a><br/></td></tr> |
| <tr class="separator:gaa9fe7651aa9bb48eea4f5301c69ee54d"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga4565f2632e5c4be5e1d3eb90fa6f2ac6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga4565f2632e5c4be5e1d3eb90fa6f2ac6">ACTLR_DDVM_Msk</a>   (1UL << ACTLR_DDVM_Pos)</td></tr> |
| <tr class="memdesc:ga4565f2632e5c4be5e1d3eb90fa6f2ac6"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: DDVM Mask. <a href="#ga4565f2632e5c4be5e1d3eb90fa6f2ac6">More...</a><br/></td></tr> |
| <tr class="separator:ga4565f2632e5c4be5e1d3eb90fa6f2ac6"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga546f1f2bbf7344bad6522205257f17ae"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga546f1f2bbf7344bad6522205257f17ae">ACTLR_L1PCTL_Pos</a>   13U</td></tr> |
| <tr class="memdesc:ga546f1f2bbf7344bad6522205257f17ae"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: L1PCTL Position. <a href="#ga546f1f2bbf7344bad6522205257f17ae">More...</a><br/></td></tr> |
| <tr class="separator:ga546f1f2bbf7344bad6522205257f17ae"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:gad701fa3ff69b89ba185b7482e81cb6fd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#gad701fa3ff69b89ba185b7482e81cb6fd">ACTLR_L1PCTL_Msk</a>   (3UL << ACTLR_L1PCTL_Pos)</td></tr> |
| <tr class="memdesc:gad701fa3ff69b89ba185b7482e81cb6fd"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: L1PCTL Mask. <a href="#gad701fa3ff69b89ba185b7482e81cb6fd">More...</a><br/></td></tr> |
| <tr class="separator:gad701fa3ff69b89ba185b7482e81cb6fd"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:gaf7a424f7f8c4f46592ce8f47f4bced44"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#gaf7a424f7f8c4f46592ce8f47f4bced44">ACTLR_RADIS_Pos</a>   12U</td></tr> |
| <tr class="memdesc:gaf7a424f7f8c4f46592ce8f47f4bced44"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: RADIS Position. <a href="#gaf7a424f7f8c4f46592ce8f47f4bced44">More...</a><br/></td></tr> |
| <tr class="separator:gaf7a424f7f8c4f46592ce8f47f4bced44"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:gac6aea849e5320c0e93321d5d8b0c117c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#gac6aea849e5320c0e93321d5d8b0c117c">ACTLR_RADIS_Msk</a>   (1UL << ACTLR_RADIS_Pos)</td></tr> |
| <tr class="memdesc:gac6aea849e5320c0e93321d5d8b0c117c"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: RADIS Mask. <a href="#gac6aea849e5320c0e93321d5d8b0c117c">More...</a><br/></td></tr> |
| <tr class="separator:gac6aea849e5320c0e93321d5d8b0c117c"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:gaf8b306b854ecd78110cf944d414644a1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#gaf8b306b854ecd78110cf944d414644a1">ACTLR_L1RADIS_Pos</a>   12U</td></tr> |
| <tr class="memdesc:gaf8b306b854ecd78110cf944d414644a1"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: L1RADIS Position. <a href="#gaf8b306b854ecd78110cf944d414644a1">More...</a><br/></td></tr> |
| <tr class="separator:gaf8b306b854ecd78110cf944d414644a1"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga6aafd83ca6c02f705def8edc8c064c04"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga6aafd83ca6c02f705def8edc8c064c04">ACTLR_L1RADIS_Msk</a>   (1UL << ACTLR_L1RADIS_Pos)</td></tr> |
| <tr class="memdesc:ga6aafd83ca6c02f705def8edc8c064c04"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: L1RADIS Mask. <a href="#ga6aafd83ca6c02f705def8edc8c064c04">More...</a><br/></td></tr> |
| <tr class="separator:ga6aafd83ca6c02f705def8edc8c064c04"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga4ca2a9236b157d3f9405cf8c398897a2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga4ca2a9236b157d3f9405cf8c398897a2">ACTLR_DWBST_Pos</a>   11U</td></tr> |
| <tr class="memdesc:ga4ca2a9236b157d3f9405cf8c398897a2"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: DWBST Position. <a href="#ga4ca2a9236b157d3f9405cf8c398897a2">More...</a><br/></td></tr> |
| <tr class="separator:ga4ca2a9236b157d3f9405cf8c398897a2"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:gab948ab9af88a9357e2e383d948e9dc7e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#gab948ab9af88a9357e2e383d948e9dc7e">ACTLR_DWBST_Msk</a>   (1UL << ACTLR_DWBST_Pos)</td></tr> |
| <tr class="memdesc:gab948ab9af88a9357e2e383d948e9dc7e"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: DWBST Mask. <a href="#gab948ab9af88a9357e2e383d948e9dc7e">More...</a><br/></td></tr> |
| <tr class="separator:gab948ab9af88a9357e2e383d948e9dc7e"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga505f33bbe45bbcaa9fcb738cb30daf4e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga505f33bbe45bbcaa9fcb738cb30daf4e">ACTLR_L2RADIS_Pos</a>   11U</td></tr> |
| <tr class="memdesc:ga505f33bbe45bbcaa9fcb738cb30daf4e"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: L2RADIS Position. <a href="#ga505f33bbe45bbcaa9fcb738cb30daf4e">More...</a><br/></td></tr> |
| <tr class="separator:ga505f33bbe45bbcaa9fcb738cb30daf4e"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:gad84b20f4f5d1979bb000a14a582cad12"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#gad84b20f4f5d1979bb000a14a582cad12">ACTLR_L2RADIS_Msk</a>   (1UL << ACTLR_L2RADIS_Pos)</td></tr> |
| <tr class="memdesc:gad84b20f4f5d1979bb000a14a582cad12"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: L2RADIS Mask. <a href="#gad84b20f4f5d1979bb000a14a582cad12">More...</a><br/></td></tr> |
| <tr class="separator:gad84b20f4f5d1979bb000a14a582cad12"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga96eb411770c8e2b87f5e62b95e50ee02"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga96eb411770c8e2b87f5e62b95e50ee02">ACTLR_DODMBS_Pos</a>   10U</td></tr> |
| <tr class="memdesc:ga96eb411770c8e2b87f5e62b95e50ee02"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: DODMBS Position. <a href="#ga96eb411770c8e2b87f5e62b95e50ee02">More...</a><br/></td></tr> |
| <tr class="separator:ga96eb411770c8e2b87f5e62b95e50ee02"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga88a85e6310334edb190a6e9298ae98b7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga88a85e6310334edb190a6e9298ae98b7">ACTLR_DODMBS_Msk</a>   (1UL << ACTLR_DODMBS_Pos)</td></tr> |
| <tr class="memdesc:ga88a85e6310334edb190a6e9298ae98b7"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: DODMBS Mask. <a href="#ga88a85e6310334edb190a6e9298ae98b7">More...</a><br/></td></tr> |
| <tr class="separator:ga88a85e6310334edb190a6e9298ae98b7"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga8300a65b41aa3f5c69c7cc713c847749"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga8300a65b41aa3f5c69c7cc713c847749">ACTLR_PARITY_Pos</a>   9U</td></tr> |
| <tr class="memdesc:ga8300a65b41aa3f5c69c7cc713c847749"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: PARITY Position. <a href="#ga8300a65b41aa3f5c69c7cc713c847749">More...</a><br/></td></tr> |
| <tr class="separator:ga8300a65b41aa3f5c69c7cc713c847749"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:gadec8e5d68791dc4749bf3f075a3559fb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#gadec8e5d68791dc4749bf3f075a3559fb">ACTLR_PARITY_Msk</a>   (1UL << ACTLR_PARITY_Pos)</td></tr> |
| <tr class="memdesc:gadec8e5d68791dc4749bf3f075a3559fb"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: PARITY Mask. <a href="#gadec8e5d68791dc4749bf3f075a3559fb">More...</a><br/></td></tr> |
| <tr class="separator:gadec8e5d68791dc4749bf3f075a3559fb"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga633ee6b129f8668593687ab8537aeb7f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga633ee6b129f8668593687ab8537aeb7f">ACTLR_AOW_Pos</a>   8U</td></tr> |
| <tr class="memdesc:ga633ee6b129f8668593687ab8537aeb7f"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: AOW Position. <a href="#ga633ee6b129f8668593687ab8537aeb7f">More...</a><br/></td></tr> |
| <tr class="separator:ga633ee6b129f8668593687ab8537aeb7f"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga5ca6754c31f90c7e5d1822dddfb4135c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga5ca6754c31f90c7e5d1822dddfb4135c">ACTLR_AOW_Msk</a>   (1UL << ACTLR_AOW_Pos)</td></tr> |
| <tr class="memdesc:ga5ca6754c31f90c7e5d1822dddfb4135c"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: AOW Mask. <a href="#ga5ca6754c31f90c7e5d1822dddfb4135c">More...</a><br/></td></tr> |
| <tr class="separator:ga5ca6754c31f90c7e5d1822dddfb4135c"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga17dcfbcdf5db82900354db5440699701"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga17dcfbcdf5db82900354db5440699701">ACTLR_EXCL_Pos</a>   7U</td></tr> |
| <tr class="memdesc:ga17dcfbcdf5db82900354db5440699701"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: EXCL Position. <a href="#ga17dcfbcdf5db82900354db5440699701">More...</a><br/></td></tr> |
| <tr class="separator:ga17dcfbcdf5db82900354db5440699701"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga8b704419a7ed130ecbee00de9fd72d55"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga8b704419a7ed130ecbee00de9fd72d55">ACTLR_EXCL_Msk</a>   (1UL << ACTLR_EXCL_Pos)</td></tr> |
| <tr class="memdesc:ga8b704419a7ed130ecbee00de9fd72d55"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: EXCL Mask. <a href="#ga8b704419a7ed130ecbee00de9fd72d55">More...</a><br/></td></tr> |
| <tr class="separator:ga8b704419a7ed130ecbee00de9fd72d55"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga8cb19db067cca1e064189b27b1f1bcbf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga8cb19db067cca1e064189b27b1f1bcbf">ACTLR_SMP_Pos</a>   6U</td></tr> |
| <tr class="memdesc:ga8cb19db067cca1e064189b27b1f1bcbf"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: SMP Position. <a href="#ga8cb19db067cca1e064189b27b1f1bcbf">More...</a><br/></td></tr> |
| <tr class="separator:ga8cb19db067cca1e064189b27b1f1bcbf"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:gac6dcc315f6c4527434b9b0e4106771d8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#gac6dcc315f6c4527434b9b0e4106771d8">ACTLR_SMP_Msk</a>   (1UL << ACTLR_SMP_Pos)</td></tr> |
| <tr class="memdesc:gac6dcc315f6c4527434b9b0e4106771d8"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: SMP Mask. <a href="#gac6dcc315f6c4527434b9b0e4106771d8">More...</a><br/></td></tr> |
| <tr class="separator:gac6dcc315f6c4527434b9b0e4106771d8"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga104112fe1d88dde49635e9b0f9530306"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga104112fe1d88dde49635e9b0f9530306">ACTLR_WFLZM_Pos</a>   3U</td></tr> |
| <tr class="memdesc:ga104112fe1d88dde49635e9b0f9530306"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: WFLZM Position. <a href="#ga104112fe1d88dde49635e9b0f9530306">More...</a><br/></td></tr> |
| <tr class="separator:ga104112fe1d88dde49635e9b0f9530306"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:gae5a89cb553773b10e86a9c826f11179f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#gae5a89cb553773b10e86a9c826f11179f">ACTLR_WFLZM_Msk</a>   (1UL << ACTLR_WFLZM_Pos)</td></tr> |
| <tr class="memdesc:gae5a89cb553773b10e86a9c826f11179f"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: WFLZM Mask. <a href="#gae5a89cb553773b10e86a9c826f11179f">More...</a><br/></td></tr> |
| <tr class="separator:gae5a89cb553773b10e86a9c826f11179f"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga65c3c81261a2aa26022f6bb967c4e56b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga65c3c81261a2aa26022f6bb967c4e56b">ACTLR_L1PE_Pos</a>   2U</td></tr> |
| <tr class="memdesc:ga65c3c81261a2aa26022f6bb967c4e56b"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: L1PE Position. <a href="#ga65c3c81261a2aa26022f6bb967c4e56b">More...</a><br/></td></tr> |
| <tr class="separator:ga65c3c81261a2aa26022f6bb967c4e56b"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga969c20495fe3e50e8c2a73454688a674"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga969c20495fe3e50e8c2a73454688a674">ACTLR_L1PE_Msk</a>   (1UL << ACTLR_L1PE_Pos)</td></tr> |
| <tr class="memdesc:ga969c20495fe3e50e8c2a73454688a674"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: L1PE Mask. <a href="#ga969c20495fe3e50e8c2a73454688a674">More...</a><br/></td></tr> |
| <tr class="separator:ga969c20495fe3e50e8c2a73454688a674"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga89b1a661668534177bc9679149a692ce"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga89b1a661668534177bc9679149a692ce">ACTLR_FW_Pos</a>   0U</td></tr> |
| <tr class="memdesc:ga89b1a661668534177bc9679149a692ce"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: FW Position. <a href="#ga89b1a661668534177bc9679149a692ce">More...</a><br/></td></tr> |
| <tr class="separator:ga89b1a661668534177bc9679149a692ce"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga53ea0cfa2dd5cb51d9f9de21e4d2dbf1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga53ea0cfa2dd5cb51d9f9de21e4d2dbf1">ACTLR_FW_Msk</a>   (1UL << ACTLR_FW_Pos)</td></tr> |
| <tr class="memdesc:ga53ea0cfa2dd5cb51d9f9de21e4d2dbf1"><td class="mdescLeft"> </td><td class="mdescRight">ACTLR: FW Mask. <a href="#ga53ea0cfa2dd5cb51d9f9de21e4d2dbf1">More...</a><br/></td></tr> |
| <tr class="separator:ga53ea0cfa2dd5cb51d9f9de21e4d2dbf1"><td class="memSeparator" colspan="2"> </td></tr> |
| </table> |
| <a name="details" id="details"></a><h2 class="groupheader">Description</h2> |
| <h2 class="groupheader">Macro Definition Documentation</h2> |
| <a class="anchor" id="ga5ca6754c31f90c7e5d1822dddfb4135c"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_AOW_Msk   (1UL << ACTLR_AOW_Pos)</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="ga633ee6b129f8668593687ab8537aeb7f"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_AOW_Pos   8U</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="ga677211818d8a2c7b118115361fbef2e7"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_BP_Msk   (3UL << ACTLR_BP_Pos)</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="ga120f5d653af52bd711c27c2495ce78f6"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_BP_Pos   15U</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="gad48e0a1c1e59e6721547b45f37baa48b"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_BTDIS_Msk   (1UL << ACTLR_BTDIS_Pos)</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="ga8c81a1e1522400322f215c52ca80d47d"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_BTDIS_Pos   18U</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="ga0a3d58754927731758c53bd945ac35fe"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_DBDI_Msk   (1UL << ACTLR_DBDI_Pos)</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="ga0367a8413c0a37d6c1de7b90f3a56aee"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_DBDI_Pos   28U</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="gaeee8e0fc7b28f2a405b234e7d2c7486e"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_DDI_Msk   (1UL << ACTLR_DDI_Pos)</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="ga5468e93550ce28af7114cbc1e19474c0"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_DDI_Pos   28U</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="ga4565f2632e5c4be5e1d3eb90fa6f2ac6"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_DDVM_Msk   (1UL << ACTLR_DDVM_Pos)</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="gaa9fe7651aa9bb48eea4f5301c69ee54d"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_DDVM_Pos   15U</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="ga88a85e6310334edb190a6e9298ae98b7"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_DODMBS_Msk   (1UL << ACTLR_DODMBS_Pos)</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="ga96eb411770c8e2b87f5e62b95e50ee02"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_DODMBS_Pos   10U</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="gab948ab9af88a9357e2e383d948e9dc7e"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_DWBST_Msk   (1UL << ACTLR_DWBST_Pos)</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="ga4ca2a9236b157d3f9405cf8c398897a2"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_DWBST_Pos   11U</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="ga8b704419a7ed130ecbee00de9fd72d55"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_EXCL_Msk   (1UL << ACTLR_EXCL_Pos)</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="ga17dcfbcdf5db82900354db5440699701"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_EXCL_Pos   7U</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="ga53ea0cfa2dd5cb51d9f9de21e4d2dbf1"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_FW_Msk   (1UL << ACTLR_FW_Pos)</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="ga89b1a661668534177bc9679149a692ce"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_FW_Pos   0U</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="gad701fa3ff69b89ba185b7482e81cb6fd"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_L1PCTL_Msk   (3UL << ACTLR_L1PCTL_Pos)</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="ga546f1f2bbf7344bad6522205257f17ae"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_L1PCTL_Pos   13U</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="ga969c20495fe3e50e8c2a73454688a674"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_L1PE_Msk   (1UL << ACTLR_L1PE_Pos)</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="ga65c3c81261a2aa26022f6bb967c4e56b"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_L1PE_Pos   2U</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="ga6aafd83ca6c02f705def8edc8c064c04"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_L1RADIS_Msk   (1UL << ACTLR_L1RADIS_Pos)</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="gaf8b306b854ecd78110cf944d414644a1"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_L1RADIS_Pos   12U</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="gad84b20f4f5d1979bb000a14a582cad12"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_L2RADIS_Msk   (1UL << ACTLR_L2RADIS_Pos)</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="ga505f33bbe45bbcaa9fcb738cb30daf4e"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_L2RADIS_Pos   11U</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="gadec8e5d68791dc4749bf3f075a3559fb"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_PARITY_Msk   (1UL << ACTLR_PARITY_Pos)</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="ga8300a65b41aa3f5c69c7cc713c847749"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_PARITY_Pos   9U</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="gac6aea849e5320c0e93321d5d8b0c117c"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_RADIS_Msk   (1UL << ACTLR_RADIS_Pos)</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="gaf7a424f7f8c4f46592ce8f47f4bced44"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_RADIS_Pos   12U</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="ga8487babc3514e2bb8f3d524e5f80d95f"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_RSDIS_Msk   (1UL << ACTLR_RSDIS_Pos)</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="ga4412a55ce52db3c5a4f035fcd0e350c6"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_RSDIS_Pos   17U</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="gac6dcc315f6c4527434b9b0e4106771d8"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_SMP_Msk   (1UL << ACTLR_SMP_Pos)</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="ga8cb19db067cca1e064189b27b1f1bcbf"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_SMP_Pos   6U</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="gae5a89cb553773b10e86a9c826f11179f"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_WFLZM_Msk   (1UL << ACTLR_WFLZM_Pos)</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
| <a class="anchor" id="ga104112fe1d88dde49635e9b0f9530306"></a> |
| <div class="memitem"> |
| <div class="memproto"> |
| <table class="memname"> |
| <tr> |
| <td class="memname">#define ACTLR_WFLZM_Pos   3U</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| </div> |
| </div> |
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