[CMSIS] Remove duplicate definition of ADC12_CSR_ADRDY_OVR_SLV_Pos, ADC12_CSR_ADRDY_OVR_SLV_Msk and ADC12_CSR_ADRDY_OVR_SLV macros and add definition of ADC34_CSR_ADRDY_OVR_SLV_Pos, ADC34_CSR_ADRDY_OVR_SLV_Msk and ADC34_CSR_ADRDY_OVR_SLV macros
diff --git a/Include/stm32f303xc.h b/Include/stm32f303xc.h
index 51ba5c1..557420e 100644
--- a/Include/stm32f303xc.h
+++ b/Include/stm32f303xc.h
@@ -1996,9 +1996,9 @@
#define ADC34_CSR_ADRDY_EOS_SLV_Pos (19U)
#define ADC34_CSR_ADRDY_EOS_SLV_Msk (0x1UL << ADC34_CSR_ADRDY_EOS_SLV_Pos) /*!< 0x00080000 */
#define ADC34_CSR_ADRDY_EOS_SLV ADC34_CSR_ADRDY_EOS_SLV_Msk /*!< End of regular sequence flag of the slave ADC */
-#define ADC12_CSR_ADRDY_OVR_SLV_Pos (20U)
-#define ADC12_CSR_ADRDY_OVR_SLV_Msk (0x1UL << ADC12_CSR_ADRDY_OVR_SLV_Pos) /*!< 0x00100000 */
-#define ADC12_CSR_ADRDY_OVR_SLV ADC12_CSR_ADRDY_OVR_SLV_Msk /*!< Overrun flag of the slave ADC */
+#define ADC34_CSR_ADRDY_OVR_SLV_Pos (20U)
+#define ADC34_CSR_ADRDY_OVR_SLV_Msk (0x1UL << ADC34_CSR_ADRDY_OVR_SLV_Pos) /*!< 0x00100000 */
+#define ADC34_CSR_ADRDY_OVR_SLV ADC34_CSR_ADRDY_OVR_SLV_Msk /*!< Overrun flag of the slave ADC */
#define ADC34_CSR_ADRDY_JEOC_SLV_Pos (21U)
#define ADC34_CSR_ADRDY_JEOC_SLV_Msk (0x1UL << ADC34_CSR_ADRDY_JEOC_SLV_Pos) /*!< 0x00200000 */
#define ADC34_CSR_ADRDY_JEOC_SLV ADC34_CSR_ADRDY_JEOC_SLV_Msk /*!< End of injected conversion of the slave ADC */
diff --git a/Include/stm32f303xe.h b/Include/stm32f303xe.h
index 29ee103..8819490 100644
--- a/Include/stm32f303xe.h
+++ b/Include/stm32f303xe.h
@@ -2107,9 +2107,9 @@
#define ADC34_CSR_ADRDY_EOS_SLV_Pos (19U)
#define ADC34_CSR_ADRDY_EOS_SLV_Msk (0x1UL << ADC34_CSR_ADRDY_EOS_SLV_Pos) /*!< 0x00080000 */
#define ADC34_CSR_ADRDY_EOS_SLV ADC34_CSR_ADRDY_EOS_SLV_Msk /*!< End of regular sequence flag of the slave ADC */
-#define ADC12_CSR_ADRDY_OVR_SLV_Pos (20U)
-#define ADC12_CSR_ADRDY_OVR_SLV_Msk (0x1UL << ADC12_CSR_ADRDY_OVR_SLV_Pos) /*!< 0x00100000 */
-#define ADC12_CSR_ADRDY_OVR_SLV ADC12_CSR_ADRDY_OVR_SLV_Msk /*!< Overrun flag of the slave ADC */
+#define ADC34_CSR_ADRDY_OVR_SLV_Pos (20U)
+#define ADC34_CSR_ADRDY_OVR_SLV_Msk (0x1UL << ADC34_CSR_ADRDY_OVR_SLV_Pos) /*!< 0x00100000 */
+#define ADC34_CSR_ADRDY_OVR_SLV ADC34_CSR_ADRDY_OVR_SLV_Msk /*!< Overrun flag of the slave ADC */
#define ADC34_CSR_ADRDY_JEOC_SLV_Pos (21U)
#define ADC34_CSR_ADRDY_JEOC_SLV_Msk (0x1UL << ADC34_CSR_ADRDY_JEOC_SLV_Pos) /*!< 0x00200000 */
#define ADC34_CSR_ADRDY_JEOC_SLV ADC34_CSR_ADRDY_JEOC_SLV_Msk /*!< End of injected conversion of the slave ADC */
diff --git a/Include/stm32f334x8.h b/Include/stm32f334x8.h
index 3567930..a8b22fd 100644
--- a/Include/stm32f334x8.h
+++ b/Include/stm32f334x8.h
@@ -1998,9 +1998,9 @@
#define ADC34_CSR_ADRDY_EOS_SLV_Pos (19U)
#define ADC34_CSR_ADRDY_EOS_SLV_Msk (0x1UL << ADC34_CSR_ADRDY_EOS_SLV_Pos) /*!< 0x00080000 */
#define ADC34_CSR_ADRDY_EOS_SLV ADC34_CSR_ADRDY_EOS_SLV_Msk /*!< End of regular sequence flag of the slave ADC */
-#define ADC12_CSR_ADRDY_OVR_SLV_Pos (20U)
-#define ADC12_CSR_ADRDY_OVR_SLV_Msk (0x1UL << ADC12_CSR_ADRDY_OVR_SLV_Pos) /*!< 0x00100000 */
-#define ADC12_CSR_ADRDY_OVR_SLV ADC12_CSR_ADRDY_OVR_SLV_Msk /*!< Overrun flag of the slave ADC */
+#define ADC34_CSR_ADRDY_OVR_SLV_Pos (20U)
+#define ADC34_CSR_ADRDY_OVR_SLV_Msk (0x1UL << ADC34_CSR_ADRDY_OVR_SLV_Pos) /*!< 0x00100000 */
+#define ADC34_CSR_ADRDY_OVR_SLV ADC34_CSR_ADRDY_OVR_SLV_Msk /*!< Overrun flag of the slave ADC */
#define ADC34_CSR_ADRDY_JEOC_SLV_Pos (21U)
#define ADC34_CSR_ADRDY_JEOC_SLV_Msk (0x1UL << ADC34_CSR_ADRDY_JEOC_SLV_Pos) /*!< 0x00200000 */
#define ADC34_CSR_ADRDY_JEOC_SLV ADC34_CSR_ADRDY_JEOC_SLV_Msk /*!< End of injected conversion of the slave ADC */
diff --git a/Include/stm32f358xx.h b/Include/stm32f358xx.h
index d5d218e..0d6f1dc 100644
--- a/Include/stm32f358xx.h
+++ b/Include/stm32f358xx.h
@@ -1954,9 +1954,9 @@
#define ADC34_CSR_ADRDY_EOS_SLV_Pos (19U)
#define ADC34_CSR_ADRDY_EOS_SLV_Msk (0x1UL << ADC34_CSR_ADRDY_EOS_SLV_Pos) /*!< 0x00080000 */
#define ADC34_CSR_ADRDY_EOS_SLV ADC34_CSR_ADRDY_EOS_SLV_Msk /*!< End of regular sequence flag of the slave ADC */
-#define ADC12_CSR_ADRDY_OVR_SLV_Pos (20U)
-#define ADC12_CSR_ADRDY_OVR_SLV_Msk (0x1UL << ADC12_CSR_ADRDY_OVR_SLV_Pos) /*!< 0x00100000 */
-#define ADC12_CSR_ADRDY_OVR_SLV ADC12_CSR_ADRDY_OVR_SLV_Msk /*!< Overrun flag of the slave ADC */
+#define ADC34_CSR_ADRDY_OVR_SLV_Pos (20U)
+#define ADC34_CSR_ADRDY_OVR_SLV_Msk (0x1UL << ADC34_CSR_ADRDY_OVR_SLV_Pos) /*!< 0x00100000 */
+#define ADC34_CSR_ADRDY_OVR_SLV ADC34_CSR_ADRDY_OVR_SLV_Msk /*!< Overrun flag of the slave ADC */
#define ADC34_CSR_ADRDY_JEOC_SLV_Pos (21U)
#define ADC34_CSR_ADRDY_JEOC_SLV_Msk (0x1UL << ADC34_CSR_ADRDY_JEOC_SLV_Pos) /*!< 0x00200000 */
#define ADC34_CSR_ADRDY_JEOC_SLV ADC34_CSR_ADRDY_JEOC_SLV_Msk /*!< End of injected conversion of the slave ADC */
diff --git a/Include/stm32f398xx.h b/Include/stm32f398xx.h
index dbde83f..3277ac3 100644
--- a/Include/stm32f398xx.h
+++ b/Include/stm32f398xx.h
@@ -2063,9 +2063,9 @@
#define ADC34_CSR_ADRDY_EOS_SLV_Pos (19U)
#define ADC34_CSR_ADRDY_EOS_SLV_Msk (0x1UL << ADC34_CSR_ADRDY_EOS_SLV_Pos) /*!< 0x00080000 */
#define ADC34_CSR_ADRDY_EOS_SLV ADC34_CSR_ADRDY_EOS_SLV_Msk /*!< End of regular sequence flag of the slave ADC */
-#define ADC12_CSR_ADRDY_OVR_SLV_Pos (20U)
-#define ADC12_CSR_ADRDY_OVR_SLV_Msk (0x1UL << ADC12_CSR_ADRDY_OVR_SLV_Pos) /*!< 0x00100000 */
-#define ADC12_CSR_ADRDY_OVR_SLV ADC12_CSR_ADRDY_OVR_SLV_Msk /*!< Overrun flag of the slave ADC */
+#define ADC34_CSR_ADRDY_OVR_SLV_Pos (20U)
+#define ADC34_CSR_ADRDY_OVR_SLV_Msk (0x1UL << ADC34_CSR_ADRDY_OVR_SLV_Pos) /*!< 0x00100000 */
+#define ADC34_CSR_ADRDY_OVR_SLV ADC34_CSR_ADRDY_OVR_SLV_Msk /*!< Overrun flag of the slave ADC */
#define ADC34_CSR_ADRDY_JEOC_SLV_Pos (21U)
#define ADC34_CSR_ADRDY_JEOC_SLV_Msk (0x1UL << ADC34_CSR_ADRDY_JEOC_SLV_Pos) /*!< 0x00200000 */
#define ADC34_CSR_ADRDY_JEOC_SLV ADC34_CSR_ADRDY_JEOC_SLV_Msk /*!< End of injected conversion of the slave ADC */
