commit 6988fd4208123afdc44e5ddacc306ac445595b01
author karim <karim.rabhi-ext@st.com> Fri Aug 16 09:15:45 2024 +0100
committer karim <karim.rabhi-ext@st.com> Tue Oct 01 09:06:37 2024 +0100
tree abbf172f859951f61162c173b2363b9c30ab81ee
parent 35e1201d4db3dbbd364b7decca957902f60bc5da

[CMSIS] Remove all references to register bit PESD

Change-Id: Ic16703eee381b564909176637481342ffeff6f31

Include/stm32g0b0xx.h

diff --git a/Include/stm32g0b0xx.h b/Include/stm32g0b0xx.h
index c693338..51f6a52 100644
--- a/Include/stm32g0b0xx.h
+++ b/Include/stm32g0b0xx.h
@@ -3133,9 +3133,6 @@
 #define FLASH_SR_CFGBSY_Pos                    (18U)
 #define FLASH_SR_CFGBSY_Msk                    (0x1UL << FLASH_SR_CFGBSY_Pos)   /*!< 0x00040000 */
 #define FLASH_SR_CFGBSY                        FLASH_SR_CFGBSY_Msk
-#define FLASH_SR_PESD_Pos                      (19U)
-#define FLASH_SR_PESD_Msk                      (0x1UL << FLASH_SR_PESD_Pos)   /*!< 0x00080000 */
-#define FLASH_SR_PESD                          FLASH_SR_PESD_Msk
 
 /*******************  Bits definition for FLASH_CR register  ******************/
 #define FLASH_CR_PG_Pos                        (0U)

Include/stm32g0b1xx.h

diff --git a/Include/stm32g0b1xx.h b/Include/stm32g0b1xx.h
index b97b009..0b27873 100644
--- a/Include/stm32g0b1xx.h
+++ b/Include/stm32g0b1xx.h
@@ -3982,9 +3982,6 @@
 #define FLASH_SR_CFGBSY_Pos                    (18U)
 #define FLASH_SR_CFGBSY_Msk                    (0x1UL << FLASH_SR_CFGBSY_Pos)   /*!< 0x00040000 */
 #define FLASH_SR_CFGBSY                        FLASH_SR_CFGBSY_Msk
-#define FLASH_SR_PESD_Pos                      (19U)
-#define FLASH_SR_PESD_Msk                      (0x1UL << FLASH_SR_PESD_Pos)   /*!< 0x00080000 */
-#define FLASH_SR_PESD                          FLASH_SR_PESD_Msk
 
 /*******************  Bits definition for FLASH_CR register  ******************/
 #define FLASH_CR_PG_Pos                        (0U)

Include/stm32g0c1xx.h

diff --git a/Include/stm32g0c1xx.h b/Include/stm32g0c1xx.h
index 2c36f00..7e73da6 100644
--- a/Include/stm32g0c1xx.h
+++ b/Include/stm32g0c1xx.h
@@ -4218,9 +4218,6 @@
 #define FLASH_SR_CFGBSY_Pos                    (18U)
 #define FLASH_SR_CFGBSY_Msk                    (0x1UL << FLASH_SR_CFGBSY_Pos)   /*!< 0x00040000 */
 #define FLASH_SR_CFGBSY                        FLASH_SR_CFGBSY_Msk
-#define FLASH_SR_PESD_Pos                      (19U)
-#define FLASH_SR_PESD_Msk                      (0x1UL << FLASH_SR_PESD_Pos)   /*!< 0x00080000 */
-#define FLASH_SR_PESD                          FLASH_SR_PESD_Msk
 
 /*******************  Bits definition for FLASH_CR register  ******************/
 #define FLASH_CR_PG_Pos                        (0U)