Release v1.7.0
diff --git a/Include/stm32l412xx.h b/Include/stm32l412xx.h
index 24b71a3..8fbdf4a 100644
--- a/Include/stm32l412xx.h
+++ b/Include/stm32l412xx.h
@@ -15,10 +15,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -2251,6 +2251,14 @@
#define CRS_CR_SWSYNC CRS_CR_SWSYNC_Msk /*!< Generate software SYNC event */
#define CRS_CR_TRIM_Pos (8U)
#define CRS_CR_TRIM_Msk (0x7FUL << CRS_CR_TRIM_Pos) /*!< 0x00007F00 */
+#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< TRIM[6:0] HSI48 oscillator smooth trimming */
+#define CRS_CR_TRIM_0 (0x01UL << CRS_CR_TRIM_Pos) /*!< 0x00000100 */
+#define CRS_CR_TRIM_1 (0x02UL << CRS_CR_TRIM_Pos) /*!< 0x00000200 */
+#define CRS_CR_TRIM_2 (0x04UL << CRS_CR_TRIM_Pos) /*!< 0x00000400 */
+#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
+#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
+#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
+#define CRS_CR_TRIM_6 (0x40UL << CRS_CR_TRIM_Pos) /*!< 0x00004000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
/******************* Bit definition for CRS_CFGR register *********************/
diff --git a/Include/stm32l422xx.h b/Include/stm32l422xx.h
index 3f66bee..7bf419a 100644
--- a/Include/stm32l422xx.h
+++ b/Include/stm32l422xx.h
@@ -15,10 +15,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -2286,6 +2286,14 @@
#define CRS_CR_SWSYNC CRS_CR_SWSYNC_Msk /*!< Generate software SYNC event */
#define CRS_CR_TRIM_Pos (8U)
#define CRS_CR_TRIM_Msk (0x7FUL << CRS_CR_TRIM_Pos) /*!< 0x00007F00 */
+#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< TRIM[6:0] HSI48 oscillator smooth trimming */
+#define CRS_CR_TRIM_0 (0x01UL << CRS_CR_TRIM_Pos) /*!< 0x00000100 */
+#define CRS_CR_TRIM_1 (0x02UL << CRS_CR_TRIM_Pos) /*!< 0x00000200 */
+#define CRS_CR_TRIM_2 (0x04UL << CRS_CR_TRIM_Pos) /*!< 0x00000400 */
+#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
+#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
+#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
+#define CRS_CR_TRIM_6 (0x40UL << CRS_CR_TRIM_Pos) /*!< 0x00004000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
/******************* Bit definition for CRS_CFGR register *********************/
diff --git a/Include/stm32l431xx.h b/Include/stm32l431xx.h
index 06d4a03..65102d2 100644
--- a/Include/stm32l431xx.h
+++ b/Include/stm32l431xx.h
@@ -15,10 +15,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -5722,6 +5722,13 @@
#define CRS_CR_SWSYNC CRS_CR_SWSYNC_Msk /*!< Generate software SYNC event */
#define CRS_CR_TRIM_Pos (8U)
#define CRS_CR_TRIM_Msk (0x3FUL << CRS_CR_TRIM_Pos) /*!< 0x00003F00 */
+#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< TRIM[5:0] HSI48 oscillator smooth trimming */
+#define CRS_CR_TRIM_0 (0x01UL << CRS_CR_TRIM_Pos) /*!< 0x00000100 */
+#define CRS_CR_TRIM_1 (0x02UL << CRS_CR_TRIM_Pos) /*!< 0x00000200 */
+#define CRS_CR_TRIM_2 (0x04UL << CRS_CR_TRIM_Pos) /*!< 0x00000400 */
+#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
+#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
+#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
/******************* Bit definition for CRS_CFGR register *********************/
@@ -9270,13 +9277,15 @@
/*!< HSITRIM configuration */
#define RCC_ICSCR_HSITRIM_Pos (24U)
-#define RCC_ICSCR_HSITRIM_Msk (0x1FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x1F000000 */
-#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[4:0] bits */
+#define RCC_ICSCR_HSITRIM_Msk (0x7FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x7F000000 */
+#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[6:0] bits */
#define RCC_ICSCR_HSITRIM_0 (0x01UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x01000000 */
#define RCC_ICSCR_HSITRIM_1 (0x02UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x02000000 */
#define RCC_ICSCR_HSITRIM_2 (0x04UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x04000000 */
#define RCC_ICSCR_HSITRIM_3 (0x08UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x08000000 */
#define RCC_ICSCR_HSITRIM_4 (0x10UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x10000000 */
+#define RCC_ICSCR_HSITRIM_5 (0x20UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x20000000 */
+#define RCC_ICSCR_HSITRIM_6 (0x40UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x40000000 */
/******************** Bit definition for RCC_CFGR register ******************/
/*!< SW configuration */
diff --git a/Include/stm32l432xx.h b/Include/stm32l432xx.h
index dfb9f6f..3c455ff 100644
--- a/Include/stm32l432xx.h
+++ b/Include/stm32l432xx.h
@@ -15,10 +15,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -5707,6 +5707,13 @@
#define CRS_CR_SWSYNC CRS_CR_SWSYNC_Msk /*!< Generate software SYNC event */
#define CRS_CR_TRIM_Pos (8U)
#define CRS_CR_TRIM_Msk (0x3FUL << CRS_CR_TRIM_Pos) /*!< 0x00003F00 */
+#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< TRIM[5:0] HSI48 oscillator smooth trimming */
+#define CRS_CR_TRIM_0 (0x01UL << CRS_CR_TRIM_Pos) /*!< 0x00000100 */
+#define CRS_CR_TRIM_1 (0x02UL << CRS_CR_TRIM_Pos) /*!< 0x00000200 */
+#define CRS_CR_TRIM_2 (0x04UL << CRS_CR_TRIM_Pos) /*!< 0x00000400 */
+#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
+#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
+#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
/******************* Bit definition for CRS_CFGR register *********************/
@@ -8931,13 +8938,15 @@
/*!< HSITRIM configuration */
#define RCC_ICSCR_HSITRIM_Pos (24U)
-#define RCC_ICSCR_HSITRIM_Msk (0x1FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x1F000000 */
-#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[4:0] bits */
+#define RCC_ICSCR_HSITRIM_Msk (0x7FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x7F000000 */
+#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[6:0] bits */
#define RCC_ICSCR_HSITRIM_0 (0x01UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x01000000 */
#define RCC_ICSCR_HSITRIM_1 (0x02UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x02000000 */
#define RCC_ICSCR_HSITRIM_2 (0x04UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x04000000 */
#define RCC_ICSCR_HSITRIM_3 (0x08UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x08000000 */
#define RCC_ICSCR_HSITRIM_4 (0x10UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x10000000 */
+#define RCC_ICSCR_HSITRIM_5 (0x20UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x20000000 */
+#define RCC_ICSCR_HSITRIM_6 (0x40UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x40000000 */
/******************** Bit definition for RCC_CFGR register ******************/
/*!< SW configuration */
diff --git a/Include/stm32l433xx.h b/Include/stm32l433xx.h
index 458c242..60bb2f8 100644
--- a/Include/stm32l433xx.h
+++ b/Include/stm32l433xx.h
@@ -15,10 +15,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -5781,6 +5781,13 @@
#define CRS_CR_SWSYNC CRS_CR_SWSYNC_Msk /*!< Generate software SYNC event */
#define CRS_CR_TRIM_Pos (8U)
#define CRS_CR_TRIM_Msk (0x3FUL << CRS_CR_TRIM_Pos) /*!< 0x00003F00 */
+#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< TRIM[5:0] HSI48 oscillator smooth trimming */
+#define CRS_CR_TRIM_0 (0x01UL << CRS_CR_TRIM_Pos) /*!< 0x00000100 */
+#define CRS_CR_TRIM_1 (0x02UL << CRS_CR_TRIM_Pos) /*!< 0x00000200 */
+#define CRS_CR_TRIM_2 (0x04UL << CRS_CR_TRIM_Pos) /*!< 0x00000400 */
+#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
+#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
+#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
/******************* Bit definition for CRS_CFGR register *********************/
@@ -9362,13 +9369,15 @@
/*!< HSITRIM configuration */
#define RCC_ICSCR_HSITRIM_Pos (24U)
-#define RCC_ICSCR_HSITRIM_Msk (0x1FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x1F000000 */
-#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[4:0] bits */
+#define RCC_ICSCR_HSITRIM_Msk (0x7FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x7F000000 */
+#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[6:0] bits */
#define RCC_ICSCR_HSITRIM_0 (0x01UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x01000000 */
#define RCC_ICSCR_HSITRIM_1 (0x02UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x02000000 */
#define RCC_ICSCR_HSITRIM_2 (0x04UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x04000000 */
#define RCC_ICSCR_HSITRIM_3 (0x08UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x08000000 */
#define RCC_ICSCR_HSITRIM_4 (0x10UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x10000000 */
+#define RCC_ICSCR_HSITRIM_5 (0x20UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x20000000 */
+#define RCC_ICSCR_HSITRIM_6 (0x40UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x40000000 */
/******************** Bit definition for RCC_CFGR register ******************/
/*!< SW configuration */
diff --git a/Include/stm32l442xx.h b/Include/stm32l442xx.h
index fee55f7..d3475ed 100644
--- a/Include/stm32l442xx.h
+++ b/Include/stm32l442xx.h
@@ -15,10 +15,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -5742,6 +5742,13 @@
#define CRS_CR_SWSYNC CRS_CR_SWSYNC_Msk /*!< Generate software SYNC event */
#define CRS_CR_TRIM_Pos (8U)
#define CRS_CR_TRIM_Msk (0x3FUL << CRS_CR_TRIM_Pos) /*!< 0x00003F00 */
+#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< TRIM[5:0] HSI48 oscillator smooth trimming */
+#define CRS_CR_TRIM_0 (0x01UL << CRS_CR_TRIM_Pos) /*!< 0x00000100 */
+#define CRS_CR_TRIM_1 (0x02UL << CRS_CR_TRIM_Pos) /*!< 0x00000200 */
+#define CRS_CR_TRIM_2 (0x04UL << CRS_CR_TRIM_Pos) /*!< 0x00000400 */
+#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
+#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
+#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
/******************* Bit definition for CRS_CFGR register *********************/
@@ -9147,13 +9154,15 @@
/*!< HSITRIM configuration */
#define RCC_ICSCR_HSITRIM_Pos (24U)
-#define RCC_ICSCR_HSITRIM_Msk (0x1FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x1F000000 */
-#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[4:0] bits */
+#define RCC_ICSCR_HSITRIM_Msk (0x7FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x7F000000 */
+#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[6:0] bits */
#define RCC_ICSCR_HSITRIM_0 (0x01UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x01000000 */
#define RCC_ICSCR_HSITRIM_1 (0x02UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x02000000 */
#define RCC_ICSCR_HSITRIM_2 (0x04UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x04000000 */
#define RCC_ICSCR_HSITRIM_3 (0x08UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x08000000 */
#define RCC_ICSCR_HSITRIM_4 (0x10UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x10000000 */
+#define RCC_ICSCR_HSITRIM_5 (0x20UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x20000000 */
+#define RCC_ICSCR_HSITRIM_6 (0x40UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x40000000 */
/******************** Bit definition for RCC_CFGR register ******************/
/*!< SW configuration */
diff --git a/Include/stm32l443xx.h b/Include/stm32l443xx.h
index f05605b..5d782d2 100644
--- a/Include/stm32l443xx.h
+++ b/Include/stm32l443xx.h
@@ -15,10 +15,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -5816,6 +5816,13 @@
#define CRS_CR_SWSYNC CRS_CR_SWSYNC_Msk /*!< Generate software SYNC event */
#define CRS_CR_TRIM_Pos (8U)
#define CRS_CR_TRIM_Msk (0x3FUL << CRS_CR_TRIM_Pos) /*!< 0x00003F00 */
+#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< TRIM[5:0] HSI48 oscillator smooth trimming */
+#define CRS_CR_TRIM_0 (0x01UL << CRS_CR_TRIM_Pos) /*!< 0x00000100 */
+#define CRS_CR_TRIM_1 (0x02UL << CRS_CR_TRIM_Pos) /*!< 0x00000200 */
+#define CRS_CR_TRIM_2 (0x04UL << CRS_CR_TRIM_Pos) /*!< 0x00000400 */
+#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
+#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
+#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
/******************* Bit definition for CRS_CFGR register *********************/
@@ -9578,13 +9585,15 @@
/*!< HSITRIM configuration */
#define RCC_ICSCR_HSITRIM_Pos (24U)
-#define RCC_ICSCR_HSITRIM_Msk (0x1FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x1F000000 */
-#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[4:0] bits */
+#define RCC_ICSCR_HSITRIM_Msk (0x7FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x7F000000 */
+#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[6:0] bits */
#define RCC_ICSCR_HSITRIM_0 (0x01UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x01000000 */
#define RCC_ICSCR_HSITRIM_1 (0x02UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x02000000 */
#define RCC_ICSCR_HSITRIM_2 (0x04UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x04000000 */
#define RCC_ICSCR_HSITRIM_3 (0x08UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x08000000 */
#define RCC_ICSCR_HSITRIM_4 (0x10UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x10000000 */
+#define RCC_ICSCR_HSITRIM_5 (0x20UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x20000000 */
+#define RCC_ICSCR_HSITRIM_6 (0x40UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x40000000 */
/******************** Bit definition for RCC_CFGR register ******************/
/*!< SW configuration */
diff --git a/Include/stm32l451xx.h b/Include/stm32l451xx.h
index f011a1d..9a26b04 100644
--- a/Include/stm32l451xx.h
+++ b/Include/stm32l451xx.h
@@ -15,10 +15,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -5772,6 +5772,13 @@
#define CRS_CR_SWSYNC CRS_CR_SWSYNC_Msk /*!< Generate software SYNC event */
#define CRS_CR_TRIM_Pos (8U)
#define CRS_CR_TRIM_Msk (0x3FUL << CRS_CR_TRIM_Pos) /*!< 0x00003F00 */
+#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< TRIM[5:0] HSI48 oscillator smooth trimming */
+#define CRS_CR_TRIM_0 (0x01UL << CRS_CR_TRIM_Pos) /*!< 0x00000100 */
+#define CRS_CR_TRIM_1 (0x02UL << CRS_CR_TRIM_Pos) /*!< 0x00000200 */
+#define CRS_CR_TRIM_2 (0x04UL << CRS_CR_TRIM_Pos) /*!< 0x00000400 */
+#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
+#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
+#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
/******************* Bit definition for CRS_CFGR register *********************/
diff --git a/Include/stm32l452xx.h b/Include/stm32l452xx.h
index a5c2e0d..38e64b0 100644
--- a/Include/stm32l452xx.h
+++ b/Include/stm32l452xx.h
@@ -15,10 +15,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -5814,6 +5814,13 @@
#define CRS_CR_SWSYNC CRS_CR_SWSYNC_Msk /*!< Generate software SYNC event */
#define CRS_CR_TRIM_Pos (8U)
#define CRS_CR_TRIM_Msk (0x3FUL << CRS_CR_TRIM_Pos) /*!< 0x00003F00 */
+#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< TRIM[5:0] HSI48 oscillator smooth trimming */
+#define CRS_CR_TRIM_0 (0x01UL << CRS_CR_TRIM_Pos) /*!< 0x00000100 */
+#define CRS_CR_TRIM_1 (0x02UL << CRS_CR_TRIM_Pos) /*!< 0x00000200 */
+#define CRS_CR_TRIM_2 (0x04UL << CRS_CR_TRIM_Pos) /*!< 0x00000400 */
+#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
+#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
+#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
/******************* Bit definition for CRS_CFGR register *********************/
diff --git a/Include/stm32l462xx.h b/Include/stm32l462xx.h
index f083925..1f5e86c 100644
--- a/Include/stm32l462xx.h
+++ b/Include/stm32l462xx.h
@@ -15,10 +15,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -5849,6 +5849,13 @@
#define CRS_CR_SWSYNC CRS_CR_SWSYNC_Msk /*!< Generate software SYNC event */
#define CRS_CR_TRIM_Pos (8U)
#define CRS_CR_TRIM_Msk (0x3FUL << CRS_CR_TRIM_Pos) /*!< 0x00003F00 */
+#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< TRIM[5:0] HSI48 oscillator smooth trimming */
+#define CRS_CR_TRIM_0 (0x01UL << CRS_CR_TRIM_Pos) /*!< 0x00000100 */
+#define CRS_CR_TRIM_1 (0x02UL << CRS_CR_TRIM_Pos) /*!< 0x00000200 */
+#define CRS_CR_TRIM_2 (0x04UL << CRS_CR_TRIM_Pos) /*!< 0x00000400 */
+#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
+#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
+#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
/******************* Bit definition for CRS_CFGR register *********************/
diff --git a/Include/stm32l471xx.h b/Include/stm32l471xx.h
index ba028e6..8347a8e 100644
--- a/Include/stm32l471xx.h
+++ b/Include/stm32l471xx.h
@@ -15,10 +15,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
diff --git a/Include/stm32l475xx.h b/Include/stm32l475xx.h
index 142e91c..09a3ca2 100644
--- a/Include/stm32l475xx.h
+++ b/Include/stm32l475xx.h
@@ -15,10 +15,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
diff --git a/Include/stm32l476xx.h b/Include/stm32l476xx.h
index 4fd8829..61341a7 100644
--- a/Include/stm32l476xx.h
+++ b/Include/stm32l476xx.h
@@ -15,10 +15,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
diff --git a/Include/stm32l485xx.h b/Include/stm32l485xx.h
index 56ef4df..1bc37e5 100644
--- a/Include/stm32l485xx.h
+++ b/Include/stm32l485xx.h
@@ -15,10 +15,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
diff --git a/Include/stm32l486xx.h b/Include/stm32l486xx.h
index 8f8e382..172b260 100644
--- a/Include/stm32l486xx.h
+++ b/Include/stm32l486xx.h
@@ -15,10 +15,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
diff --git a/Include/stm32l496xx.h b/Include/stm32l496xx.h
index 877cb16..ba26b78 100644
--- a/Include/stm32l496xx.h
+++ b/Include/stm32l496xx.h
@@ -15,10 +15,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -6265,6 +6265,13 @@
#define CRS_CR_SWSYNC CRS_CR_SWSYNC_Msk /*!< Generate software SYNC event */
#define CRS_CR_TRIM_Pos (8U)
#define CRS_CR_TRIM_Msk (0x3FUL << CRS_CR_TRIM_Pos) /*!< 0x00003F00 */
+#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< TRIM[5:0] HSI48 oscillator smooth trimming */
+#define CRS_CR_TRIM_0 (0x01UL << CRS_CR_TRIM_Pos) /*!< 0x00000100 */
+#define CRS_CR_TRIM_1 (0x02UL << CRS_CR_TRIM_Pos) /*!< 0x00000200 */
+#define CRS_CR_TRIM_2 (0x04UL << CRS_CR_TRIM_Pos) /*!< 0x00000400 */
+#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
+#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
+#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
/******************* Bit definition for CRS_CFGR register *********************/
diff --git a/Include/stm32l4a6xx.h b/Include/stm32l4a6xx.h
index 89ccca6..ee4a059 100644
--- a/Include/stm32l4a6xx.h
+++ b/Include/stm32l4a6xx.h
@@ -15,10 +15,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -6329,6 +6329,13 @@
#define CRS_CR_SWSYNC CRS_CR_SWSYNC_Msk /*!< Generate software SYNC event */
#define CRS_CR_TRIM_Pos (8U)
#define CRS_CR_TRIM_Msk (0x3FUL << CRS_CR_TRIM_Pos) /*!< 0x00003F00 */
+#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< TRIM[5:0] HSI48 oscillator smooth trimming */
+#define CRS_CR_TRIM_0 (0x01UL << CRS_CR_TRIM_Pos) /*!< 0x00000100 */
+#define CRS_CR_TRIM_1 (0x02UL << CRS_CR_TRIM_Pos) /*!< 0x00000200 */
+#define CRS_CR_TRIM_2 (0x04UL << CRS_CR_TRIM_Pos) /*!< 0x00000400 */
+#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
+#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
+#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
/******************* Bit definition for CRS_CFGR register *********************/
diff --git a/Include/stm32l4p5xx.h b/Include/stm32l4p5xx.h
index c1d7d59..49a0f6e 100644
--- a/Include/stm32l4p5xx.h
+++ b/Include/stm32l4p5xx.h
@@ -15,10 +15,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -6474,6 +6474,13 @@
#define CRS_CR_SWSYNC CRS_CR_SWSYNC_Msk /*!< Generate software SYNC event */
#define CRS_CR_TRIM_Pos (8U)
#define CRS_CR_TRIM_Msk (0x3FUL << CRS_CR_TRIM_Pos) /*!< 0x00003F00 */
+#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< TRIM[5:0] HSI48 oscillator smooth trimming */
+#define CRS_CR_TRIM_0 (0x01UL << CRS_CR_TRIM_Pos) /*!< 0x00000100 */
+#define CRS_CR_TRIM_1 (0x02UL << CRS_CR_TRIM_Pos) /*!< 0x00000200 */
+#define CRS_CR_TRIM_2 (0x04UL << CRS_CR_TRIM_Pos) /*!< 0x00000400 */
+#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
+#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
+#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
/******************* Bit definition for CRS_CFGR register *********************/
@@ -12412,9 +12419,11 @@
#define RCC_HSI48_SUPPORT
#define RCC_PLLM_DIV_1_16_SUPPORT
#define RCC_PLLP_DIV_2_31_SUPPORT
+#define RCC_PLLSAI1N_MUL_8_127_SUPPORT
#define RCC_PLLSAI1M_DIV_1_16_SUPPORT
#define RCC_PLLSAI1P_DIV_2_31_SUPPORT
#define RCC_PLLSAI2_SUPPORT
+#define RCC_PLLSAI2N_MUL_8_127_SUPPORT
#define RCC_PLLSAI2M_DIV_1_16_SUPPORT
#define RCC_PLLSAI2P_DIV_2_31_SUPPORT
#define RCC_PLLSAI2Q_DIV_SUPPORT
@@ -15773,11 +15782,11 @@
#define OCTOSPI_DCR1_FRCK_Pos (1U)
#define OCTOSPI_DCR1_FRCK_Msk (0x1UL << OCTOSPI_DCR1_FRCK_Pos) /*!< 0x00000002 */
#define OCTOSPI_DCR1_FRCK OCTOSPI_DCR1_FRCK_Msk /*!< Free Running Clock */
-#define OCTOSPI_DCR1_DLYBYP_Pos (1U)
+#define OCTOSPI_DCR1_DLYBYP_Pos (3U)
#define OCTOSPI_DCR1_DLYBYP_Msk (0x1UL << OCTOSPI_DCR1_DLYBYP_Pos) /*!< 0x00000004 */
#define OCTOSPI_DCR1_DLYBYP OCTOSPI_DCR1_DLYBYP_Msk /*!< Delay Block Bypass */
#define OCTOSPI_DCR1_CSHT_Pos (8U)
-#define OCTOSPI_DCR1_CSHT_Msk (0x7UL << OCTOSPI_DCR1_CSHT_Pos) /*!< 0x00000700 */
+#define OCTOSPI_DCR1_CSHT_Msk (0x3FUL << OCTOSPI_DCR1_CSHT_Pos) /*!< 0x00003F00 */
#define OCTOSPI_DCR1_CSHT OCTOSPI_DCR1_CSHT_Msk /*!< Chip Select High Time */
#define OCTOSPI_DCR1_DEVSIZE_Pos (16U)
#define OCTOSPI_DCR1_DEVSIZE_Msk (0x1FUL << OCTOSPI_DCR1_DEVSIZE_Pos) /*!< 0x001F0000 */
@@ -15793,12 +15802,6 @@
#define OCTOSPI_DCR2_PRESCALER_Pos (0U)
#define OCTOSPI_DCR2_PRESCALER_Msk (0xFFUL << OCTOSPI_DCR2_PRESCALER_Pos) /*!< 0x000000FF */
#define OCTOSPI_DCR2_PRESCALER OCTOSPI_DCR2_PRESCALER_Msk /*!< Clock prescaler */
-#define OCTOSPI_DCR2_WRAPSIZE_Pos (16U)
-#define OCTOSPI_DCR2_WRAPSIZE_Msk (0x7UL << OCTOSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00070000 */
-#define OCTOSPI_DCR2_WRAPSIZE OCTOSPI_DCR2_WRAPSIZE_Msk /*!< Wrap Size */
-#define OCTOSPI_DCR2_WRAPSIZE_0 (0x1UL << OCTOSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00010000 */
-#define OCTOSPI_DCR2_WRAPSIZE_1 (0x2UL << OCTOSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00020000 */
-#define OCTOSPI_DCR2_WRAPSIZE_2 (0x4UL << OCTOSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00040000 */
/**************** Bit definition for OCTOSPI_DCR3 register ******************/
#define OCTOSPI_DCR3_MAXTRAN_Pos (0U)
@@ -15846,8 +15849,8 @@
#define OCTOSPI_FCR_CSMF_Pos (3U)
#define OCTOSPI_FCR_CSMF_Msk (0x1UL << OCTOSPI_FCR_CSMF_Pos) /*!< 0x00000008 */
#define OCTOSPI_FCR_CSMF OCTOSPI_FCR_CSMF_Msk /*!< Clear Status Match Flag */
-#define OCTOSPI_FCR_TOF_Pos (8U)
-#define OCTOSPI_FCR_TOF_Msk (0x1UL << OCTOSPI_FCR_TOF_Pos) /*!< 0x00000100 */
+#define OCTOSPI_FCR_TOF_Pos (4U)
+#define OCTOSPI_FCR_TOF_Msk (0x1UL << OCTOSPI_FCR_TOF_Pos) /*!< 0x00000010 */
#define OCTOSPI_FCR_TOF OCTOSPI_FCR_TOF_Msk /*!< Clear Timeout Flag */
/**************** Bit definition for OCTOSPI_DLR register *******************/
@@ -16020,9 +16023,6 @@
#define OCTOSPI_WCCR_DQSE_Pos (29U)
#define OCTOSPI_WCCR_DQSE_Msk (0x1UL << OCTOSPI_WCCR_DQSE_Pos) /*!< 0x20000000 */
#define OCTOSPI_WCCR_DQSE OCTOSPI_WCCR_DQSE_Msk /*!< DQS Enable */
-#define OCTOSPI_WCCR_SIOO_Pos (31U)
-#define OCTOSPI_WCCR_SIOO_Msk (0x1UL << OCTOSPI_WCCR_SIOO_Pos) /*!< 0x80000000 */
-#define OCTOSPI_WCCR_SIOO OCTOSPI_WCCR_SIOO_Msk /*!< Send Instruction Only Once Mode */
/**************** Bit definition for OCTOSPI_WTCR register ******************/
#define OCTOSPI_WTCR_DCYC_Pos (0U)
diff --git a/Include/stm32l4q5xx.h b/Include/stm32l4q5xx.h
index 3c60a8c..11fbc9a 100644
--- a/Include/stm32l4q5xx.h
+++ b/Include/stm32l4q5xx.h
@@ -15,10 +15,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -6526,6 +6526,13 @@
#define CRS_CR_SWSYNC CRS_CR_SWSYNC_Msk /*!< Generate software SYNC event */
#define CRS_CR_TRIM_Pos (8U)
#define CRS_CR_TRIM_Msk (0x3FUL << CRS_CR_TRIM_Pos) /*!< 0x00003F00 */
+#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< TRIM[5:0] HSI48 oscillator smooth trimming */
+#define CRS_CR_TRIM_0 (0x01UL << CRS_CR_TRIM_Pos) /*!< 0x00000100 */
+#define CRS_CR_TRIM_1 (0x02UL << CRS_CR_TRIM_Pos) /*!< 0x00000200 */
+#define CRS_CR_TRIM_2 (0x04UL << CRS_CR_TRIM_Pos) /*!< 0x00000400 */
+#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
+#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
+#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
/******************* Bit definition for CRS_CFGR register *********************/
@@ -12905,9 +12912,11 @@
#define RCC_HSI48_SUPPORT
#define RCC_PLLM_DIV_1_16_SUPPORT
#define RCC_PLLP_DIV_2_31_SUPPORT
+#define RCC_PLLSAI1N_MUL_8_127_SUPPORT
#define RCC_PLLSAI1M_DIV_1_16_SUPPORT
#define RCC_PLLSAI1P_DIV_2_31_SUPPORT
#define RCC_PLLSAI2_SUPPORT
+#define RCC_PLLSAI2N_MUL_8_127_SUPPORT
#define RCC_PLLSAI2M_DIV_1_16_SUPPORT
#define RCC_PLLSAI2P_DIV_2_31_SUPPORT
#define RCC_PLLSAI2Q_DIV_SUPPORT
@@ -16284,11 +16293,11 @@
#define OCTOSPI_DCR1_FRCK_Pos (1U)
#define OCTOSPI_DCR1_FRCK_Msk (0x1UL << OCTOSPI_DCR1_FRCK_Pos) /*!< 0x00000002 */
#define OCTOSPI_DCR1_FRCK OCTOSPI_DCR1_FRCK_Msk /*!< Free Running Clock */
-#define OCTOSPI_DCR1_DLYBYP_Pos (1U)
+#define OCTOSPI_DCR1_DLYBYP_Pos (3U)
#define OCTOSPI_DCR1_DLYBYP_Msk (0x1UL << OCTOSPI_DCR1_DLYBYP_Pos) /*!< 0x00000004 */
#define OCTOSPI_DCR1_DLYBYP OCTOSPI_DCR1_DLYBYP_Msk /*!< Delay Block Bypass */
#define OCTOSPI_DCR1_CSHT_Pos (8U)
-#define OCTOSPI_DCR1_CSHT_Msk (0x7UL << OCTOSPI_DCR1_CSHT_Pos) /*!< 0x00000700 */
+#define OCTOSPI_DCR1_CSHT_Msk (0x3FUL << OCTOSPI_DCR1_CSHT_Pos) /*!< 0x00003F00 */
#define OCTOSPI_DCR1_CSHT OCTOSPI_DCR1_CSHT_Msk /*!< Chip Select High Time */
#define OCTOSPI_DCR1_DEVSIZE_Pos (16U)
#define OCTOSPI_DCR1_DEVSIZE_Msk (0x1FUL << OCTOSPI_DCR1_DEVSIZE_Pos) /*!< 0x001F0000 */
@@ -16304,12 +16313,6 @@
#define OCTOSPI_DCR2_PRESCALER_Pos (0U)
#define OCTOSPI_DCR2_PRESCALER_Msk (0xFFUL << OCTOSPI_DCR2_PRESCALER_Pos) /*!< 0x000000FF */
#define OCTOSPI_DCR2_PRESCALER OCTOSPI_DCR2_PRESCALER_Msk /*!< Clock prescaler */
-#define OCTOSPI_DCR2_WRAPSIZE_Pos (16U)
-#define OCTOSPI_DCR2_WRAPSIZE_Msk (0x7UL << OCTOSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00070000 */
-#define OCTOSPI_DCR2_WRAPSIZE OCTOSPI_DCR2_WRAPSIZE_Msk /*!< Wrap Size */
-#define OCTOSPI_DCR2_WRAPSIZE_0 (0x1UL << OCTOSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00010000 */
-#define OCTOSPI_DCR2_WRAPSIZE_1 (0x2UL << OCTOSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00020000 */
-#define OCTOSPI_DCR2_WRAPSIZE_2 (0x4UL << OCTOSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00040000 */
/**************** Bit definition for OCTOSPI_DCR3 register ******************/
#define OCTOSPI_DCR3_MAXTRAN_Pos (0U)
@@ -16357,8 +16360,8 @@
#define OCTOSPI_FCR_CSMF_Pos (3U)
#define OCTOSPI_FCR_CSMF_Msk (0x1UL << OCTOSPI_FCR_CSMF_Pos) /*!< 0x00000008 */
#define OCTOSPI_FCR_CSMF OCTOSPI_FCR_CSMF_Msk /*!< Clear Status Match Flag */
-#define OCTOSPI_FCR_TOF_Pos (8U)
-#define OCTOSPI_FCR_TOF_Msk (0x1UL << OCTOSPI_FCR_TOF_Pos) /*!< 0x00000100 */
+#define OCTOSPI_FCR_TOF_Pos (4U)
+#define OCTOSPI_FCR_TOF_Msk (0x1UL << OCTOSPI_FCR_TOF_Pos) /*!< 0x00000010 */
#define OCTOSPI_FCR_TOF OCTOSPI_FCR_TOF_Msk /*!< Clear Timeout Flag */
/**************** Bit definition for OCTOSPI_DLR register *******************/
@@ -16531,9 +16534,6 @@
#define OCTOSPI_WCCR_DQSE_Pos (29U)
#define OCTOSPI_WCCR_DQSE_Msk (0x1UL << OCTOSPI_WCCR_DQSE_Pos) /*!< 0x20000000 */
#define OCTOSPI_WCCR_DQSE OCTOSPI_WCCR_DQSE_Msk /*!< DQS Enable */
-#define OCTOSPI_WCCR_SIOO_Pos (31U)
-#define OCTOSPI_WCCR_SIOO_Msk (0x1UL << OCTOSPI_WCCR_SIOO_Pos) /*!< 0x80000000 */
-#define OCTOSPI_WCCR_SIOO OCTOSPI_WCCR_SIOO_Msk /*!< Send Instruction Only Once Mode */
/**************** Bit definition for OCTOSPI_WTCR register ******************/
#define OCTOSPI_WTCR_DCYC_Pos (0U)
diff --git a/Include/stm32l4r5xx.h b/Include/stm32l4r5xx.h
index b85460a..cd0528e 100644
--- a/Include/stm32l4r5xx.h
+++ b/Include/stm32l4r5xx.h
@@ -15,10 +15,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -6191,6 +6191,13 @@
#define CRS_CR_SWSYNC CRS_CR_SWSYNC_Msk /*!< Generate software SYNC event */
#define CRS_CR_TRIM_Pos (8U)
#define CRS_CR_TRIM_Msk (0x3FUL << CRS_CR_TRIM_Pos) /*!< 0x00003F00 */
+#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< TRIM[5:0] HSI48 oscillator smooth trimming */
+#define CRS_CR_TRIM_0 (0x01UL << CRS_CR_TRIM_Pos) /*!< 0x00000100 */
+#define CRS_CR_TRIM_1 (0x02UL << CRS_CR_TRIM_Pos) /*!< 0x00000200 */
+#define CRS_CR_TRIM_2 (0x04UL << CRS_CR_TRIM_Pos) /*!< 0x00000400 */
+#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
+#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
+#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
/******************* Bit definition for CRS_CFGR register *********************/
@@ -11629,9 +11636,11 @@
#define RCC_HSI48_SUPPORT
#define RCC_PLLM_DIV_1_16_SUPPORT
#define RCC_PLLP_DIV_2_31_SUPPORT
+#define RCC_PLLSAI1N_MUL_8_127_SUPPORT
#define RCC_PLLSAI1M_DIV_1_16_SUPPORT
#define RCC_PLLSAI1P_DIV_2_31_SUPPORT
#define RCC_PLLSAI2_SUPPORT
+#define RCC_PLLSAI2N_MUL_8_127_SUPPORT
#define RCC_PLLSAI2M_DIV_1_16_SUPPORT
#define RCC_PLLSAI2P_DIV_2_31_SUPPORT
#define RCC_PLLSAI2Q_DIV_SUPPORT
@@ -14791,7 +14800,7 @@
#define OCTOSPI_DCR1_FRCK_Pos (1U)
#define OCTOSPI_DCR1_FRCK_Msk (0x1UL << OCTOSPI_DCR1_FRCK_Pos) /*!< 0x00000002 */
#define OCTOSPI_DCR1_FRCK OCTOSPI_DCR1_FRCK_Msk /*!< Free Running Clock */
-#define OCTOSPI_DCR1_DLYBYP_Pos (1U)
+#define OCTOSPI_DCR1_DLYBYP_Pos (3U)
#define OCTOSPI_DCR1_DLYBYP_Msk (0x1UL << OCTOSPI_DCR1_DLYBYP_Pos) /*!< 0x00000004 */
#define OCTOSPI_DCR1_DLYBYP OCTOSPI_DCR1_DLYBYP_Msk /*!< Delay Block Bypass */
#define OCTOSPI_DCR1_CSHT_Pos (8U)
@@ -14811,12 +14820,6 @@
#define OCTOSPI_DCR2_PRESCALER_Pos (0U)
#define OCTOSPI_DCR2_PRESCALER_Msk (0xFFUL << OCTOSPI_DCR2_PRESCALER_Pos) /*!< 0x000000FF */
#define OCTOSPI_DCR2_PRESCALER OCTOSPI_DCR2_PRESCALER_Msk /*!< Clock prescaler */
-#define OCTOSPI_DCR2_WRAPSIZE_Pos (16U)
-#define OCTOSPI_DCR2_WRAPSIZE_Msk (0x7UL << OCTOSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00070000 */
-#define OCTOSPI_DCR2_WRAPSIZE OCTOSPI_DCR2_WRAPSIZE_Msk /*!< Wrap Size */
-#define OCTOSPI_DCR2_WRAPSIZE_0 (0x1UL << OCTOSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00010000 */
-#define OCTOSPI_DCR2_WRAPSIZE_1 (0x2UL << OCTOSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00020000 */
-#define OCTOSPI_DCR2_WRAPSIZE_2 (0x4UL << OCTOSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00040000 */
/**************** Bit definition for OCTOSPI_DCR3 register ******************/
#define OCTOSPI_DCR3_CSBOUND_Pos (16U)
@@ -14856,8 +14859,8 @@
#define OCTOSPI_FCR_CSMF_Pos (3U)
#define OCTOSPI_FCR_CSMF_Msk (0x1UL << OCTOSPI_FCR_CSMF_Pos) /*!< 0x00000008 */
#define OCTOSPI_FCR_CSMF OCTOSPI_FCR_CSMF_Msk /*!< Clear Status Match Flag */
-#define OCTOSPI_FCR_TOF_Pos (8U)
-#define OCTOSPI_FCR_TOF_Msk (0x1UL << OCTOSPI_FCR_TOF_Pos) /*!< 0x00000100 */
+#define OCTOSPI_FCR_TOF_Pos (4U)
+#define OCTOSPI_FCR_TOF_Msk (0x1UL << OCTOSPI_FCR_TOF_Pos) /*!< 0x00000010 */
#define OCTOSPI_FCR_TOF OCTOSPI_FCR_TOF_Msk /*!< Clear Timeout Flag */
/**************** Bit definition for OCTOSPI_DLR register *******************/
@@ -15030,9 +15033,6 @@
#define OCTOSPI_WCCR_DQSE_Pos (29U)
#define OCTOSPI_WCCR_DQSE_Msk (0x1UL << OCTOSPI_WCCR_DQSE_Pos) /*!< 0x20000000 */
#define OCTOSPI_WCCR_DQSE OCTOSPI_WCCR_DQSE_Msk /*!< DQS Enable */
-#define OCTOSPI_WCCR_SIOO_Pos (31U)
-#define OCTOSPI_WCCR_SIOO_Msk (0x1UL << OCTOSPI_WCCR_SIOO_Pos) /*!< 0x80000000 */
-#define OCTOSPI_WCCR_SIOO OCTOSPI_WCCR_SIOO_Msk /*!< Send Instruction Only Once Mode */
/**************** Bit definition for OCTOSPI_WTCR register ******************/
#define OCTOSPI_WTCR_DCYC_Pos (0U)
diff --git a/Include/stm32l4r7xx.h b/Include/stm32l4r7xx.h
index dce37da..9980337 100644
--- a/Include/stm32l4r7xx.h
+++ b/Include/stm32l4r7xx.h
@@ -15,10 +15,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -6277,6 +6277,13 @@
#define CRS_CR_SWSYNC CRS_CR_SWSYNC_Msk /*!< Generate software SYNC event */
#define CRS_CR_TRIM_Pos (8U)
#define CRS_CR_TRIM_Msk (0x3FUL << CRS_CR_TRIM_Pos) /*!< 0x00003F00 */
+#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< TRIM[5:0] HSI48 oscillator smooth trimming */
+#define CRS_CR_TRIM_0 (0x01UL << CRS_CR_TRIM_Pos) /*!< 0x00000100 */
+#define CRS_CR_TRIM_1 (0x02UL << CRS_CR_TRIM_Pos) /*!< 0x00000200 */
+#define CRS_CR_TRIM_2 (0x04UL << CRS_CR_TRIM_Pos) /*!< 0x00000400 */
+#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
+#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
+#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
/******************* Bit definition for CRS_CFGR register *********************/
@@ -12110,9 +12117,11 @@
#define RCC_HSI48_SUPPORT
#define RCC_PLLM_DIV_1_16_SUPPORT
#define RCC_PLLP_DIV_2_31_SUPPORT
+#define RCC_PLLSAI1N_MUL_8_127_SUPPORT
#define RCC_PLLSAI1M_DIV_1_16_SUPPORT
#define RCC_PLLSAI1P_DIV_2_31_SUPPORT
#define RCC_PLLSAI2_SUPPORT
+#define RCC_PLLSAI2N_MUL_8_127_SUPPORT
#define RCC_PLLSAI2M_DIV_1_16_SUPPORT
#define RCC_PLLSAI2P_DIV_2_31_SUPPORT
#define RCC_PLLSAI2Q_DIV_SUPPORT
@@ -15290,7 +15299,7 @@
#define OCTOSPI_DCR1_FRCK_Pos (1U)
#define OCTOSPI_DCR1_FRCK_Msk (0x1UL << OCTOSPI_DCR1_FRCK_Pos) /*!< 0x00000002 */
#define OCTOSPI_DCR1_FRCK OCTOSPI_DCR1_FRCK_Msk /*!< Free Running Clock */
-#define OCTOSPI_DCR1_DLYBYP_Pos (1U)
+#define OCTOSPI_DCR1_DLYBYP_Pos (3U)
#define OCTOSPI_DCR1_DLYBYP_Msk (0x1UL << OCTOSPI_DCR1_DLYBYP_Pos) /*!< 0x00000004 */
#define OCTOSPI_DCR1_DLYBYP OCTOSPI_DCR1_DLYBYP_Msk /*!< Delay Block Bypass */
#define OCTOSPI_DCR1_CSHT_Pos (8U)
@@ -15310,12 +15319,6 @@
#define OCTOSPI_DCR2_PRESCALER_Pos (0U)
#define OCTOSPI_DCR2_PRESCALER_Msk (0xFFUL << OCTOSPI_DCR2_PRESCALER_Pos) /*!< 0x000000FF */
#define OCTOSPI_DCR2_PRESCALER OCTOSPI_DCR2_PRESCALER_Msk /*!< Clock prescaler */
-#define OCTOSPI_DCR2_WRAPSIZE_Pos (16U)
-#define OCTOSPI_DCR2_WRAPSIZE_Msk (0x7UL << OCTOSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00070000 */
-#define OCTOSPI_DCR2_WRAPSIZE OCTOSPI_DCR2_WRAPSIZE_Msk /*!< Wrap Size */
-#define OCTOSPI_DCR2_WRAPSIZE_0 (0x1UL << OCTOSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00010000 */
-#define OCTOSPI_DCR2_WRAPSIZE_1 (0x2UL << OCTOSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00020000 */
-#define OCTOSPI_DCR2_WRAPSIZE_2 (0x4UL << OCTOSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00040000 */
/**************** Bit definition for OCTOSPI_DCR3 register ******************/
#define OCTOSPI_DCR3_CSBOUND_Pos (16U)
@@ -15355,8 +15358,8 @@
#define OCTOSPI_FCR_CSMF_Pos (3U)
#define OCTOSPI_FCR_CSMF_Msk (0x1UL << OCTOSPI_FCR_CSMF_Pos) /*!< 0x00000008 */
#define OCTOSPI_FCR_CSMF OCTOSPI_FCR_CSMF_Msk /*!< Clear Status Match Flag */
-#define OCTOSPI_FCR_TOF_Pos (8U)
-#define OCTOSPI_FCR_TOF_Msk (0x1UL << OCTOSPI_FCR_TOF_Pos) /*!< 0x00000100 */
+#define OCTOSPI_FCR_TOF_Pos (4U)
+#define OCTOSPI_FCR_TOF_Msk (0x1UL << OCTOSPI_FCR_TOF_Pos) /*!< 0x00000010 */
#define OCTOSPI_FCR_TOF OCTOSPI_FCR_TOF_Msk /*!< Clear Timeout Flag */
/**************** Bit definition for OCTOSPI_DLR register *******************/
@@ -15529,9 +15532,6 @@
#define OCTOSPI_WCCR_DQSE_Pos (29U)
#define OCTOSPI_WCCR_DQSE_Msk (0x1UL << OCTOSPI_WCCR_DQSE_Pos) /*!< 0x20000000 */
#define OCTOSPI_WCCR_DQSE OCTOSPI_WCCR_DQSE_Msk /*!< DQS Enable */
-#define OCTOSPI_WCCR_SIOO_Pos (31U)
-#define OCTOSPI_WCCR_SIOO_Msk (0x1UL << OCTOSPI_WCCR_SIOO_Pos) /*!< 0x80000000 */
-#define OCTOSPI_WCCR_SIOO OCTOSPI_WCCR_SIOO_Msk /*!< Send Instruction Only Once Mode */
/**************** Bit definition for OCTOSPI_WTCR register ******************/
#define OCTOSPI_WTCR_DCYC_Pos (0U)
diff --git a/Include/stm32l4r9xx.h b/Include/stm32l4r9xx.h
index 1ecad70..d7f4b02 100644
--- a/Include/stm32l4r9xx.h
+++ b/Include/stm32l4r9xx.h
@@ -15,10 +15,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -6359,6 +6359,13 @@
#define CRS_CR_SWSYNC CRS_CR_SWSYNC_Msk /*!< Generate software SYNC event */
#define CRS_CR_TRIM_Pos (8U)
#define CRS_CR_TRIM_Msk (0x3FUL << CRS_CR_TRIM_Pos) /*!< 0x00003F00 */
+#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< TRIM[5:0] HSI48 oscillator smooth trimming */
+#define CRS_CR_TRIM_0 (0x01UL << CRS_CR_TRIM_Pos) /*!< 0x00000100 */
+#define CRS_CR_TRIM_1 (0x02UL << CRS_CR_TRIM_Pos) /*!< 0x00000200 */
+#define CRS_CR_TRIM_2 (0x04UL << CRS_CR_TRIM_Pos) /*!< 0x00000400 */
+#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
+#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
+#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
/******************* Bit definition for CRS_CFGR register *********************/
@@ -15229,9 +15236,11 @@
#define RCC_HSI48_SUPPORT
#define RCC_PLLM_DIV_1_16_SUPPORT
#define RCC_PLLP_DIV_2_31_SUPPORT
+#define RCC_PLLSAI1N_MUL_8_127_SUPPORT
#define RCC_PLLSAI1M_DIV_1_16_SUPPORT
#define RCC_PLLSAI1P_DIV_2_31_SUPPORT
#define RCC_PLLSAI2_SUPPORT
+#define RCC_PLLSAI2N_MUL_8_127_SUPPORT
#define RCC_PLLSAI2M_DIV_1_16_SUPPORT
#define RCC_PLLSAI2P_DIV_2_31_SUPPORT
#define RCC_PLLSAI2Q_DIV_SUPPORT
@@ -18422,7 +18431,7 @@
#define OCTOSPI_DCR1_FRCK_Pos (1U)
#define OCTOSPI_DCR1_FRCK_Msk (0x1UL << OCTOSPI_DCR1_FRCK_Pos) /*!< 0x00000002 */
#define OCTOSPI_DCR1_FRCK OCTOSPI_DCR1_FRCK_Msk /*!< Free Running Clock */
-#define OCTOSPI_DCR1_DLYBYP_Pos (1U)
+#define OCTOSPI_DCR1_DLYBYP_Pos (3U)
#define OCTOSPI_DCR1_DLYBYP_Msk (0x1UL << OCTOSPI_DCR1_DLYBYP_Pos) /*!< 0x00000004 */
#define OCTOSPI_DCR1_DLYBYP OCTOSPI_DCR1_DLYBYP_Msk /*!< Delay Block Bypass */
#define OCTOSPI_DCR1_CSHT_Pos (8U)
@@ -18442,12 +18451,6 @@
#define OCTOSPI_DCR2_PRESCALER_Pos (0U)
#define OCTOSPI_DCR2_PRESCALER_Msk (0xFFUL << OCTOSPI_DCR2_PRESCALER_Pos) /*!< 0x000000FF */
#define OCTOSPI_DCR2_PRESCALER OCTOSPI_DCR2_PRESCALER_Msk /*!< Clock prescaler */
-#define OCTOSPI_DCR2_WRAPSIZE_Pos (16U)
-#define OCTOSPI_DCR2_WRAPSIZE_Msk (0x7UL << OCTOSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00070000 */
-#define OCTOSPI_DCR2_WRAPSIZE OCTOSPI_DCR2_WRAPSIZE_Msk /*!< Wrap Size */
-#define OCTOSPI_DCR2_WRAPSIZE_0 (0x1UL << OCTOSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00010000 */
-#define OCTOSPI_DCR2_WRAPSIZE_1 (0x2UL << OCTOSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00020000 */
-#define OCTOSPI_DCR2_WRAPSIZE_2 (0x4UL << OCTOSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00040000 */
/**************** Bit definition for OCTOSPI_DCR3 register ******************/
#define OCTOSPI_DCR3_CSBOUND_Pos (16U)
@@ -18487,8 +18490,8 @@
#define OCTOSPI_FCR_CSMF_Pos (3U)
#define OCTOSPI_FCR_CSMF_Msk (0x1UL << OCTOSPI_FCR_CSMF_Pos) /*!< 0x00000008 */
#define OCTOSPI_FCR_CSMF OCTOSPI_FCR_CSMF_Msk /*!< Clear Status Match Flag */
-#define OCTOSPI_FCR_TOF_Pos (8U)
-#define OCTOSPI_FCR_TOF_Msk (0x1UL << OCTOSPI_FCR_TOF_Pos) /*!< 0x00000100 */
+#define OCTOSPI_FCR_TOF_Pos (4U)
+#define OCTOSPI_FCR_TOF_Msk (0x1UL << OCTOSPI_FCR_TOF_Pos) /*!< 0x00000010 */
#define OCTOSPI_FCR_TOF OCTOSPI_FCR_TOF_Msk /*!< Clear Timeout Flag */
/**************** Bit definition for OCTOSPI_DLR register *******************/
@@ -18661,9 +18664,6 @@
#define OCTOSPI_WCCR_DQSE_Pos (29U)
#define OCTOSPI_WCCR_DQSE_Msk (0x1UL << OCTOSPI_WCCR_DQSE_Pos) /*!< 0x20000000 */
#define OCTOSPI_WCCR_DQSE OCTOSPI_WCCR_DQSE_Msk /*!< DQS Enable */
-#define OCTOSPI_WCCR_SIOO_Pos (31U)
-#define OCTOSPI_WCCR_SIOO_Msk (0x1UL << OCTOSPI_WCCR_SIOO_Pos) /*!< 0x80000000 */
-#define OCTOSPI_WCCR_SIOO OCTOSPI_WCCR_SIOO_Msk /*!< Send Instruction Only Once Mode */
/**************** Bit definition for OCTOSPI_WTCR register ******************/
#define OCTOSPI_WTCR_DCYC_Pos (0U)
diff --git a/Include/stm32l4s5xx.h b/Include/stm32l4s5xx.h
index 52391e1..ce71ac8 100644
--- a/Include/stm32l4s5xx.h
+++ b/Include/stm32l4s5xx.h
@@ -15,10 +15,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -6255,6 +6255,13 @@
#define CRS_CR_SWSYNC CRS_CR_SWSYNC_Msk /*!< Generate software SYNC event */
#define CRS_CR_TRIM_Pos (8U)
#define CRS_CR_TRIM_Msk (0x3FUL << CRS_CR_TRIM_Pos) /*!< 0x00003F00 */
+#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< TRIM[5:0] HSI48 oscillator smooth trimming */
+#define CRS_CR_TRIM_0 (0x01UL << CRS_CR_TRIM_Pos) /*!< 0x00000100 */
+#define CRS_CR_TRIM_1 (0x02UL << CRS_CR_TRIM_Pos) /*!< 0x00000200 */
+#define CRS_CR_TRIM_2 (0x04UL << CRS_CR_TRIM_Pos) /*!< 0x00000400 */
+#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
+#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
+#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
/******************* Bit definition for CRS_CFGR register *********************/
@@ -11958,9 +11965,11 @@
#define RCC_HSI48_SUPPORT
#define RCC_PLLM_DIV_1_16_SUPPORT
#define RCC_PLLP_DIV_2_31_SUPPORT
+#define RCC_PLLSAI1N_MUL_8_127_SUPPORT
#define RCC_PLLSAI1M_DIV_1_16_SUPPORT
#define RCC_PLLSAI1P_DIV_2_31_SUPPORT
#define RCC_PLLSAI2_SUPPORT
+#define RCC_PLLSAI2N_MUL_8_127_SUPPORT
#define RCC_PLLSAI2M_DIV_1_16_SUPPORT
#define RCC_PLLSAI2P_DIV_2_31_SUPPORT
#define RCC_PLLSAI2Q_DIV_SUPPORT
@@ -15138,7 +15147,7 @@
#define OCTOSPI_DCR1_FRCK_Pos (1U)
#define OCTOSPI_DCR1_FRCK_Msk (0x1UL << OCTOSPI_DCR1_FRCK_Pos) /*!< 0x00000002 */
#define OCTOSPI_DCR1_FRCK OCTOSPI_DCR1_FRCK_Msk /*!< Free Running Clock */
-#define OCTOSPI_DCR1_DLYBYP_Pos (1U)
+#define OCTOSPI_DCR1_DLYBYP_Pos (3U)
#define OCTOSPI_DCR1_DLYBYP_Msk (0x1UL << OCTOSPI_DCR1_DLYBYP_Pos) /*!< 0x00000004 */
#define OCTOSPI_DCR1_DLYBYP OCTOSPI_DCR1_DLYBYP_Msk /*!< Delay Block Bypass */
#define OCTOSPI_DCR1_CSHT_Pos (8U)
@@ -15158,12 +15167,6 @@
#define OCTOSPI_DCR2_PRESCALER_Pos (0U)
#define OCTOSPI_DCR2_PRESCALER_Msk (0xFFUL << OCTOSPI_DCR2_PRESCALER_Pos) /*!< 0x000000FF */
#define OCTOSPI_DCR2_PRESCALER OCTOSPI_DCR2_PRESCALER_Msk /*!< Clock prescaler */
-#define OCTOSPI_DCR2_WRAPSIZE_Pos (16U)
-#define OCTOSPI_DCR2_WRAPSIZE_Msk (0x7UL << OCTOSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00070000 */
-#define OCTOSPI_DCR2_WRAPSIZE OCTOSPI_DCR2_WRAPSIZE_Msk /*!< Wrap Size */
-#define OCTOSPI_DCR2_WRAPSIZE_0 (0x1UL << OCTOSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00010000 */
-#define OCTOSPI_DCR2_WRAPSIZE_1 (0x2UL << OCTOSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00020000 */
-#define OCTOSPI_DCR2_WRAPSIZE_2 (0x4UL << OCTOSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00040000 */
/**************** Bit definition for OCTOSPI_DCR3 register ******************/
#define OCTOSPI_DCR3_CSBOUND_Pos (16U)
@@ -15203,8 +15206,8 @@
#define OCTOSPI_FCR_CSMF_Pos (3U)
#define OCTOSPI_FCR_CSMF_Msk (0x1UL << OCTOSPI_FCR_CSMF_Pos) /*!< 0x00000008 */
#define OCTOSPI_FCR_CSMF OCTOSPI_FCR_CSMF_Msk /*!< Clear Status Match Flag */
-#define OCTOSPI_FCR_TOF_Pos (8U)
-#define OCTOSPI_FCR_TOF_Msk (0x1UL << OCTOSPI_FCR_TOF_Pos) /*!< 0x00000100 */
+#define OCTOSPI_FCR_TOF_Pos (4U)
+#define OCTOSPI_FCR_TOF_Msk (0x1UL << OCTOSPI_FCR_TOF_Pos) /*!< 0x00000010 */
#define OCTOSPI_FCR_TOF OCTOSPI_FCR_TOF_Msk /*!< Clear Timeout Flag */
/**************** Bit definition for OCTOSPI_DLR register *******************/
@@ -15377,9 +15380,6 @@
#define OCTOSPI_WCCR_DQSE_Pos (29U)
#define OCTOSPI_WCCR_DQSE_Msk (0x1UL << OCTOSPI_WCCR_DQSE_Pos) /*!< 0x20000000 */
#define OCTOSPI_WCCR_DQSE OCTOSPI_WCCR_DQSE_Msk /*!< DQS Enable */
-#define OCTOSPI_WCCR_SIOO_Pos (31U)
-#define OCTOSPI_WCCR_SIOO_Msk (0x1UL << OCTOSPI_WCCR_SIOO_Pos) /*!< 0x80000000 */
-#define OCTOSPI_WCCR_SIOO OCTOSPI_WCCR_SIOO_Msk /*!< Send Instruction Only Once Mode */
/**************** Bit definition for OCTOSPI_WTCR register ******************/
#define OCTOSPI_WTCR_DCYC_Pos (0U)
diff --git a/Include/stm32l4s7xx.h b/Include/stm32l4s7xx.h
index 8640468..f03a528 100644
--- a/Include/stm32l4s7xx.h
+++ b/Include/stm32l4s7xx.h
@@ -15,10 +15,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -6341,6 +6341,13 @@
#define CRS_CR_SWSYNC CRS_CR_SWSYNC_Msk /*!< Generate software SYNC event */
#define CRS_CR_TRIM_Pos (8U)
#define CRS_CR_TRIM_Msk (0x3FUL << CRS_CR_TRIM_Pos) /*!< 0x00003F00 */
+#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< TRIM[5:0] HSI48 oscillator smooth trimming */
+#define CRS_CR_TRIM_0 (0x01UL << CRS_CR_TRIM_Pos) /*!< 0x00000100 */
+#define CRS_CR_TRIM_1 (0x02UL << CRS_CR_TRIM_Pos) /*!< 0x00000200 */
+#define CRS_CR_TRIM_2 (0x04UL << CRS_CR_TRIM_Pos) /*!< 0x00000400 */
+#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
+#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
+#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
/******************* Bit definition for CRS_CFGR register *********************/
@@ -12439,9 +12446,11 @@
#define RCC_HSI48_SUPPORT
#define RCC_PLLM_DIV_1_16_SUPPORT
#define RCC_PLLP_DIV_2_31_SUPPORT
+#define RCC_PLLSAI1N_MUL_8_127_SUPPORT
#define RCC_PLLSAI1M_DIV_1_16_SUPPORT
#define RCC_PLLSAI1P_DIV_2_31_SUPPORT
#define RCC_PLLSAI2_SUPPORT
+#define RCC_PLLSAI2N_MUL_8_127_SUPPORT
#define RCC_PLLSAI2M_DIV_1_16_SUPPORT
#define RCC_PLLSAI2P_DIV_2_31_SUPPORT
#define RCC_PLLSAI2Q_DIV_SUPPORT
@@ -15637,7 +15646,7 @@
#define OCTOSPI_DCR1_FRCK_Pos (1U)
#define OCTOSPI_DCR1_FRCK_Msk (0x1UL << OCTOSPI_DCR1_FRCK_Pos) /*!< 0x00000002 */
#define OCTOSPI_DCR1_FRCK OCTOSPI_DCR1_FRCK_Msk /*!< Free Running Clock */
-#define OCTOSPI_DCR1_DLYBYP_Pos (1U)
+#define OCTOSPI_DCR1_DLYBYP_Pos (3U)
#define OCTOSPI_DCR1_DLYBYP_Msk (0x1UL << OCTOSPI_DCR1_DLYBYP_Pos) /*!< 0x00000004 */
#define OCTOSPI_DCR1_DLYBYP OCTOSPI_DCR1_DLYBYP_Msk /*!< Delay Block Bypass */
#define OCTOSPI_DCR1_CSHT_Pos (8U)
@@ -15657,12 +15666,6 @@
#define OCTOSPI_DCR2_PRESCALER_Pos (0U)
#define OCTOSPI_DCR2_PRESCALER_Msk (0xFFUL << OCTOSPI_DCR2_PRESCALER_Pos) /*!< 0x000000FF */
#define OCTOSPI_DCR2_PRESCALER OCTOSPI_DCR2_PRESCALER_Msk /*!< Clock prescaler */
-#define OCTOSPI_DCR2_WRAPSIZE_Pos (16U)
-#define OCTOSPI_DCR2_WRAPSIZE_Msk (0x7UL << OCTOSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00070000 */
-#define OCTOSPI_DCR2_WRAPSIZE OCTOSPI_DCR2_WRAPSIZE_Msk /*!< Wrap Size */
-#define OCTOSPI_DCR2_WRAPSIZE_0 (0x1UL << OCTOSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00010000 */
-#define OCTOSPI_DCR2_WRAPSIZE_1 (0x2UL << OCTOSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00020000 */
-#define OCTOSPI_DCR2_WRAPSIZE_2 (0x4UL << OCTOSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00040000 */
/**************** Bit definition for OCTOSPI_DCR3 register ******************/
#define OCTOSPI_DCR3_CSBOUND_Pos (16U)
@@ -15702,8 +15705,8 @@
#define OCTOSPI_FCR_CSMF_Pos (3U)
#define OCTOSPI_FCR_CSMF_Msk (0x1UL << OCTOSPI_FCR_CSMF_Pos) /*!< 0x00000008 */
#define OCTOSPI_FCR_CSMF OCTOSPI_FCR_CSMF_Msk /*!< Clear Status Match Flag */
-#define OCTOSPI_FCR_TOF_Pos (8U)
-#define OCTOSPI_FCR_TOF_Msk (0x1UL << OCTOSPI_FCR_TOF_Pos) /*!< 0x00000100 */
+#define OCTOSPI_FCR_TOF_Pos (4U)
+#define OCTOSPI_FCR_TOF_Msk (0x1UL << OCTOSPI_FCR_TOF_Pos) /*!< 0x00000010 */
#define OCTOSPI_FCR_TOF OCTOSPI_FCR_TOF_Msk /*!< Clear Timeout Flag */
/**************** Bit definition for OCTOSPI_DLR register *******************/
@@ -15876,9 +15879,6 @@
#define OCTOSPI_WCCR_DQSE_Pos (29U)
#define OCTOSPI_WCCR_DQSE_Msk (0x1UL << OCTOSPI_WCCR_DQSE_Pos) /*!< 0x20000000 */
#define OCTOSPI_WCCR_DQSE OCTOSPI_WCCR_DQSE_Msk /*!< DQS Enable */
-#define OCTOSPI_WCCR_SIOO_Pos (31U)
-#define OCTOSPI_WCCR_SIOO_Msk (0x1UL << OCTOSPI_WCCR_SIOO_Pos) /*!< 0x80000000 */
-#define OCTOSPI_WCCR_SIOO OCTOSPI_WCCR_SIOO_Msk /*!< Send Instruction Only Once Mode */
/**************** Bit definition for OCTOSPI_WTCR register ******************/
#define OCTOSPI_WTCR_DCYC_Pos (0U)
diff --git a/Include/stm32l4s9xx.h b/Include/stm32l4s9xx.h
index cbcfabe..9160a0f 100644
--- a/Include/stm32l4s9xx.h
+++ b/Include/stm32l4s9xx.h
@@ -15,10 +15,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -6423,6 +6423,13 @@
#define CRS_CR_SWSYNC CRS_CR_SWSYNC_Msk /*!< Generate software SYNC event */
#define CRS_CR_TRIM_Pos (8U)
#define CRS_CR_TRIM_Msk (0x3FUL << CRS_CR_TRIM_Pos) /*!< 0x00003F00 */
+#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< TRIM[5:0] HSI48 oscillator smooth trimming */
+#define CRS_CR_TRIM_0 (0x01UL << CRS_CR_TRIM_Pos) /*!< 0x00000100 */
+#define CRS_CR_TRIM_1 (0x02UL << CRS_CR_TRIM_Pos) /*!< 0x00000200 */
+#define CRS_CR_TRIM_2 (0x04UL << CRS_CR_TRIM_Pos) /*!< 0x00000400 */
+#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
+#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
+#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
/******************* Bit definition for CRS_CFGR register *********************/
@@ -15558,9 +15565,11 @@
#define RCC_HSI48_SUPPORT
#define RCC_PLLM_DIV_1_16_SUPPORT
#define RCC_PLLP_DIV_2_31_SUPPORT
+#define RCC_PLLSAI1N_MUL_8_127_SUPPORT
#define RCC_PLLSAI1M_DIV_1_16_SUPPORT
#define RCC_PLLSAI1P_DIV_2_31_SUPPORT
#define RCC_PLLSAI2_SUPPORT
+#define RCC_PLLSAI2N_MUL_8_127_SUPPORT
#define RCC_PLLSAI2M_DIV_1_16_SUPPORT
#define RCC_PLLSAI2P_DIV_2_31_SUPPORT
#define RCC_PLLSAI2Q_DIV_SUPPORT
@@ -18769,7 +18778,7 @@
#define OCTOSPI_DCR1_FRCK_Pos (1U)
#define OCTOSPI_DCR1_FRCK_Msk (0x1UL << OCTOSPI_DCR1_FRCK_Pos) /*!< 0x00000002 */
#define OCTOSPI_DCR1_FRCK OCTOSPI_DCR1_FRCK_Msk /*!< Free Running Clock */
-#define OCTOSPI_DCR1_DLYBYP_Pos (1U)
+#define OCTOSPI_DCR1_DLYBYP_Pos (3U)
#define OCTOSPI_DCR1_DLYBYP_Msk (0x1UL << OCTOSPI_DCR1_DLYBYP_Pos) /*!< 0x00000004 */
#define OCTOSPI_DCR1_DLYBYP OCTOSPI_DCR1_DLYBYP_Msk /*!< Delay Block Bypass */
#define OCTOSPI_DCR1_CSHT_Pos (8U)
@@ -18789,12 +18798,6 @@
#define OCTOSPI_DCR2_PRESCALER_Pos (0U)
#define OCTOSPI_DCR2_PRESCALER_Msk (0xFFUL << OCTOSPI_DCR2_PRESCALER_Pos) /*!< 0x000000FF */
#define OCTOSPI_DCR2_PRESCALER OCTOSPI_DCR2_PRESCALER_Msk /*!< Clock prescaler */
-#define OCTOSPI_DCR2_WRAPSIZE_Pos (16U)
-#define OCTOSPI_DCR2_WRAPSIZE_Msk (0x7UL << OCTOSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00070000 */
-#define OCTOSPI_DCR2_WRAPSIZE OCTOSPI_DCR2_WRAPSIZE_Msk /*!< Wrap Size */
-#define OCTOSPI_DCR2_WRAPSIZE_0 (0x1UL << OCTOSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00010000 */
-#define OCTOSPI_DCR2_WRAPSIZE_1 (0x2UL << OCTOSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00020000 */
-#define OCTOSPI_DCR2_WRAPSIZE_2 (0x4UL << OCTOSPI_DCR2_WRAPSIZE_Pos) /*!< 0x00040000 */
/**************** Bit definition for OCTOSPI_DCR3 register ******************/
#define OCTOSPI_DCR3_CSBOUND_Pos (16U)
@@ -18834,8 +18837,8 @@
#define OCTOSPI_FCR_CSMF_Pos (3U)
#define OCTOSPI_FCR_CSMF_Msk (0x1UL << OCTOSPI_FCR_CSMF_Pos) /*!< 0x00000008 */
#define OCTOSPI_FCR_CSMF OCTOSPI_FCR_CSMF_Msk /*!< Clear Status Match Flag */
-#define OCTOSPI_FCR_TOF_Pos (8U)
-#define OCTOSPI_FCR_TOF_Msk (0x1UL << OCTOSPI_FCR_TOF_Pos) /*!< 0x00000100 */
+#define OCTOSPI_FCR_TOF_Pos (4U)
+#define OCTOSPI_FCR_TOF_Msk (0x1UL << OCTOSPI_FCR_TOF_Pos) /*!< 0x00000010 */
#define OCTOSPI_FCR_TOF OCTOSPI_FCR_TOF_Msk /*!< Clear Timeout Flag */
/**************** Bit definition for OCTOSPI_DLR register *******************/
@@ -19008,9 +19011,6 @@
#define OCTOSPI_WCCR_DQSE_Pos (29U)
#define OCTOSPI_WCCR_DQSE_Msk (0x1UL << OCTOSPI_WCCR_DQSE_Pos) /*!< 0x20000000 */
#define OCTOSPI_WCCR_DQSE OCTOSPI_WCCR_DQSE_Msk /*!< DQS Enable */
-#define OCTOSPI_WCCR_SIOO_Pos (31U)
-#define OCTOSPI_WCCR_SIOO_Msk (0x1UL << OCTOSPI_WCCR_SIOO_Pos) /*!< 0x80000000 */
-#define OCTOSPI_WCCR_SIOO OCTOSPI_WCCR_SIOO_Msk /*!< Send Instruction Only Once Mode */
/**************** Bit definition for OCTOSPI_WTCR register ******************/
#define OCTOSPI_WTCR_DCYC_Pos (0U)
diff --git a/Include/stm32l4xx.h b/Include/stm32l4xx.h
index 619e8c0..89875b4 100644
--- a/Include/stm32l4xx.h
+++ b/Include/stm32l4xx.h
@@ -19,10 +19,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -106,8 +106,8 @@
* @brief CMSIS Device version number
*/
#define __STM32L4_CMSIS_VERSION_MAIN (0x01) /*!< [31:24] main version */
-#define __STM32L4_CMSIS_VERSION_SUB1 (0x06) /*!< [23:16] sub1 version */
-#define __STM32L4_CMSIS_VERSION_SUB2 (0x01) /*!< [15:8] sub2 version */
+#define __STM32L4_CMSIS_VERSION_SUB1 (0x07) /*!< [23:16] sub1 version */
+#define __STM32L4_CMSIS_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
#define __STM32L4_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */
#define __STM32L4_CMSIS_VERSION ((__STM32L4_CMSIS_VERSION_MAIN << 24)\
|(__STM32L4_CMSIS_VERSION_SUB1 << 16)\
diff --git a/Include/system_stm32l4xx.h b/Include/system_stm32l4xx.h
index 70c3899..00166a5 100644
--- a/Include/system_stm32l4xx.h
+++ b/Include/system_stm32l4xx.h
@@ -9,10 +9,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
diff --git a/License.md b/License.md
index 64783f9..e0d829b 100644
--- a/License.md
+++ b/License.md
@@ -81,4 +81,3 @@
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
-
diff --git a/README.md b/README.md
index 3e6beda..f0fa493 100644
--- a/README.md
+++ b/README.md
@@ -19,21 +19,24 @@
This **cmsis_device_l4** MCU component repo is one element of the STM32CubeL4 MCU embedded software package, providing the **cmsis device** part.
+## Release note
+
+Details about the content of this release are available in the release note [here](https://htmlpreview.github.io/?https://github.com/STMicroelectronics/cmsis_device_l4/blob/master/Release_Notes.html).
+
## Compatibility information
In this table, you can find the successive versions of this CMSIS Device component, in-line with the corresponding versions of the full MCU package:
CMSIS Device L4 | CMSIS Core | Was delivered in the full MCU package
--------------- | ---------- | -------------------------------------
-Tag v1.5.1 | Tag v5.4.0_cm4 | Tag v1.14.0
-Tag v1.6.0 | Tag v5.4.0_cm4 | Tag v1.15.0
-Tag v1.6.1 | Tag v5.4.0_cm4 | Tag v1.15.1
-
-Details about the content of this release are available in the release note [here](https://htmlpreview.github.io/?https://github.com/STMicroelectronics/cmsis_device_l4/blob/master/Release_Notes.html).
+Tag v1.5.1 | Tag v5.4.0_cm4 | Tag v1.14.0 (and following, if any, till next new tag)
+Tag v1.6.0 | Tag v5.4.0_cm4 | Tag v1.15.0 (and following, if any, till next new tag)
+Tag v1.6.1 | Tag v5.4.0_cm4 | Tag v1.15.1 (and following, if any, till next new tag)
+Tag v1.7.0 | Tag v5.6.0_cm4 | Tag v1.16.0 (and following, if any, till next new tag)
The full **STM32CubeL4** MCU package is available [here](https://github.com/STMicroelectronics/STM32CubeL4).
## Troubleshooting
If you have any issue with the **Software content** of this repo, you can [file an issue on Github](https://github.com/STMicroelectronics/cmsis_device_l4/issues/new).
-For any other question related to the product, the tools, the environment, you can submit a topic on the [ST Community/STM32 MCUs forum](https://community.st.com/s/group/0F90X000000AXsASAW/stm32-mcus).
+For any other question related to the product, the tools, the environment, you can submit a topic on the [ST Community/STM32 MCUs forum](https://community.st.com/s/group/0F90X000000AXsASAW/stm32-mcus).
\ No newline at end of file
diff --git a/Release_Notes.html b/Release_Notes.html
index c427881..48c9b38 100644
--- a/Release_Notes.html
+++ b/Release_Notes.html
@@ -30,8 +30,8 @@
</div>
</div>
<h1 id="license">License</h1>
-<p>Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:</p>
-<p><a href="https://opensource.org/licenses/BSD-3-Clause">https://opensource.org/licenses/BSD-3-Clause</a></p>
+<p>This software component is licensed by ST under Apache-2.0 license, the "License"; You may not use this component except in compliance with the License. You may obtain a copy of the License at:</p>
+<p><a href="https://opensource.org/licenses/Apache-2.0">Apache License v2.0</a></p>
<h1 id="purpose">Purpose</h1>
<p>This driver provides the CMSIS device for the stm32l4xx products. This covers</p>
<ul>
@@ -54,10 +54,38 @@
<div class="col-sm-12 col-lg-8">
<h1 id="update-history">Update History</h1>
<div class="collapse">
-<input type="checkbox" id="collapse-section22" checked aria-hidden="true"> <label for="collapse-section22" aria-hidden="true">V1.6.1 / 07-February-2020</label>
+<input type="checkbox" id="collapse-section23" checked aria-hidden="true"> <label for="collapse-section23" aria-hidden="true">V1.7.0 / 26-June-2020</label>
<div>
<h2 id="main-changes">Main Changes</h2>
<ul>
+<li>stm32l4p5xx.h, stm32l4q5xx.h, stm32l4r5xx.h, stm32l4r7xx.h, stm32l4r9xx.h, stm32l4s5xx.h, stm32l4s7xx.h, stm32l4s9xx.h and stm32l4xxxxx.h
+<ul>
+<li>Update bit definitions in OCTOSPI registers
+<ul>
+<li>Remove WRAPSIZE field in DCR2 register as the wrap is not supported for L4+ devices</li>
+<li>Update DLYBYP, CSHT, TOF and SIOO bit definitions</li>
+</ul></li>
+</ul></li>
+<li>stm32l431xx.h, stm32l432xx.h, stm32l433xx.h, stm32l442xx.h, stm32l443xx.h and stm32l4xxxxx.h
+<ul>
+<li>Align HSITRIM configuration with reference manual</li>
+</ul></li>
+<li>stm32l412xx.h, stm32l422xx.h, stm32l431xx.h, stm32l432xx.h, stm32l433xx.h, stm32l442xx.h, stm32l443xx.h, stm32l451xx.h, stm32l452xx.h, stm32l462xx.h, stm32l496xx.h, stm32l4a6xx.h, stm32l4p5xx.h, stm32l4q5xx.h, stm32l4r5xx.h, stm32l4r7xx.h, stm32l4r9xx.h, stm32l4s5xx.h, stm32l4s7xx.h and stm32l4s9xx.h
+<ul>
+<li>Add bit descriptions for CRS_CR_TRIM field in CRS_RC register</li>
+</ul></li>
+<li>All gcc startup files
+<ul>
+<li>Align startup files with IAR/Keil startup files by calling SystemInit() before data initialization</li>
+</ul></li>
+</ul>
+</div>
+</div>
+<div class="collapse">
+<input type="checkbox" id="collapse-section22" aria-hidden="true"> <label for="collapse-section22" aria-hidden="true">V1.6.1 / 07-February-2020</label>
+<div>
+<h2 id="main-changes-1">Main Changes</h2>
+<ul>
<li>Add bit definitions in OCTOSPI registers
<ul>
<li>stm32l4p5xx.h, stm32l4q5xx.h, stm32l4r5xx.h, stm32l4r7xx.h, stm32l4r9xx.h, stm32l4s5xx.h, stm32l4s7xx.h and stm32l4s9xx.h
@@ -75,7 +103,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section21" aria-hidden="true"> <label for="collapse-section21" aria-hidden="true">V1.6.0 / 22-November-2019</label>
<div>
-<h2 id="main-changes-1">Main Changes</h2>
+<h2 id="main-changes-2">Main Changes</h2>
<ul>
<li>Add the support of <strong>STM32L4P5xx/STM32L4Q5xx</strong> devices
<ul>
@@ -129,7 +157,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section20" aria-hidden="true"> <label for="collapse-section20" aria-hidden="true">V1.5.1 / 03-April-2019</label>
<div>
-<h2 id="main-changes-2">Main Changes</h2>
+<h2 id="main-changes-3">Main Changes</h2>
<ul>
<li>stm32l412xx.h, stm32l422xx.h, stm32l431xx.h, stm32l432xx.h, stm32l433xx.h, stm32l442xx.h, stm32l443xx.h, stm32l451xx.h, stm32l452xx.h, stm32l462xx.h and stm32l471xx.h
<ul>
@@ -170,7 +198,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section19" aria-hidden="true"> <label for="collapse-section19" aria-hidden="true">V1.5.0 / 27-July-2018</label>
<div>
-<h2 id="main-changes-3">Main Changes</h2>
+<h2 id="main-changes-4">Main Changes</h2>
<ul>
<li><span style="font-size: 10pt; font-family: Verdana;">Add </span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;">stm32l412xx.h and <span class="Apple-converted-space"></span></span><span style="font-size: 10pt; font-family: Verdana;">stm32l422xx.h</span><span style="font-size: 10pt; font-family: Verdana;">device description files</span></li>
<li><span style="font-size: 10pt; font-family: Verdana;">Add startup files</span><span style="font-size: 10pt; font-family: Verdana;">startup_</span><span style="font-size: 10pt; font-family: Verdana;">stm32l412xx.s</span><span style="font-size: 10pt; font-family: Verdana;"><span class="Apple-converted-space"></span></span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;">and<span class="Apple-converted-space"> </span></span><span style="font-size: 10pt; font-family: Verdana;">startup_</span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;">stm32l422xx.s</span><span style="font-size: 10pt; font-family: Verdana;">for EWARM, MDK-ARM and SW4STM32 toolchains</span></li>
@@ -203,7 +231,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section1" aria-hidden="true"> <label for="collapse-section1" aria-hidden="true">V1.4.3 / 30-April-2018</label>
<div>
-<h2 id="main-changes-4">Main Changes</h2>
+<h2 id="main-changes-5">Main Changes</h2>
<ul>
<li><p><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;">All </span><span style="font-size: 10pt; font-family: Verdana;">stm32l4XXxx.h device description files</span></p>
<ul>
@@ -226,7 +254,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section5" aria-hidden="true"> <label for="collapse-section5" aria-hidden="true">V1.4.2 / 22-December-2017</label>
<div>
-<h2 id="main-changes-5">Main Changes</h2>
+<h2 id="main-changes-6">Main Changes</h2>
<ul>
<li><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;">SPI_TypeDef cleanup of Reserved fields.</span></li>
</ul>
@@ -235,7 +263,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section6" aria-hidden="true"> <label for="collapse-section6" aria-hidden="true">V1.4.1 / 6-October-2017</label>
<div>
-<h2 id="main-changes-6">Main Changes</h2>
+<h2 id="main-changes-7">Main Changes</h2>
<p><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;">stm32l4r5xx.h and stm32l4s5xx.h description files</span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span></p>
<ul>
<li><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;">Remove LTDC peripheral definitions as LTDC not available on STM32L4R5xx/STM32L4S5xx devices</span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold;"></span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold;"></span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold;"></span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold;"></span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold;"></span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold;"></span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold;"></span></span></li>
@@ -245,7 +273,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section7" aria-hidden="true"> <label for="collapse-section7" aria-hidden="true">V1.4.0 / 25-August-2017</label>
<div>
-<h2 id="main-changes-7">Main Changes</h2>
+<h2 id="main-changes-8">Main Changes</h2>
<ul>
<li><p><span style="font-size: 10pt; font-family: Verdana;">Add the support of </span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold;">STM32L4R5xx/</span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold;">STM32L4R7xx/</span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold;">STM32L4R9xx/</span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold;">STM32L4S5xx/</span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold;">STM32L4S7xx/STM32L4S9xx</span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold;"></span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold;"></span> devices</span></p>
<ul>
@@ -282,7 +310,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section8" aria-hidden="true"> <label for="collapse-section8" aria-hidden="true">V1.3.2 / 16-June-2017</label>
<div>
-<h2 id="main-changes-8">Main Changes</h2>
+<h2 id="main-changes-9">Main Changes</h2>
<ul>
<li><p><span style="font-size: 10pt; font-family: Verdana;">stm32l451xx.h, stm32l452xx.h, stm32l462xx.h description files</span></p>
<ul>
@@ -309,7 +337,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section9" aria-hidden="true"> <label for="collapse-section9" aria-hidden="true">V1.3.1 / 21-April-2017</label>
<div>
-<h2 id="main-changes-9">Main Changes</h2>
+<h2 id="main-changes-10">Main Changes</h2>
<ul>
<li><p><span style="font-size: 10pt; font-family: Verdana;">stm32l496xx.h and stm32l4a6xx.h device description files</span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span></p>
<ul>
@@ -328,7 +356,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section10" aria-hidden="true"> <label for="collapse-section10" aria-hidden="true">V1.3.0 / 17-February-2017</label>
<div>
-<h2 id="main-changes-10">Main Changes</h2>
+<h2 id="main-changes-11">Main Changes</h2>
<ul>
<li><p><span style="font-size: 10pt; font-family: Verdana;">Add the support of <span style="font-weight: bold;"></span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold;">STM32L496xx/STM32L4A6xx</span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold;"></span> devices</span></p>
<ul>
@@ -355,7 +383,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section11" aria-hidden="true"> <label for="collapse-section11" aria-hidden="true">V1.2.0 / 28-October-2016</label>
<div>
-<h2 id="main-changes-11">Main Changes</h2>
+<h2 id="main-changes-12">Main Changes</h2>
<ul>
<li><p><span style="font-size: 10pt; font-family: Verdana;">Add the support of <span style="font-weight: bold;">STM32L451xx/STM32L452xx/STM32L462xx</span> devices</span></p>
<ul>
@@ -389,7 +417,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section12" aria-hidden="true"> <label for="collapse-section12" aria-hidden="true">V1.1.2 / 12-September-2016</label>
<div>
-<h2 id="main-changes-12">Main Changes</h2>
+<h2 id="main-changes-13">Main Changes</h2>
<ul>
<li><p><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;">Fix DAC_SR_BWST1 bit definition</span></p></li>
<li><p><span style="font-size: 10pt; font-family: Verdana;">Fix SDMMC_DCTRL_DBLOCKSIZE_2 and SDMMC_DCTRL_DBLOCKSIZE_3 bits definition</span></p></li>
@@ -405,7 +433,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section13" aria-hidden="true"> <label for="collapse-section13" aria-hidden="true">V1.1.1 / 29-April-2016</label>
<div>
-<h2 id="main-changes-13">Main Changes</h2>
+<h2 id="main-changes-14">Main Changes</h2>
<ul>
<li><p><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;">All device register description files enriched with _Pos and _Msk defines to be used with _VAL2FLD(field, value) and _FLD2VAL(field, value) from CMSIS Core (previous defines are kept for compatibility)</span></p></li>
<li><p><span style="font-size: 10pt; font-family: Verdana;">stm32l471xx.h, stm32l475xx.h, stm32l476xx.h, stm32l485xx.h and stm32l486xx.h device description files</span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span></p>
@@ -461,7 +489,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section14" aria-hidden="true"> <label for="collapse-section14" aria-hidden="true">V1.1.0 / 26-February-2016</label>
<div>
-<h2 id="main-changes-14">Main Changes</h2>
+<h2 id="main-changes-15">Main Changes</h2>
<ul>
<li><p><span style="font-size: 10pt; font-family: Verdana;">Add the support of <span style="font-weight: bold;">STM32L431xx/STM32L432xx/STM32L433xx/STM32L442xx/STM32L443xx</span> devices</span></p>
<ul>
@@ -495,7 +523,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section15" aria-hidden="true"> <label for="collapse-section15" aria-hidden="true">V1.0.3 / 29-January-2016</label>
<div>
-<h2 id="main-changes-15">Main Changes</h2>
+<h2 id="main-changes-16">Main Changes</h2>
<ul>
<li><p><span style="font-size: 10pt; font-family: Verdana;">stm32l471xx.h, stm32l475xx.h, stm32l476xx.h, stm32l485xx.h and stm32l486xx.h device description files</span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span></p>
<ul>
@@ -519,7 +547,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section16" aria-hidden="true"> <label for="collapse-section16" aria-hidden="true">V1.0.2 / 25-November-2015</label>
<div>
-<h2 id="main-changes-16">Main Changes</h2>
+<h2 id="main-changes-17">Main Changes</h2>
<ul>
<li><p><span style="font-size: 10pt; font-family: Verdana;">stm32l471xx.h, stm32l475xx.h, stm32l476xx.h, stm32l485xx.h and stm32l486xx.h device description files</span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span></p>
<ul>
@@ -556,7 +584,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section17" aria-hidden="true"> <label for="collapse-section17" aria-hidden="true">V1.0.1 / 16-September-2015</label>
<div>
-<h2 id="main-changes-17">Main Changes</h2>
+<h2 id="main-changes-18">Main Changes</h2>
<ul>
<li><p><span style="font-size: 10pt; font-family: Verdana;">stm32l471xx.h, stm32l475xx.h, stm32l476xx.h, stm32l485xx.h and stm32l486xx.h device</span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;">description files</span></p>
<ul>
@@ -588,7 +616,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section18" aria-hidden="true"> <label for="collapse-section18" aria-hidden="true">V1.0.0 / 26-June-2015</label>
<div>
-<h2 id="main-changes-18">Main Changes</h2>
+<h2 id="main-changes-19">Main Changes</h2>
<ul>
<li><span style="font-size: 10pt; font-family: Verdana;">First official release for </span><span style="font-size: 10pt; font-family: Verdana; font-style: italic; font-weight: bold;">STM32L471xx, STM32L475xx, STM32L476xx, STM32L485xx and STM32L486xx devices</span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic; font-weight: bold;"><br />
</span></span></li>
diff --git a/Source/Templates/arm/startup_stm32l412xx.s b/Source/Templates/arm/startup_stm32l412xx.s
index 0a5e773..657f6bd 100644
--- a/Source/Templates/arm/startup_stm32l412xx.s
+++ b/Source/Templates/arm/startup_stm32l412xx.s
@@ -15,10 +15,10 @@
;* <h2><center>© Copyright (c) 2018 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;* <<< Use Configuration Wizard in Context Menu >>>
diff --git a/Source/Templates/arm/startup_stm32l422xx.s b/Source/Templates/arm/startup_stm32l422xx.s
index 3a05b96..c3c52c6 100644
--- a/Source/Templates/arm/startup_stm32l422xx.s
+++ b/Source/Templates/arm/startup_stm32l422xx.s
@@ -15,10 +15,10 @@
;* <h2><center>© Copyright (c) 2018 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;* <<< Use Configuration Wizard in Context Menu >>>
diff --git a/Source/Templates/arm/startup_stm32l431xx.s b/Source/Templates/arm/startup_stm32l431xx.s
index 023e007..aaa71c8 100644
--- a/Source/Templates/arm/startup_stm32l431xx.s
+++ b/Source/Templates/arm/startup_stm32l431xx.s
@@ -15,10 +15,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;* <<< Use Configuration Wizard in Context Menu >>>
diff --git a/Source/Templates/arm/startup_stm32l432xx.s b/Source/Templates/arm/startup_stm32l432xx.s
index 01c8d8e..a945f50 100644
--- a/Source/Templates/arm/startup_stm32l432xx.s
+++ b/Source/Templates/arm/startup_stm32l432xx.s
@@ -15,10 +15,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;* <<< Use Configuration Wizard in Context Menu >>>
diff --git a/Source/Templates/arm/startup_stm32l433xx.s b/Source/Templates/arm/startup_stm32l433xx.s
index 0ae8aa3..272f8df 100644
--- a/Source/Templates/arm/startup_stm32l433xx.s
+++ b/Source/Templates/arm/startup_stm32l433xx.s
@@ -15,10 +15,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;* <<< Use Configuration Wizard in Context Menu >>>
diff --git a/Source/Templates/arm/startup_stm32l442xx.s b/Source/Templates/arm/startup_stm32l442xx.s
index 7048cd9..61d30f5 100644
--- a/Source/Templates/arm/startup_stm32l442xx.s
+++ b/Source/Templates/arm/startup_stm32l442xx.s
@@ -15,10 +15,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;* <<< Use Configuration Wizard in Context Menu >>>
diff --git a/Source/Templates/arm/startup_stm32l443xx.s b/Source/Templates/arm/startup_stm32l443xx.s
index cb50327..159a2e5 100644
--- a/Source/Templates/arm/startup_stm32l443xx.s
+++ b/Source/Templates/arm/startup_stm32l443xx.s
@@ -15,10 +15,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;* <<< Use Configuration Wizard in Context Menu >>>
diff --git a/Source/Templates/arm/startup_stm32l451xx.s b/Source/Templates/arm/startup_stm32l451xx.s
index c162bd5..e0ba29c 100644
--- a/Source/Templates/arm/startup_stm32l451xx.s
+++ b/Source/Templates/arm/startup_stm32l451xx.s
@@ -15,10 +15,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;* <<< Use Configuration Wizard in Context Menu >>>
diff --git a/Source/Templates/arm/startup_stm32l452xx.s b/Source/Templates/arm/startup_stm32l452xx.s
index 76c8cca..9738a4d 100644
--- a/Source/Templates/arm/startup_stm32l452xx.s
+++ b/Source/Templates/arm/startup_stm32l452xx.s
@@ -15,10 +15,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;* <<< Use Configuration Wizard in Context Menu >>>
diff --git a/Source/Templates/arm/startup_stm32l462xx.s b/Source/Templates/arm/startup_stm32l462xx.s
index ebc8cdf..18248e1 100644
--- a/Source/Templates/arm/startup_stm32l462xx.s
+++ b/Source/Templates/arm/startup_stm32l462xx.s
@@ -15,10 +15,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;* <<< Use Configuration Wizard in Context Menu >>>
diff --git a/Source/Templates/arm/startup_stm32l471xx.s b/Source/Templates/arm/startup_stm32l471xx.s
index 3c59f3e..22b2011 100644
--- a/Source/Templates/arm/startup_stm32l471xx.s
+++ b/Source/Templates/arm/startup_stm32l471xx.s
@@ -15,10 +15,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;* <<< Use Configuration Wizard in Context Menu >>>
diff --git a/Source/Templates/arm/startup_stm32l475xx.s b/Source/Templates/arm/startup_stm32l475xx.s
index 31cff72..6fe7904 100644
--- a/Source/Templates/arm/startup_stm32l475xx.s
+++ b/Source/Templates/arm/startup_stm32l475xx.s
@@ -15,10 +15,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;* <<< Use Configuration Wizard in Context Menu >>>
diff --git a/Source/Templates/arm/startup_stm32l476xx.s b/Source/Templates/arm/startup_stm32l476xx.s
index 9681418..9f596f8 100644
--- a/Source/Templates/arm/startup_stm32l476xx.s
+++ b/Source/Templates/arm/startup_stm32l476xx.s
@@ -15,10 +15,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;* <<< Use Configuration Wizard in Context Menu >>>
diff --git a/Source/Templates/arm/startup_stm32l485xx.s b/Source/Templates/arm/startup_stm32l485xx.s
index f80b05f..ac6a693 100644
--- a/Source/Templates/arm/startup_stm32l485xx.s
+++ b/Source/Templates/arm/startup_stm32l485xx.s
@@ -15,10 +15,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;* <<< Use Configuration Wizard in Context Menu >>>
diff --git a/Source/Templates/arm/startup_stm32l486xx.s b/Source/Templates/arm/startup_stm32l486xx.s
index 255838c..879332f 100644
--- a/Source/Templates/arm/startup_stm32l486xx.s
+++ b/Source/Templates/arm/startup_stm32l486xx.s
@@ -15,10 +15,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;* <<< Use Configuration Wizard in Context Menu >>>
diff --git a/Source/Templates/arm/startup_stm32l496xx.s b/Source/Templates/arm/startup_stm32l496xx.s
index e31f22d..c75789a 100644
--- a/Source/Templates/arm/startup_stm32l496xx.s
+++ b/Source/Templates/arm/startup_stm32l496xx.s
@@ -15,10 +15,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;* <<< Use Configuration Wizard in Context Menu >>>
diff --git a/Source/Templates/arm/startup_stm32l4a6xx.s b/Source/Templates/arm/startup_stm32l4a6xx.s
index d178004..15a39c0 100644
--- a/Source/Templates/arm/startup_stm32l4a6xx.s
+++ b/Source/Templates/arm/startup_stm32l4a6xx.s
@@ -15,10 +15,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;* <<< Use Configuration Wizard in Context Menu >>>
diff --git a/Source/Templates/arm/startup_stm32l4p5xx.s b/Source/Templates/arm/startup_stm32l4p5xx.s
index 9749c3a..79668ad 100644
--- a/Source/Templates/arm/startup_stm32l4p5xx.s
+++ b/Source/Templates/arm/startup_stm32l4p5xx.s
@@ -15,10 +15,10 @@
;* <h2><center>© Copyright (c) 2019 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;* <<< Use Configuration Wizard in Context Menu >>>
diff --git a/Source/Templates/arm/startup_stm32l4q5xx.s b/Source/Templates/arm/startup_stm32l4q5xx.s
index 1196fa9..658a8f5 100644
--- a/Source/Templates/arm/startup_stm32l4q5xx.s
+++ b/Source/Templates/arm/startup_stm32l4q5xx.s
@@ -15,10 +15,10 @@
;* <h2><center>© Copyright (c) 2019 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;* <<< Use Configuration Wizard in Context Menu >>>
diff --git a/Source/Templates/arm/startup_stm32l4r5xx.s b/Source/Templates/arm/startup_stm32l4r5xx.s
index 30ec7ef..2d1d3df 100644
--- a/Source/Templates/arm/startup_stm32l4r5xx.s
+++ b/Source/Templates/arm/startup_stm32l4r5xx.s
@@ -15,10 +15,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;* <<< Use Configuration Wizard in Context Menu >>>
diff --git a/Source/Templates/arm/startup_stm32l4r7xx.s b/Source/Templates/arm/startup_stm32l4r7xx.s
index b5cea67..41bc70a 100644
--- a/Source/Templates/arm/startup_stm32l4r7xx.s
+++ b/Source/Templates/arm/startup_stm32l4r7xx.s
@@ -15,10 +15,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;* <<< Use Configuration Wizard in Context Menu >>>
diff --git a/Source/Templates/arm/startup_stm32l4r9xx.s b/Source/Templates/arm/startup_stm32l4r9xx.s
index c4d612d..62241c2 100644
--- a/Source/Templates/arm/startup_stm32l4r9xx.s
+++ b/Source/Templates/arm/startup_stm32l4r9xx.s
@@ -15,10 +15,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;* <<< Use Configuration Wizard in Context Menu >>>
diff --git a/Source/Templates/arm/startup_stm32l4s5xx.s b/Source/Templates/arm/startup_stm32l4s5xx.s
index fa56293..1529d25 100644
--- a/Source/Templates/arm/startup_stm32l4s5xx.s
+++ b/Source/Templates/arm/startup_stm32l4s5xx.s
@@ -15,10 +15,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;* <<< Use Configuration Wizard in Context Menu >>>
diff --git a/Source/Templates/arm/startup_stm32l4s7xx.s b/Source/Templates/arm/startup_stm32l4s7xx.s
index 61ac369..80d7c9f 100644
--- a/Source/Templates/arm/startup_stm32l4s7xx.s
+++ b/Source/Templates/arm/startup_stm32l4s7xx.s
@@ -15,10 +15,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;* <<< Use Configuration Wizard in Context Menu >>>
diff --git a/Source/Templates/arm/startup_stm32l4s9xx.s b/Source/Templates/arm/startup_stm32l4s9xx.s
index 249679b..c11d579 100644
--- a/Source/Templates/arm/startup_stm32l4s9xx.s
+++ b/Source/Templates/arm/startup_stm32l4s9xx.s
@@ -15,10 +15,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;* <<< Use Configuration Wizard in Context Menu >>>
diff --git a/Source/Templates/gcc/startup_stm32l412xx.s b/Source/Templates/gcc/startup_stm32l412xx.s
index b52f061..9bc7278 100644
--- a/Source/Templates/gcc/startup_stm32l412xx.s
+++ b/Source/Templates/gcc/startup_stm32l412xx.s
@@ -18,10 +18,10 @@
* <h2><center>© Copyright (c) 2018 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -62,6 +62,9 @@
Reset_Handler:
ldr sp, =_estack /* Set stack pointer */
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
@@ -90,8 +93,6 @@
cmp r2, r3
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32l422xx.s b/Source/Templates/gcc/startup_stm32l422xx.s
index f67eec1..faab576 100644
--- a/Source/Templates/gcc/startup_stm32l422xx.s
+++ b/Source/Templates/gcc/startup_stm32l422xx.s
@@ -18,10 +18,10 @@
* <h2><center>© Copyright (c) 2018 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -62,6 +62,9 @@
Reset_Handler:
ldr sp, =_estack /* Set stack pointer */
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
@@ -90,8 +93,6 @@
cmp r2, r3
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32l431xx.s b/Source/Templates/gcc/startup_stm32l431xx.s
index 29b7c24..7e5fba4 100644
--- a/Source/Templates/gcc/startup_stm32l431xx.s
+++ b/Source/Templates/gcc/startup_stm32l431xx.s
@@ -18,10 +18,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -62,6 +62,9 @@
Reset_Handler:
ldr sp, =_estack /* Set stack pointer */
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
@@ -90,8 +93,6 @@
cmp r2, r3
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32l432xx.s b/Source/Templates/gcc/startup_stm32l432xx.s
index 9cdc647..3f5fad1 100644
--- a/Source/Templates/gcc/startup_stm32l432xx.s
+++ b/Source/Templates/gcc/startup_stm32l432xx.s
@@ -18,10 +18,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -62,6 +62,9 @@
Reset_Handler:
ldr sp, =_estack /* Set stack pointer */
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
@@ -90,8 +93,6 @@
cmp r2, r3
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32l433xx.s b/Source/Templates/gcc/startup_stm32l433xx.s
index 3dc1759..ee6dde0 100644
--- a/Source/Templates/gcc/startup_stm32l433xx.s
+++ b/Source/Templates/gcc/startup_stm32l433xx.s
@@ -18,10 +18,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -62,6 +62,9 @@
Reset_Handler:
ldr sp, =_estack /* Set stack pointer */
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
@@ -90,8 +93,6 @@
cmp r2, r3
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32l442xx.s b/Source/Templates/gcc/startup_stm32l442xx.s
index 8afb1d2..1150540 100644
--- a/Source/Templates/gcc/startup_stm32l442xx.s
+++ b/Source/Templates/gcc/startup_stm32l442xx.s
@@ -18,10 +18,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -62,6 +62,9 @@
Reset_Handler:
ldr sp, =_estack /* Set stack pointer */
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
@@ -90,8 +93,6 @@
cmp r2, r3
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32l443xx.s b/Source/Templates/gcc/startup_stm32l443xx.s
index 69aeb41..8437e0b 100644
--- a/Source/Templates/gcc/startup_stm32l443xx.s
+++ b/Source/Templates/gcc/startup_stm32l443xx.s
@@ -18,10 +18,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -62,6 +62,9 @@
Reset_Handler:
ldr sp, =_estack /* Set stack pointer */
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
@@ -90,8 +93,6 @@
cmp r2, r3
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32l451xx.s b/Source/Templates/gcc/startup_stm32l451xx.s
index b25c1fa..441537e 100644
--- a/Source/Templates/gcc/startup_stm32l451xx.s
+++ b/Source/Templates/gcc/startup_stm32l451xx.s
@@ -18,10 +18,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -62,6 +62,9 @@
Reset_Handler:
ldr sp, =_estack /* Set stack pointer */
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
@@ -90,8 +93,6 @@
cmp r2, r3
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32l452xx.s b/Source/Templates/gcc/startup_stm32l452xx.s
index 76c9b59..1ce9d78 100644
--- a/Source/Templates/gcc/startup_stm32l452xx.s
+++ b/Source/Templates/gcc/startup_stm32l452xx.s
@@ -18,10 +18,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -62,6 +62,9 @@
Reset_Handler:
ldr sp, =_estack /* Set stack pointer */
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
@@ -90,8 +93,6 @@
cmp r2, r3
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32l462xx.s b/Source/Templates/gcc/startup_stm32l462xx.s
index 39a8acd..2ff8593 100644
--- a/Source/Templates/gcc/startup_stm32l462xx.s
+++ b/Source/Templates/gcc/startup_stm32l462xx.s
@@ -18,10 +18,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -62,6 +62,9 @@
Reset_Handler:
ldr sp, =_estack /* Set stack pointer */
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
@@ -90,8 +93,6 @@
cmp r2, r3
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32l471xx.s b/Source/Templates/gcc/startup_stm32l471xx.s
index 7f646ea..c9c68c3 100644
--- a/Source/Templates/gcc/startup_stm32l471xx.s
+++ b/Source/Templates/gcc/startup_stm32l471xx.s
@@ -18,10 +18,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -62,6 +62,9 @@
Reset_Handler:
ldr sp, =_estack /* Set stack pointer */
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
@@ -90,8 +93,6 @@
cmp r2, r3
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32l475xx.s b/Source/Templates/gcc/startup_stm32l475xx.s
index 5b658a2..5e40b9c 100644
--- a/Source/Templates/gcc/startup_stm32l475xx.s
+++ b/Source/Templates/gcc/startup_stm32l475xx.s
@@ -18,10 +18,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -62,6 +62,9 @@
Reset_Handler:
ldr sp, =_estack /* Set stack pointer */
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
@@ -90,8 +93,6 @@
cmp r2, r3
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32l476xx.s b/Source/Templates/gcc/startup_stm32l476xx.s
index c41ecae..f076fac 100644
--- a/Source/Templates/gcc/startup_stm32l476xx.s
+++ b/Source/Templates/gcc/startup_stm32l476xx.s
@@ -18,10 +18,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -62,6 +62,9 @@
Reset_Handler:
ldr sp, =_estack /* Set stack pointer */
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
@@ -90,8 +93,6 @@
cmp r2, r3
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32l485xx.s b/Source/Templates/gcc/startup_stm32l485xx.s
index e874748..c944d7c 100644
--- a/Source/Templates/gcc/startup_stm32l485xx.s
+++ b/Source/Templates/gcc/startup_stm32l485xx.s
@@ -18,10 +18,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -62,6 +62,9 @@
Reset_Handler:
ldr sp, =_estack /* Set stack pointer */
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
@@ -90,8 +93,6 @@
cmp r2, r3
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32l486xx.s b/Source/Templates/gcc/startup_stm32l486xx.s
index e387347..0e7f9b6 100644
--- a/Source/Templates/gcc/startup_stm32l486xx.s
+++ b/Source/Templates/gcc/startup_stm32l486xx.s
@@ -18,10 +18,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -62,6 +62,9 @@
Reset_Handler:
ldr sp, =_estack /* Set stack pointer */
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
@@ -90,8 +93,6 @@
cmp r2, r3
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32l496xx.s b/Source/Templates/gcc/startup_stm32l496xx.s
index 4078fe4..35bd0fb 100644
--- a/Source/Templates/gcc/startup_stm32l496xx.s
+++ b/Source/Templates/gcc/startup_stm32l496xx.s
@@ -18,10 +18,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -62,6 +62,9 @@
Reset_Handler:
ldr sp, =_estack /* Set stack pointer */
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
@@ -90,8 +93,6 @@
cmp r2, r3
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32l4a6xx.s b/Source/Templates/gcc/startup_stm32l4a6xx.s
index a19a897..7beb858 100644
--- a/Source/Templates/gcc/startup_stm32l4a6xx.s
+++ b/Source/Templates/gcc/startup_stm32l4a6xx.s
@@ -18,10 +18,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -62,6 +62,9 @@
Reset_Handler:
ldr sp, =_estack /* Set stack pointer */
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
@@ -90,8 +93,6 @@
cmp r2, r3
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32l4p5xx.s b/Source/Templates/gcc/startup_stm32l4p5xx.s
index 504e3a8..40f99ac 100644
--- a/Source/Templates/gcc/startup_stm32l4p5xx.s
+++ b/Source/Templates/gcc/startup_stm32l4p5xx.s
@@ -18,10 +18,10 @@
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -62,6 +62,9 @@
Reset_Handler:
ldr sp, =_estack /* Set stack pointer */
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
@@ -90,8 +93,6 @@
cmp r2, r3
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32l4q5xx.s b/Source/Templates/gcc/startup_stm32l4q5xx.s
index f423dc5..9c12dbe 100644
--- a/Source/Templates/gcc/startup_stm32l4q5xx.s
+++ b/Source/Templates/gcc/startup_stm32l4q5xx.s
@@ -18,10 +18,10 @@
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -62,6 +62,9 @@
Reset_Handler:
ldr sp, =_estack /* Set stack pointer */
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
@@ -90,8 +93,6 @@
cmp r2, r3
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32l4r5xx.s b/Source/Templates/gcc/startup_stm32l4r5xx.s
index f81d1fa..e0ad423 100644
--- a/Source/Templates/gcc/startup_stm32l4r5xx.s
+++ b/Source/Templates/gcc/startup_stm32l4r5xx.s
@@ -18,10 +18,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -62,6 +62,9 @@
Reset_Handler:
ldr sp, =_estack /* Set stack pointer */
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
@@ -90,8 +93,6 @@
cmp r2, r3
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32l4r7xx.s b/Source/Templates/gcc/startup_stm32l4r7xx.s
index 1ce8ac0..4fe3c35 100644
--- a/Source/Templates/gcc/startup_stm32l4r7xx.s
+++ b/Source/Templates/gcc/startup_stm32l4r7xx.s
@@ -18,10 +18,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -62,6 +62,9 @@
Reset_Handler:
ldr sp, =_estack /* Set stack pointer */
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
@@ -90,8 +93,6 @@
cmp r2, r3
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32l4r9xx.s b/Source/Templates/gcc/startup_stm32l4r9xx.s
index edb75e0..2057484 100644
--- a/Source/Templates/gcc/startup_stm32l4r9xx.s
+++ b/Source/Templates/gcc/startup_stm32l4r9xx.s
@@ -18,10 +18,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -62,6 +62,9 @@
Reset_Handler:
ldr sp, =_estack /* Set stack pointer */
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
@@ -90,8 +93,6 @@
cmp r2, r3
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32l4s5xx.s b/Source/Templates/gcc/startup_stm32l4s5xx.s
index ceab33d..7f33197 100644
--- a/Source/Templates/gcc/startup_stm32l4s5xx.s
+++ b/Source/Templates/gcc/startup_stm32l4s5xx.s
@@ -18,10 +18,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -62,6 +62,9 @@
Reset_Handler:
ldr sp, =_estack /* Set stack pointer */
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
@@ -90,8 +93,6 @@
cmp r2, r3
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32l4s7xx.s b/Source/Templates/gcc/startup_stm32l4s7xx.s
index 18b17b2..c46f131 100644
--- a/Source/Templates/gcc/startup_stm32l4s7xx.s
+++ b/Source/Templates/gcc/startup_stm32l4s7xx.s
@@ -18,10 +18,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -62,6 +62,9 @@
Reset_Handler:
ldr sp, =_estack /* Set stack pointer */
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
@@ -90,8 +93,6 @@
cmp r2, r3
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32l4s9xx.s b/Source/Templates/gcc/startup_stm32l4s9xx.s
index 1dda518..e463089 100644
--- a/Source/Templates/gcc/startup_stm32l4s9xx.s
+++ b/Source/Templates/gcc/startup_stm32l4s9xx.s
@@ -18,10 +18,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
@@ -62,6 +62,9 @@
Reset_Handler:
ldr sp, =_estack /* Set stack pointer */
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
@@ -90,8 +93,6 @@
cmp r2, r3
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
diff --git a/Source/Templates/iar/startup_stm32l412xx.s b/Source/Templates/iar/startup_stm32l412xx.s
index fd698bb..b7ecf24 100644
--- a/Source/Templates/iar/startup_stm32l412xx.s
+++ b/Source/Templates/iar/startup_stm32l412xx.s
@@ -16,10 +16,10 @@
;* <h2><center>© Copyright (c) 2018 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;
diff --git a/Source/Templates/iar/startup_stm32l422xx.s b/Source/Templates/iar/startup_stm32l422xx.s
index bf69d8c..d49346a 100644
--- a/Source/Templates/iar/startup_stm32l422xx.s
+++ b/Source/Templates/iar/startup_stm32l422xx.s
@@ -16,10 +16,10 @@
;* <h2><center>© Copyright (c) 2018 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;
diff --git a/Source/Templates/iar/startup_stm32l431xx.s b/Source/Templates/iar/startup_stm32l431xx.s
index dd29acf..18917b0 100644
--- a/Source/Templates/iar/startup_stm32l431xx.s
+++ b/Source/Templates/iar/startup_stm32l431xx.s
@@ -16,10 +16,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;
diff --git a/Source/Templates/iar/startup_stm32l432xx.s b/Source/Templates/iar/startup_stm32l432xx.s
index 381ffae..7382c3e 100644
--- a/Source/Templates/iar/startup_stm32l432xx.s
+++ b/Source/Templates/iar/startup_stm32l432xx.s
@@ -16,10 +16,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;
diff --git a/Source/Templates/iar/startup_stm32l433xx.s b/Source/Templates/iar/startup_stm32l433xx.s
index 65bac5a..1751b0a 100644
--- a/Source/Templates/iar/startup_stm32l433xx.s
+++ b/Source/Templates/iar/startup_stm32l433xx.s
@@ -16,10 +16,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;
diff --git a/Source/Templates/iar/startup_stm32l442xx.s b/Source/Templates/iar/startup_stm32l442xx.s
index 79b5ed8..ae6935b 100644
--- a/Source/Templates/iar/startup_stm32l442xx.s
+++ b/Source/Templates/iar/startup_stm32l442xx.s
@@ -16,10 +16,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;
diff --git a/Source/Templates/iar/startup_stm32l443xx.s b/Source/Templates/iar/startup_stm32l443xx.s
index e047f66..45e5f85 100644
--- a/Source/Templates/iar/startup_stm32l443xx.s
+++ b/Source/Templates/iar/startup_stm32l443xx.s
@@ -16,10 +16,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;
diff --git a/Source/Templates/iar/startup_stm32l451xx.s b/Source/Templates/iar/startup_stm32l451xx.s
index e5535b4..7bfc5e2 100644
--- a/Source/Templates/iar/startup_stm32l451xx.s
+++ b/Source/Templates/iar/startup_stm32l451xx.s
@@ -16,10 +16,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;
diff --git a/Source/Templates/iar/startup_stm32l452xx.s b/Source/Templates/iar/startup_stm32l452xx.s
index 24ca523..54bc778 100644
--- a/Source/Templates/iar/startup_stm32l452xx.s
+++ b/Source/Templates/iar/startup_stm32l452xx.s
@@ -16,10 +16,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;
diff --git a/Source/Templates/iar/startup_stm32l462xx.s b/Source/Templates/iar/startup_stm32l462xx.s
index 69e61fd..0b08635 100644
--- a/Source/Templates/iar/startup_stm32l462xx.s
+++ b/Source/Templates/iar/startup_stm32l462xx.s
@@ -16,10 +16,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;
diff --git a/Source/Templates/iar/startup_stm32l471xx.s b/Source/Templates/iar/startup_stm32l471xx.s
index d633ccf..7b88f12 100644
--- a/Source/Templates/iar/startup_stm32l471xx.s
+++ b/Source/Templates/iar/startup_stm32l471xx.s
@@ -16,10 +16,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;
diff --git a/Source/Templates/iar/startup_stm32l475xx.s b/Source/Templates/iar/startup_stm32l475xx.s
index d24ee5c..a6b9d45 100644
--- a/Source/Templates/iar/startup_stm32l475xx.s
+++ b/Source/Templates/iar/startup_stm32l475xx.s
@@ -16,10 +16,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;
diff --git a/Source/Templates/iar/startup_stm32l476xx.s b/Source/Templates/iar/startup_stm32l476xx.s
index b07e299..aeed9c4 100644
--- a/Source/Templates/iar/startup_stm32l476xx.s
+++ b/Source/Templates/iar/startup_stm32l476xx.s
@@ -16,10 +16,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;
diff --git a/Source/Templates/iar/startup_stm32l485xx.s b/Source/Templates/iar/startup_stm32l485xx.s
index 41c0e96..90c8331 100644
--- a/Source/Templates/iar/startup_stm32l485xx.s
+++ b/Source/Templates/iar/startup_stm32l485xx.s
@@ -16,10 +16,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;
diff --git a/Source/Templates/iar/startup_stm32l486xx.s b/Source/Templates/iar/startup_stm32l486xx.s
index c001610..61d4373 100644
--- a/Source/Templates/iar/startup_stm32l486xx.s
+++ b/Source/Templates/iar/startup_stm32l486xx.s
@@ -16,10 +16,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;
diff --git a/Source/Templates/iar/startup_stm32l496xx.s b/Source/Templates/iar/startup_stm32l496xx.s
index 76fd536..149cecc 100644
--- a/Source/Templates/iar/startup_stm32l496xx.s
+++ b/Source/Templates/iar/startup_stm32l496xx.s
@@ -16,10 +16,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;
diff --git a/Source/Templates/iar/startup_stm32l4a6xx.s b/Source/Templates/iar/startup_stm32l4a6xx.s
index 3657032..b1ff414 100644
--- a/Source/Templates/iar/startup_stm32l4a6xx.s
+++ b/Source/Templates/iar/startup_stm32l4a6xx.s
@@ -16,10 +16,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;
diff --git a/Source/Templates/iar/startup_stm32l4p5xx.s b/Source/Templates/iar/startup_stm32l4p5xx.s
index b660208..40ce86d 100644
--- a/Source/Templates/iar/startup_stm32l4p5xx.s
+++ b/Source/Templates/iar/startup_stm32l4p5xx.s
@@ -16,10 +16,10 @@
;* <h2><center>© Copyright (c) 2019 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;
diff --git a/Source/Templates/iar/startup_stm32l4q5xx.s b/Source/Templates/iar/startup_stm32l4q5xx.s
index 28d6ec9..de9156f 100644
--- a/Source/Templates/iar/startup_stm32l4q5xx.s
+++ b/Source/Templates/iar/startup_stm32l4q5xx.s
@@ -16,10 +16,10 @@
;* <h2><center>© Copyright (c) 2019 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;
diff --git a/Source/Templates/iar/startup_stm32l4r5xx.s b/Source/Templates/iar/startup_stm32l4r5xx.s
index f9c95d7..57ee3c2 100644
--- a/Source/Templates/iar/startup_stm32l4r5xx.s
+++ b/Source/Templates/iar/startup_stm32l4r5xx.s
@@ -16,10 +16,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;
diff --git a/Source/Templates/iar/startup_stm32l4r7xx.s b/Source/Templates/iar/startup_stm32l4r7xx.s
index 4ef5597..cd9fcde 100644
--- a/Source/Templates/iar/startup_stm32l4r7xx.s
+++ b/Source/Templates/iar/startup_stm32l4r7xx.s
@@ -16,10 +16,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;
diff --git a/Source/Templates/iar/startup_stm32l4r9xx.s b/Source/Templates/iar/startup_stm32l4r9xx.s
index fec34eb..ff39ab2 100644
--- a/Source/Templates/iar/startup_stm32l4r9xx.s
+++ b/Source/Templates/iar/startup_stm32l4r9xx.s
@@ -16,10 +16,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;
diff --git a/Source/Templates/iar/startup_stm32l4s5xx.s b/Source/Templates/iar/startup_stm32l4s5xx.s
index 6868d05..00d0967 100644
--- a/Source/Templates/iar/startup_stm32l4s5xx.s
+++ b/Source/Templates/iar/startup_stm32l4s5xx.s
@@ -16,10 +16,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;
diff --git a/Source/Templates/iar/startup_stm32l4s7xx.s b/Source/Templates/iar/startup_stm32l4s7xx.s
index 1379b1e..c8b05db 100644
--- a/Source/Templates/iar/startup_stm32l4s7xx.s
+++ b/Source/Templates/iar/startup_stm32l4s7xx.s
@@ -16,10 +16,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;
diff --git a/Source/Templates/iar/startup_stm32l4s9xx.s b/Source/Templates/iar/startup_stm32l4s9xx.s
index ccea02d..b9b05c1 100644
--- a/Source/Templates/iar/startup_stm32l4s9xx.s
+++ b/Source/Templates/iar/startup_stm32l4s9xx.s
@@ -16,10 +16,10 @@
;* <h2><center>© Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
-;* This software component is licensed by ST under BSD 3-Clause license,
+;* This software component is licensed by ST under Apache License, Version 2.0,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
-;* opensource.org/licenses/BSD-3-Clause
+;* opensource.org/licenses/Apache-2.0
;*
;*******************************************************************************
;
diff --git a/Source/Templates/system_stm32l4xx.c b/Source/Templates/system_stm32l4xx.c
index 26bd517..ab94a2c 100644
--- a/Source/Templates/system_stm32l4xx.c
+++ b/Source/Templates/system_stm32l4xx.c
@@ -69,10 +69,10 @@
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
- * This software component is licensed by ST under BSD 3-Clause license,
+ * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
+ * opensource.org/licenses/Apache-2.0
*
******************************************************************************
*/
