commit 0e38ce4b440e5dc0395e1abb624dde86df2491be
author Rania JMAI <rania.jmai@st.com> Mon Apr 01 11:45:00 2024 +0100
committer Rania JMAI <rania.jmai@st.com> Mon Apr 01 11:45:00 2024 +0100
tree 4475304a6b5cd6beed54578a3428d141d6668790
parent ede2b5879441c1b1b9cc6388a56919ac55139bb1

[HAL][SPI] Update HAL_SPI_TransmitReceive API to set the bit CRCNEXT in case of one byte transaction

Src/stm32f1xx_hal_spi.c

diff --git a/Src/stm32f1xx_hal_spi.c b/Src/stm32f1xx_hal_spi.c
index d984342..71b05a9 100644
--- a/Src/stm32f1xx_hal_spi.c
+++ b/Src/stm32f1xx_hal_spi.c
@@ -1263,6 +1263,15 @@
       hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
       hspi->pTxBuffPtr += sizeof(uint16_t);
       hspi->TxXferCount--;
+
+#if (USE_SPI_CRC != 0U)
+      /* Enable CRC Transmission */
+      if ((hspi->TxXferCount == 0U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
+      {
+        SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
+      }
+#endif /* USE_SPI_CRC */
+
     }
     while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U))
     {
@@ -1309,6 +1318,14 @@
       *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr);
       hspi->pTxBuffPtr += sizeof(uint8_t);
       hspi->TxXferCount--;
+
+#if (USE_SPI_CRC != 0U)
+      /* Enable CRC Transmission */
+      if ((hspi->TxXferCount == 0U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
+      {
+        SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
+      }
+#endif /* USE_SPI_CRC */
     }
     while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U))
     {