Release v1.1.5
diff --git a/Inc/stm32f1xx_hal.h b/Inc/stm32f1xx_hal.h
index ba2f673..35092c0 100644
--- a/Inc/stm32f1xx_hal.h
+++ b/Inc/stm32f1xx_hal.h
@@ -57,6 +57,7 @@
* @}
*/
/* Exported types ------------------------------------------------------------*/
+extern __IO uint32_t uwTick;
extern uint32_t uwTickPrio;
extern HAL_TickFreqTypeDef uwTickFreq;
diff --git a/Inc/stm32f1xx_hal_hcd.h b/Inc/stm32f1xx_hal_hcd.h
index 42f4c8b..87471ad 100644
--- a/Inc/stm32f1xx_hal_hcd.h
+++ b/Inc/stm32f1xx_hal_hcd.h
@@ -108,8 +108,8 @@
/** @defgroup HCD_Speed HCD Speed
* @{
*/
-#define HCD_SPEED_FULL USBH_FS_SPEED
-#define HCD_SPEED_LOW USBH_LS_SPEED
+#define HCD_SPEED_FULL USBH_FSLS_SPEED
+#define HCD_SPEED_LOW USBH_FSLS_SPEED
/**
* @}
@@ -142,9 +142,9 @@
/* Exported macro ------------------------------------------------------------*/
/** @defgroup HCD_Exported_Macros HCD Exported Macros
- * @brief macros to handle interrupts and specific clock configurations
- * @{
- */
+ * @brief macros to handle interrupts and specific clock configurations
+ * @{
+ */
#define __HAL_HCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
#define __HAL_HCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
@@ -169,19 +169,15 @@
/** @defgroup HCD_Exported_Functions_Group1 Initialization and de-initialization functions
* @{
*/
-HAL_StatusTypeDef HAL_HCD_Init(HCD_HandleTypeDef *hhcd);
-HAL_StatusTypeDef HAL_HCD_DeInit(HCD_HandleTypeDef *hhcd);
-HAL_StatusTypeDef HAL_HCD_HC_Init(HCD_HandleTypeDef *hhcd,
- uint8_t ch_num,
- uint8_t epnum,
- uint8_t dev_address,
- uint8_t speed,
- uint8_t ep_type,
- uint16_t mps);
+HAL_StatusTypeDef HAL_HCD_Init(HCD_HandleTypeDef *hhcd);
+HAL_StatusTypeDef HAL_HCD_DeInit(HCD_HandleTypeDef *hhcd);
+HAL_StatusTypeDef HAL_HCD_HC_Init(HCD_HandleTypeDef *hhcd, uint8_t ch_num,
+ uint8_t epnum, uint8_t dev_address,
+ uint8_t speed, uint8_t ep_type, uint16_t mps);
-HAL_StatusTypeDef HAL_HCD_HC_Halt(HCD_HandleTypeDef *hhcd, uint8_t ch_num);
-void HAL_HCD_MspInit(HCD_HandleTypeDef *hhcd);
-void HAL_HCD_MspDeInit(HCD_HandleTypeDef *hhcd);
+HAL_StatusTypeDef HAL_HCD_HC_Halt(HCD_HandleTypeDef *hhcd, uint8_t ch_num);
+void HAL_HCD_MspInit(HCD_HandleTypeDef *hhcd);
+void HAL_HCD_MspDeInit(HCD_HandleTypeDef *hhcd);
#if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
/** @defgroup HAL_HCD_Callback_ID_enumeration_definition HAL USB OTG HCD Callback ID enumeration definition
@@ -190,14 +186,14 @@
*/
typedef enum
{
- HAL_HCD_SOF_CB_ID = 0x01, /*!< USB HCD SOF callback ID */
- HAL_HCD_CONNECT_CB_ID = 0x02, /*!< USB HCD Connect callback ID */
- HAL_HCD_DISCONNECT_CB_ID = 0x03, /*!< USB HCD Disconnect callback ID */
- HAL_HCD_PORT_ENABLED_CB_ID = 0x04, /*!< USB HCD Port Enable callback ID */
- HAL_HCD_PORT_DISABLED_CB_ID = 0x05, /*!< USB HCD Port Disable callback ID */
+ HAL_HCD_SOF_CB_ID = 0x01, /*!< USB HCD SOF callback ID */
+ HAL_HCD_CONNECT_CB_ID = 0x02, /*!< USB HCD Connect callback ID */
+ HAL_HCD_DISCONNECT_CB_ID = 0x03, /*!< USB HCD Disconnect callback ID */
+ HAL_HCD_PORT_ENABLED_CB_ID = 0x04, /*!< USB HCD Port Enable callback ID */
+ HAL_HCD_PORT_DISABLED_CB_ID = 0x05, /*!< USB HCD Port Disable callback ID */
- HAL_HCD_MSPINIT_CB_ID = 0x06, /*!< USB HCD MspInit callback ID */
- HAL_HCD_MSPDEINIT_CB_ID = 0x07 /*!< USB HCD MspDeInit callback ID */
+ HAL_HCD_MSPINIT_CB_ID = 0x06, /*!< USB HCD MspInit callback ID */
+ HAL_HCD_MSPDEINIT_CB_ID = 0x07 /*!< USB HCD MspDeInit callback ID */
} HAL_HCD_CallbackIDTypeDef;
/**
@@ -217,10 +213,16 @@
* @}
*/
-HAL_StatusTypeDef HAL_HCD_RegisterCallback(HCD_HandleTypeDef *hhcd, HAL_HCD_CallbackIDTypeDef CallbackID, pHCD_CallbackTypeDef pCallback);
-HAL_StatusTypeDef HAL_HCD_UnRegisterCallback(HCD_HandleTypeDef *hhcd, HAL_HCD_CallbackIDTypeDef CallbackID);
+HAL_StatusTypeDef HAL_HCD_RegisterCallback(HCD_HandleTypeDef *hhcd,
+ HAL_HCD_CallbackIDTypeDef CallbackID,
+ pHCD_CallbackTypeDef pCallback);
-HAL_StatusTypeDef HAL_HCD_RegisterHC_NotifyURBChangeCallback(HCD_HandleTypeDef *hhcd, pHCD_HC_NotifyURBChangeCallbackTypeDef pCallback);
+HAL_StatusTypeDef HAL_HCD_UnRegisterCallback(HCD_HandleTypeDef *hhcd,
+ HAL_HCD_CallbackIDTypeDef CallbackID);
+
+HAL_StatusTypeDef HAL_HCD_RegisterHC_NotifyURBChangeCallback(HCD_HandleTypeDef *hhcd,
+ pHCD_HC_NotifyURBChangeCallbackTypeDef pCallback);
+
HAL_StatusTypeDef HAL_HCD_UnRegisterHC_NotifyURBChangeCallback(HCD_HandleTypeDef *hhcd);
#endif /* USE_HAL_HCD_REGISTER_CALLBACKS */
/**
@@ -231,25 +233,21 @@
/** @addtogroup HCD_Exported_Functions_Group2 Input and Output operation functions
* @{
*/
-HAL_StatusTypeDef HAL_HCD_HC_SubmitRequest(HCD_HandleTypeDef *hhcd,
- uint8_t ch_num,
- uint8_t direction,
- uint8_t ep_type,
- uint8_t token,
- uint8_t *pbuff,
- uint16_t length,
- uint8_t do_ping);
+HAL_StatusTypeDef HAL_HCD_HC_SubmitRequest(HCD_HandleTypeDef *hhcd, uint8_t ch_num,
+ uint8_t direction, uint8_t ep_type,
+ uint8_t token, uint8_t *pbuff,
+ uint16_t length, uint8_t do_ping);
/* Non-Blocking mode: Interrupt */
-void HAL_HCD_IRQHandler(HCD_HandleTypeDef *hhcd);
-void HAL_HCD_SOF_Callback(HCD_HandleTypeDef *hhcd);
-void HAL_HCD_Connect_Callback(HCD_HandleTypeDef *hhcd);
-void HAL_HCD_Disconnect_Callback(HCD_HandleTypeDef *hhcd);
-void HAL_HCD_PortEnabled_Callback(HCD_HandleTypeDef *hhcd);
-void HAL_HCD_PortDisabled_Callback(HCD_HandleTypeDef *hhcd);
-void HAL_HCD_HC_NotifyURBChange_Callback(HCD_HandleTypeDef *hhcd,
- uint8_t chnum,
- HCD_URBStateTypeDef urb_state);
+void HAL_HCD_IRQHandler(HCD_HandleTypeDef *hhcd);
+void HAL_HCD_WKUP_IRQHandler(HCD_HandleTypeDef *hhcd);
+void HAL_HCD_SOF_Callback(HCD_HandleTypeDef *hhcd);
+void HAL_HCD_Connect_Callback(HCD_HandleTypeDef *hhcd);
+void HAL_HCD_Disconnect_Callback(HCD_HandleTypeDef *hhcd);
+void HAL_HCD_PortEnabled_Callback(HCD_HandleTypeDef *hhcd);
+void HAL_HCD_PortDisabled_Callback(HCD_HandleTypeDef *hhcd);
+void HAL_HCD_HC_NotifyURBChange_Callback(HCD_HandleTypeDef *hhcd, uint8_t chnum,
+ HCD_URBStateTypeDef urb_state);
/**
* @}
*/
@@ -258,9 +256,12 @@
/** @addtogroup HCD_Exported_Functions_Group3 Peripheral Control functions
* @{
*/
-HAL_StatusTypeDef HAL_HCD_ResetPort(HCD_HandleTypeDef *hhcd);
-HAL_StatusTypeDef HAL_HCD_Start(HCD_HandleTypeDef *hhcd);
-HAL_StatusTypeDef HAL_HCD_Stop(HCD_HandleTypeDef *hhcd);
+HAL_StatusTypeDef HAL_HCD_ResetPort(HCD_HandleTypeDef *hhcd);
+HAL_StatusTypeDef HAL_HCD_Start(HCD_HandleTypeDef *hhcd);
+HAL_StatusTypeDef HAL_HCD_Stop(HCD_HandleTypeDef *hhcd);
+/**
+ * @}
+ */
/**
* @}
*/
@@ -271,10 +272,11 @@
*/
HCD_StateTypeDef HAL_HCD_GetState(HCD_HandleTypeDef *hhcd);
HCD_URBStateTypeDef HAL_HCD_HC_GetURBState(HCD_HandleTypeDef *hhcd, uint8_t chnum);
-uint32_t HAL_HCD_HC_GetXferCount(HCD_HandleTypeDef *hhcd, uint8_t chnum);
HCD_HCStateTypeDef HAL_HCD_HC_GetState(HCD_HandleTypeDef *hhcd, uint8_t chnum);
+uint32_t HAL_HCD_HC_GetXferCount(HCD_HandleTypeDef *hhcd, uint8_t chnum);
uint32_t HAL_HCD_GetCurrentFrame(HCD_HandleTypeDef *hhcd);
uint32_t HAL_HCD_GetCurrentSpeed(HCD_HandleTypeDef *hhcd);
+
/**
* @}
*/
@@ -285,13 +287,11 @@
/* Private macros ------------------------------------------------------------*/
/** @defgroup HCD_Private_Macros HCD Private Macros
- * @{
- */
-
+ * @{
+ */
/**
* @}
*/
-
/* Private functions prototypes ----------------------------------------------*/
/** @defgroup HCD_Private_Functions_Prototypes HCD Private Functions Prototypes
* @{
@@ -309,14 +309,6 @@
/**
* @}
*/
-
-/**
- * @}
- */
-
-/**
- * @}
- */
#endif /* defined (USB_OTG_FS) */
#ifdef __cplusplus
diff --git a/Inc/stm32f1xx_hal_i2c.h b/Inc/stm32f1xx_hal_i2c.h
index cdcf2da..216a2fc 100644
--- a/Inc/stm32f1xx_hal_i2c.h
+++ b/Inc/stm32f1xx_hal_i2c.h
@@ -170,6 +170,7 @@
#define HAL_I2C_ERROR_TIMEOUT 0x00000020U /*!< Timeout Error */
#define HAL_I2C_ERROR_SIZE 0x00000040U /*!< Size Management error */
#define HAL_I2C_ERROR_DMA_PARAM 0x00000080U /*!< DMA Parameter Error */
+#define HAL_I2C_WRONG_START 0x00000200U /*!< Wrong start Error */
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
#define HAL_I2C_ERROR_INVALID_CALLBACK 0x00000100U /*!< Invalid Callback error */
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
@@ -181,7 +182,11 @@
* @brief I2C handle Structure definition
* @{
*/
+#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
typedef struct __I2C_HandleTypeDef
+#else
+typedef struct
+#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
{
I2C_TypeDef *Instance; /*!< I2C registers base address */
diff --git a/Inc/stm32f1xx_hal_pcd.h b/Inc/stm32f1xx_hal_pcd.h
index 7eeff8b..4998233 100644
--- a/Inc/stm32f1xx_hal_pcd.h
+++ b/Inc/stm32f1xx_hal_pcd.h
@@ -104,22 +104,22 @@
typedef struct
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
- PCD_TypeDef *Instance; /*!< Register base address */
- PCD_InitTypeDef Init; /*!< PCD required parameters */
- __IO uint8_t USB_Address; /*!< USB Address */
+ PCD_TypeDef *Instance; /*!< Register base address */
+ PCD_InitTypeDef Init; /*!< PCD required parameters */
+ __IO uint8_t USB_Address; /*!< USB Address */
#if defined (USB_OTG_FS)
- PCD_EPTypeDef IN_ep[16]; /*!< IN endpoint parameters */
- PCD_EPTypeDef OUT_ep[16]; /*!< OUT endpoint parameters */
+ PCD_EPTypeDef IN_ep[16]; /*!< IN endpoint parameters */
+ PCD_EPTypeDef OUT_ep[16]; /*!< OUT endpoint parameters */
#endif /* defined (USB_OTG_FS) */
#if defined (USB)
PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */
PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */
#endif /* defined (USB) */
- HAL_LockTypeDef Lock; /*!< PCD peripheral status */
- __IO PCD_StateTypeDef State; /*!< PCD communication state */
- __IO uint32_t ErrorCode; /*!< PCD Error code */
- uint32_t Setup[12]; /*!< Setup packet buffer */
- PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */
+ HAL_LockTypeDef Lock; /*!< PCD peripheral status */
+ __IO PCD_StateTypeDef State; /*!< PCD communication state */
+ __IO uint32_t ErrorCode; /*!< PCD Error code */
+ uint32_t Setup[12]; /*!< Setup packet buffer */
+ PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */
uint32_t BESL;
void *pData; /*!< Pointer to upper stack Handler */
@@ -191,9 +191,9 @@
/* Exported macros -----------------------------------------------------------*/
/** @defgroup PCD_Exported_Macros PCD Exported Macros
- * @brief macros to handle interrupts and specific clock configurations
- * @{
- */
+ * @brief macros to handle interrupts and specific clock configurations
+ * @{
+ */
#if defined (USB_OTG_FS)
#define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
#define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
@@ -203,12 +203,11 @@
#define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U)
-#define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= \
- ~(USB_OTG_PCGCCTL_STOPCLK)
+#define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= ~(USB_OTG_PCGCCTL_STOPCLK)
-#define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK
+#define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK
-#define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE)) & 0x10U)
+#define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE)) & 0x10U)
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_OTG_FS_WAKEUP_EXTI_LINE
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE)
@@ -216,28 +215,28 @@
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_OTG_FS_WAKEUP_EXTI_LINE
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
- do { \
- EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \
- EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE; \
- } while(0U)
+ do { \
+ EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \
+ EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE; \
+ } while(0U)
#endif /* defined (USB_OTG_FS) */
#if defined (USB)
#define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
#define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
-#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__))
+#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= (uint16_t)(~(__INTERRUPT__)))
#define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_WAKEUP_EXTI_LINE
#define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
#define __HAL_USB_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_WAKEUP_EXTI_LINE)
#define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_WAKEUP_EXTI_LINE
-#define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
- do { \
- EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \
- EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \
- } while(0U)
+#define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
+ do { \
+ EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \
+ EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \
+ } while(0U)
#endif /* defined (USB) */
@@ -272,7 +271,7 @@
HAL_PCD_SUSPEND_CB_ID = 0x04, /*!< USB PCD Suspend callback ID */
HAL_PCD_RESUME_CB_ID = 0x05, /*!< USB PCD Resume callback ID */
HAL_PCD_CONNECT_CB_ID = 0x06, /*!< USB PCD Connect callback ID */
- HAL_PCD_DISCONNECT_CB_ID = 0x07, /*!< USB PCD Disconnect callback ID */
+ HAL_PCD_DISCONNECT_CB_ID = 0x07, /*!< USB PCD Disconnect callback ID */
HAL_PCD_MSPINIT_CB_ID = 0x08, /*!< USB PCD MspInit callback ID */
HAL_PCD_MSPDEINIT_CB_ID = 0x09 /*!< USB PCD MspDeInit callback ID */
@@ -297,19 +296,31 @@
* @}
*/
-HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID, pPCD_CallbackTypeDef pCallback);
-HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID);
+HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd,
+ HAL_PCD_CallbackIDTypeDef CallbackID,
+ pPCD_CallbackTypeDef pCallback);
-HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataOutStageCallbackTypeDef pCallback);
+HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd,
+ HAL_PCD_CallbackIDTypeDef CallbackID);
+
+HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd,
+ pPCD_DataOutStageCallbackTypeDef pCallback);
+
HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd);
-HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataInStageCallbackTypeDef pCallback);
+HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd,
+ pPCD_DataInStageCallbackTypeDef pCallback);
+
HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd);
-HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoOutIncpltCallbackTypeDef pCallback);
+HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd,
+ pPCD_IsoOutIncpltCallbackTypeDef pCallback);
+
HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd);
-HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoInIncpltCallbackTypeDef pCallback);
+HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd,
+ pPCD_IsoInIncpltCallbackTypeDef pCallback);
+
HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
@@ -325,6 +336,7 @@
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
+void HAL_PCD_WKUP_IRQHandler(PCD_HandleTypeDef *hpcd);
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
@@ -349,16 +361,24 @@
HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
-HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
+HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
+ uint16_t ep_mps, uint8_t ep_type);
+
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
-HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
-HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
-uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
+HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
+ uint8_t *pBuf, uint32_t len);
+
+HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
+ uint8_t *pBuf, uint32_t len);
+
+
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
+
+uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
/**
* @}
*/
@@ -384,15 +404,11 @@
* @{
*/
#if defined (USB_OTG_FS)
-#define USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE 0x08U
-#define USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE 0x0CU
-#define USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE 0x10U
-
#define USB_OTG_FS_WAKEUP_EXTI_LINE (0x1U << 18) /*!< USB FS EXTI Line WakeUp Interrupt */
#endif /* defined (USB_OTG_FS) */
#if defined (USB)
-#define USB_WAKEUP_EXTI_LINE (0x1U << 18) /*!< USB FS EXTI Line WakeUp Interrupt */
+#define USB_WAKEUP_EXTI_LINE (0x1U << 18) /*!< USB FS EXTI Line WakeUp Interrupt */
#endif /* defined (USB) */
/**
@@ -402,10 +418,10 @@
/** @defgroup PCD_EP0_MPS PCD EP0 MPS
* @{
*/
-#define PCD_EP0MPS_64 DEP0CTL_MPS_64
-#define PCD_EP0MPS_32 DEP0CTL_MPS_32
-#define PCD_EP0MPS_16 DEP0CTL_MPS_16
-#define PCD_EP0MPS_08 DEP0CTL_MPS_8
+#define PCD_EP0MPS_64 EP_MPS_64
+#define PCD_EP0MPS_32 EP_MPS_32
+#define PCD_EP0MPS_16 EP_MPS_16
+#define PCD_EP0MPS_08 EP_MPS_8
/**
* @}
*/
@@ -466,8 +482,8 @@
/* Private macros ------------------------------------------------------------*/
/** @defgroup PCD_Private_Macros PCD Private Macros
- * @{
- */
+ * @{
+ */
#if defined (USB)
/******************** Bit definition for USB_COUNTn_RX register *************/
#define USB_CNTRX_NBLK_MSK (0x1FU << 10)
@@ -477,10 +493,10 @@
#define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue))
/* GetENDPOINT */
-#define PCD_GET_ENDPOINT(USBx, bEpNum) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)))
+#define PCD_GET_ENDPOINT(USBx, bEpNum) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)))
/* ENDPOINT transfer */
-#define USB_EP0StartXfer USB_EPStartXfer
+#define USB_EP0StartXfer USB_EPStartXfer
/**
* @brief sets the type in the endpoint register(bits EP_TYPE[1:0])
@@ -489,8 +505,7 @@
* @param wType Endpoint Type.
* @retval None
*/
-#define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
- ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX)))
+#define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX)))
/**
* @brief gets the type in the endpoint register(bits EP_TYPE[1:0])
@@ -507,18 +522,19 @@
* @param bEpNum, bDir
* @retval None
*/
-#define PCD_FreeUserBuffer(USBx, bEpNum, bDir) do { \
- if ((bDir) == 0U) \
- { \
- /* OUT double buffered endpoint */ \
- PCD_TX_DTOG((USBx), (bEpNum)); \
- } \
- else if ((bDir) == 1U) \
- { \
- /* IN double buffered endpoint */ \
- PCD_RX_DTOG((USBx), (bEpNum)); \
- } \
-} while(0)
+#define PCD_FreeUserBuffer(USBx, bEpNum, bDir) \
+ do { \
+ if ((bDir) == 0U) \
+ { \
+ /* OUT double buffered endpoint */ \
+ PCD_TX_DTOG((USBx), (bEpNum)); \
+ } \
+ else if ((bDir) == 1U) \
+ { \
+ /* IN double buffered endpoint */ \
+ PCD_RX_DTOG((USBx), (bEpNum)); \
+ } \
+ } while(0)
/**
* @brief sets the status for tx transfer (bits STAT_TX[1:0]).
@@ -527,21 +543,22 @@
* @param wState new state
* @retval None
*/
-#define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) do { \
- register uint16_t _wRegVal; \
- \
+#define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) \
+ do { \
+ uint16_t _wRegVal; \
+ \
_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \
- /* toggle first bit ? */ \
- if ((USB_EPTX_DTOG1 & (wState))!= 0U) \
- { \
+ /* toggle first bit ? */ \
+ if ((USB_EPTX_DTOG1 & (wState))!= 0U) \
+ { \
_wRegVal ^= USB_EPTX_DTOG1; \
- } \
- /* toggle second bit ? */ \
- if ((USB_EPTX_DTOG2 & (wState))!= 0U) \
- { \
+ } \
+ /* toggle second bit ? */ \
+ if ((USB_EPTX_DTOG2 & (wState))!= 0U) \
+ { \
_wRegVal ^= USB_EPTX_DTOG2; \
- } \
- PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
+ } \
+ PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
} while(0) /* PCD_SET_EP_TX_STATUS */
/**
@@ -551,19 +568,20 @@
* @param wState new state
* @retval None
*/
-#define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) do { \
- register uint16_t _wRegVal; \
+#define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) \
+ do { \
+ uint16_t _wRegVal; \
\
_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \
/* toggle first bit ? */ \
if ((USB_EPRX_DTOG1 & (wState))!= 0U) \
{ \
- _wRegVal ^= USB_EPRX_DTOG1; \
+ _wRegVal ^= USB_EPRX_DTOG1; \
} \
/* toggle second bit ? */ \
if ((USB_EPRX_DTOG2 & (wState))!= 0U) \
{ \
- _wRegVal ^= USB_EPRX_DTOG2; \
+ _wRegVal ^= USB_EPRX_DTOG2; \
} \
PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
} while(0) /* PCD_SET_EP_RX_STATUS */
@@ -576,8 +594,9 @@
* @param wStatetx new state.
* @retval None
*/
-#define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) do { \
- register uint16_t _wRegVal; \
+#define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) \
+ do { \
+ uint16_t _wRegVal; \
\
_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \
/* toggle first bit ? */ \
@@ -629,10 +648,8 @@
* @param bEpNum Endpoint Number.
* @retval TRUE = endpoint in stall condition.
*/
-#define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \
- == USB_EP_TX_STALL)
-#define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \
- == USB_EP_RX_STALL)
+#define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) == USB_EP_TX_STALL)
+#define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) == USB_EP_RX_STALL)
/**
* @brief set & clear EP_KIND bit.
@@ -640,16 +657,18 @@
* @param bEpNum Endpoint Number.
* @retval None
*/
-#define PCD_SET_EP_KIND(USBx, bEpNum) do { \
- register uint16_t _wRegVal; \
+#define PCD_SET_EP_KIND(USBx, bEpNum) \
+ do { \
+ uint16_t _wRegVal; \
\
_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
\
PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \
} while(0) /* PCD_SET_EP_KIND */
-#define PCD_CLEAR_EP_KIND(USBx, bEpNum) do { \
- register uint16_t _wRegVal; \
+#define PCD_CLEAR_EP_KIND(USBx, bEpNum) \
+ do { \
+ uint16_t _wRegVal; \
\
_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \
\
@@ -680,16 +699,18 @@
* @param bEpNum Endpoint Number.
* @retval None
*/
-#define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) do { \
- register uint16_t _wRegVal; \
+#define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) \
+ do { \
+ uint16_t _wRegVal; \
\
_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \
\
PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \
} while(0) /* PCD_CLEAR_RX_EP_CTR */
-#define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) do { \
- register uint16_t _wRegVal; \
+#define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) \
+ do { \
+ uint16_t _wRegVal; \
\
_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \
\
@@ -702,16 +723,18 @@
* @param bEpNum Endpoint Number.
* @retval None
*/
-#define PCD_RX_DTOG(USBx, bEpNum) do { \
- register uint16_t _wEPVal; \
+#define PCD_RX_DTOG(USBx, bEpNum) \
+ do { \
+ uint16_t _wEPVal; \
\
_wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
\
PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \
} while(0) /* PCD_RX_DTOG */
-#define PCD_TX_DTOG(USBx, bEpNum) do { \
- register uint16_t _wEPVal; \
+#define PCD_TX_DTOG(USBx, bEpNum) \
+ do { \
+ uint16_t _wEPVal; \
\
_wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
\
@@ -723,8 +746,9 @@
* @param bEpNum Endpoint Number.
* @retval None
*/
-#define PCD_CLEAR_RX_DTOG(USBx, bEpNum) do { \
- register uint16_t _wRegVal; \
+#define PCD_CLEAR_RX_DTOG(USBx, bEpNum) \
+ do { \
+ uint16_t _wRegVal; \
\
_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
\
@@ -734,8 +758,9 @@
} \
} while(0) /* PCD_CLEAR_RX_DTOG */
-#define PCD_CLEAR_TX_DTOG(USBx, bEpNum) do { \
- register uint16_t _wRegVal; \
+#define PCD_CLEAR_TX_DTOG(USBx, bEpNum) \
+ do { \
+ uint16_t _wRegVal; \
\
_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
\
@@ -752,8 +777,9 @@
* @param bAddr Address.
* @retval None
*/
-#define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) do { \
- register uint16_t _wRegVal; \
+#define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) \
+ do { \
+ uint16_t _wRegVal; \
\
_wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \
\
@@ -778,23 +804,25 @@
* @param wAddr address to be set (must be word aligned).
* @retval None
*/
-#define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) do { \
- register __IO uint16_t *_wRegVal; \
- register uint32_t _wRegBase = (uint32_t)USBx; \
- \
- _wRegBase += (uint32_t)(USBx)->BTABLE; \
- _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \
- *_wRegVal = ((wAddr) >> 1) << 1; \
-} while(0) /* PCD_SET_EP_TX_ADDRESS */
+#define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) \
+ do { \
+ __IO uint16_t *_wRegVal; \
+ uint32_t _wRegBase = (uint32_t)USBx; \
+ \
+ _wRegBase += (uint32_t)(USBx)->BTABLE; \
+ _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \
+ *_wRegVal = ((wAddr) >> 1) << 1; \
+ } while(0) /* PCD_SET_EP_TX_ADDRESS */
-#define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) do { \
- register __IO uint16_t *_wRegVal; \
- register uint32_t _wRegBase = (uint32_t)USBx; \
- \
- _wRegBase += (uint32_t)(USBx)->BTABLE; \
- _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \
- *_wRegVal = ((wAddr) >> 1) << 1; \
-} while(0) /* PCD_SET_EP_RX_ADDRESS */
+#define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) \
+ do { \
+ __IO uint16_t *_wRegVal; \
+ uint32_t _wRegBase = (uint32_t)USBx; \
+ \
+ _wRegBase += (uint32_t)(USBx)->BTABLE; \
+ _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \
+ *_wRegVal = ((wAddr) >> 1) << 1; \
+ } while(0) /* PCD_SET_EP_RX_ADDRESS */
/**
* @brief Gets address of the tx/rx buffer.
@@ -812,7 +840,8 @@
* @param wNBlocks no. of Blocks.
* @retval None
*/
-#define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) do { \
+#define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) \
+ do { \
(wNBlocks) = (wCount) >> 5; \
if (((wCount) & 0x1fU) == 0U) \
{ \
@@ -821,7 +850,8 @@
*(pdwReg) = (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \
} while(0) /* PCD_CALC_BLK32 */
-#define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) do { \
+#define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) \
+ do { \
(wNBlocks) = (wCount) >> 1; \
if (((wCount) & 0x1U) != 0U) \
{ \
@@ -830,7 +860,8 @@
*(pdwReg) = (uint16_t)((wNBlocks) << 10); \
} while(0) /* PCD_CALC_BLK2 */
-#define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) do { \
+#define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) \
+ do { \
uint32_t wNBlocks; \
if ((wCount) == 0U) \
{ \
@@ -847,10 +878,11 @@
} \
} while(0) /* PCD_SET_EP_CNT_RX_REG */
-#define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) do { \
- register uint32_t _wRegBase = (uint32_t)(USBx); \
- register __IO uint16_t *pdwReg; \
- \
+#define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) \
+ do { \
+ uint32_t _wRegBase = (uint32_t)(USBx); \
+ __IO uint16_t *pdwReg; \
+ \
_wRegBase += (uint32_t)(USBx)->BTABLE; \
pdwReg = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \
@@ -863,23 +895,25 @@
* @param wCount Counter value.
* @retval None
*/
-#define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) do { \
- register uint32_t _wRegBase = (uint32_t)(USBx); \
- register __IO uint16_t *_wRegVal; \
+#define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) \
+ do { \
+ uint32_t _wRegBase = (uint32_t)(USBx); \
+ __IO uint16_t *_wRegVal; \
\
_wRegBase += (uint32_t)(USBx)->BTABLE; \
_wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
*_wRegVal = (uint16_t)(wCount); \
-} while(0)
+ } while(0)
-#define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) do { \
- register uint32_t _wRegBase = (uint32_t)(USBx); \
- register __IO uint16_t *_wRegVal; \
+#define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) \
+ do { \
+ uint32_t _wRegBase = (uint32_t)(USBx); \
+ __IO uint16_t *_wRegVal; \
\
_wRegBase += (uint32_t)(USBx)->BTABLE; \
_wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \
-} while(0)
+ } while(0)
/**
* @brief gets counter of the tx buffer.
@@ -897,10 +931,13 @@
* @param wBuf0Addr buffer 0 address.
* @retval Counter value
*/
-#define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) do { \
+#define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) \
+ do { \
PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \
} while(0) /* PCD_SET_EP_DBUF0_ADDR */
-#define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) do { \
+
+#define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) \
+ do { \
PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \
} while(0) /* PCD_SET_EP_DBUF1_ADDR */
@@ -912,7 +949,8 @@
* @param wBuf1Addr = buffer 1 address.
* @retval None
*/
-#define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) do { \
+#define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) \
+ do { \
PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \
PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \
} while(0) /* PCD_SET_EP_DBUF_ADDR */
@@ -935,7 +973,8 @@
* @param wCount: Counter value
* @retval None
*/
-#define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) do { \
+#define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) \
+ do { \
if ((bDir) == 0U) \
/* OUT endpoint */ \
{ \
@@ -951,8 +990,9 @@
} \
} while(0) /* SetEPDblBuf0Count*/
-#define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) do { \
- register uint32_t _wBase = (uint32_t)(USBx); \
+#define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) \
+ do { \
+ uint32_t _wBase = (uint32_t)(USBx); \
__IO uint16_t *_wEPRegVal; \
\
if ((bDir) == 0U) \
@@ -972,10 +1012,11 @@
} \
} while(0) /* SetEPDblBuf1Count */
-#define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) do { \
+#define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) \
+ do { \
PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
- } while(0) /* PCD_SET_EP_DBUF_CNT */
+ } while(0) /* PCD_SET_EP_DBUF_CNT */
/**
* @brief Gets buffer 0/1 rx/tx counter for double buffering.
diff --git a/Inc/stm32f1xx_hal_pcd_ex.h b/Inc/stm32f1xx_hal_pcd_ex.h
index afb5646..4582702 100644
--- a/Inc/stm32f1xx_hal_pcd_ex.h
+++ b/Inc/stm32f1xx_hal_pcd_ex.h
@@ -53,10 +53,8 @@
#endif /* defined (USB_OTG_FS) */
#if defined (USB)
-HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd,
- uint16_t ep_addr,
- uint16_t ep_kind,
- uint32_t pmaadress);
+HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr,
+ uint16_t ep_kind, uint32_t pmaadress);
void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state);
#endif /* defined (USB) */
diff --git a/Inc/stm32f1xx_ll_i2c.h b/Inc/stm32f1xx_ll_i2c.h
index 7916f5f..d29b6b4 100644
--- a/Inc/stm32f1xx_ll_i2c.h
+++ b/Inc/stm32f1xx_ll_i2c.h
@@ -729,8 +729,8 @@
__STATIC_INLINE void LL_I2C_ConfigSpeed(I2C_TypeDef *I2Cx, uint32_t PeriphClock, uint32_t ClockSpeed,
uint32_t DutyCycle)
{
- register uint32_t freqrange = 0x0U;
- register uint32_t clockconfig = 0x0U;
+ uint32_t freqrange = 0x0U;
+ uint32_t clockconfig = 0x0U;
/* Compute frequency range */
freqrange = __LL_I2C_FREQ_HZ_TO_MHZ(PeriphClock);
diff --git a/Inc/stm32f1xx_ll_usb.h b/Inc/stm32f1xx_ll_usb.h
index 7ff6a5c..135d8f7 100644
--- a/Inc/stm32f1xx_ll_usb.h
+++ b/Inc/stm32f1xx_ll_usb.h
@@ -81,7 +81,7 @@
} USB_OTG_HCStateTypeDef;
/**
- * @brief USB OTG Initialization Structure definition
+ * @brief USB Instance Initialization Structure definition
*/
typedef struct
{
@@ -94,14 +94,14 @@
This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
uint32_t speed; /*!< USB Core speed.
- This parameter can be any value of @ref USB_Core_Speed_ */
+ This parameter can be any value of @ref USB_Core_Speed */
uint32_t dma_enable; /*!< Enable or disable of the USB embedded DMA used only for OTG HS. */
uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size. */
uint32_t phy_itface; /*!< Select the used PHY interface.
- This parameter can be any value of @ref USB_Core_PHY_ */
+ This parameter can be any value of @ref USB_Core_PHY */
uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */
@@ -116,6 +116,7 @@
uint32_t use_dedicated_ep1; /*!< Enable or disable the use of the dedicated EP1 interrupt. */
uint32_t use_external_vbus; /*!< Enable or disable the use of the external VBUS. */
+
} USB_OTG_CfgTypeDef;
typedef struct
@@ -155,7 +156,7 @@
typedef struct
{
- uint8_t dev_addr ; /*!< USB device address.
+ uint8_t dev_addr; /*!< USB device address.
This parameter must be a number between Min_Data = 1 and Max_Data = 255 */
uint8_t ch_num; /*!< Host channel number.
@@ -197,13 +198,13 @@
uint32_t dma_addr; /*!< 32 bits aligned transfer buffer address. */
- uint32_t ErrCnt; /*!< Host channel error count.*/
+ uint32_t ErrCnt; /*!< Host channel error count. */
- USB_OTG_URBStateTypeDef urb_state; /*!< URB state.
+ USB_OTG_URBStateTypeDef urb_state; /*!< URB state.
This parameter can be any value of @ref USB_OTG_URBStateTypeDef */
- USB_OTG_HCStateTypeDef state; /*!< Host Channel state.
- This parameter can be any value of @ref USB_OTG_HCStateTypeDef */
+ USB_OTG_HCStateTypeDef state; /*!< Host Channel state.
+ This parameter can be any value of @ref USB_OTG_HCStateTypeDef */
} USB_OTG_HCTypeDef;
#endif /* defined (USB_OTG_FS) */
@@ -282,6 +283,10 @@
uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */
+ uint32_t xfer_len_db; /*!< double buffer transfer length used with bulk double buffer in */
+
+ uint8_t xfer_fill_db; /*!< double buffer Need to Fill new buffer used with bulk_in */
+
} USB_EPTypeDef;
#endif /* defined (USB) */
@@ -314,8 +319,8 @@
/** @defgroup USB_LL Device Speed
* @{
*/
-#define USBD_FS_SPEED 2U
-#define USBH_FS_SPEED 1U
+#define USBD_FS_SPEED 2U
+#define USBH_FSLS_SPEED 1U
/**
* @}
*/
@@ -341,8 +346,8 @@
* @{
*/
#ifndef USBD_FS_TRDT_VALUE
-#define USBD_FS_TRDT_VALUE 5U
-#define USBD_DEFAULT_TRDT_VALUE 9U
+#define USBD_FS_TRDT_VALUE 5U
+#define USBD_DEFAULT_TRDT_VALUE 9U
#endif /* USBD_HS_TRDT_VALUE */
/**
* @}
@@ -351,8 +356,8 @@
/** @defgroup USB_LL_Core_MPS USB Low Layer Core MPS
* @{
*/
-#define USB_OTG_FS_MAX_PACKET_SIZE 64U
-#define USB_OTG_MAX_EP0_SIZE 64U
+#define USB_OTG_FS_MAX_PACKET_SIZE 64U
+#define USB_OTG_MAX_EP0_SIZE 64U
/**
* @}
*/
@@ -381,10 +386,10 @@
/** @defgroup USB_LL_EP0_MPS USB Low Layer EP0 MPS
* @{
*/
-#define DEP0CTL_MPS_64 0U
-#define DEP0CTL_MPS_32 1U
-#define DEP0CTL_MPS_16 2U
-#define DEP0CTL_MPS_8 3U
+#define EP_MPS_64 0U
+#define EP_MPS_32 1U
+#define EP_MPS_16 2U
+#define EP_MPS_8 3U
/**
* @}
*/
@@ -474,10 +479,10 @@
/** @defgroup USB_LL_EP0_MPS USB Low Layer EP0 MPS
* @{
*/
-#define DEP0CTL_MPS_64 0U
-#define DEP0CTL_MPS_32 1U
-#define DEP0CTL_MPS_16 2U
-#define DEP0CTL_MPS_8 3U
+#define EP_MPS_64 0U
+#define EP_MPS_32 1U
+#define EP_MPS_16 2U
+#define EP_MPS_8 3U
/**
* @}
*/
@@ -550,7 +555,9 @@
HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
-HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len);
+HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src,
+ uint8_t ch_ep_num, uint16_t len);
+
void *USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len);
HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
@@ -575,14 +582,12 @@
HAL_StatusTypeDef USB_DriveVbus(USB_OTG_GlobalTypeDef *USBx, uint8_t state);
uint32_t USB_GetHostSpeed(USB_OTG_GlobalTypeDef *USBx);
uint32_t USB_GetCurrentFrame(USB_OTG_GlobalTypeDef *USBx);
-HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx,
- uint8_t ch_num,
- uint8_t epnum,
- uint8_t dev_address,
- uint8_t speed,
- uint8_t ep_type,
- uint16_t mps);
-HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDef *hc);
+HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx, uint8_t ch_num,
+ uint8_t epnum, uint8_t dev_address, uint8_t speed,
+ uint8_t ep_type, uint16_t mps);
+HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx,
+ USB_OTG_HCTypeDef *hc);
+
uint32_t USB_HC_ReadInterrupt(USB_OTG_GlobalTypeDef *USBx);
HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx, uint8_t hc_num);
HAL_StatusTypeDef USB_DoPing(USB_OTG_GlobalTypeDef *USBx, uint8_t ch_num);
@@ -597,14 +602,11 @@
HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx);
HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx);
HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode);
-HAL_StatusTypeDef USB_SetDevSpeed(USB_TypeDef *USBx, uint8_t speed);
HAL_StatusTypeDef USB_FlushRxFifo(USB_TypeDef *USBx);
HAL_StatusTypeDef USB_FlushTxFifo(USB_TypeDef *USBx, uint32_t num);
HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep);
HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep);
HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep);
-HAL_StatusTypeDef USB_WritePacket(USB_TypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len);
-void *USB_ReadPacket(USB_TypeDef *USBx, uint8_t *dest, uint16_t len);
HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep);
HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep);
HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address);
@@ -618,11 +620,14 @@
uint32_t USB_ReadDevAllInEpInterrupt(USB_TypeDef *USBx);
uint32_t USB_ReadDevInEPInterrupt(USB_TypeDef *USBx, uint8_t epnum);
void USB_ClearInterrupts(USB_TypeDef *USBx, uint32_t interrupt);
-
HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_TypeDef *USBx);
HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_TypeDef *USBx);
-void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
-void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
+
+void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf,
+ uint16_t wPMABufAddr, uint16_t wNBytes);
+
+void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf,
+ uint16_t wPMABufAddr, uint16_t wNBytes);
#endif /* defined (USB) */
/**
* @}
diff --git a/License.md b/License.md
index 62f908f..017be72 100644
--- a/License.md
+++ b/License.md
@@ -1,3 +1,3 @@
# Copyright (c) 2016 STMicroelectronics
-This software component is licensed by STMicroelectronics under the **BSD 3-Clause** license. You may not use this file except in compliance with this license. You may obtain a copy of the license [here](https://opensource.org/licenses/BSD-3-Clause).
+This software component is licensed by STMicroelectronics under the **BSD 3-Clause** license. You may not use this file except in compliance with this license. You may obtain a copy of the license [here](https://opensource.org/licenses/BSD-3-Clause).
\ No newline at end of file
diff --git a/README.md b/README.md
index 955e2e0..a652297 100644
--- a/README.md
+++ b/README.md
@@ -26,6 +26,10 @@
This software component is licensed by STMicroelectronics under BSD 3-Clause license. You may not use this file except in compliance with the License.
You may obtain a copy of the License [here](https://opensource.org/licenses/BSD-3-Clause).
+## Release note
+
+Details about the content of this release are available in the release note [here](https://htmlpreview.github.io/?https://github.com/STMicroelectronics/stm32f1xx_hal_driver/blob/master/Release_Notes.html).
+
## Compatibility information
In this table, you can find the successive versions of this HAL-LL Driver component, in line with the corresponding versions of the full MCU package:
@@ -35,6 +39,7 @@
HAL Driver F1 | CMSIS Device F1 | CMSIS Core | Was delivered in the full MCU package
------------- | --------------- | ---------- | -------------------------------------
Tag v1.1.4 | Tag v4.3.1 | Tag v5.4.0_cm3 | Tag v1.8.0 (and following, if any, till next new tag)
+Tag v1.1.5 | Tag v4.3.1 | Tag v5.4.0_cm3 | Tag v1.8.1 (and following, if any, till next new tag)
The full **STM32CubeF1** MCU package is available [here](https://github.com/STMicroelectronics/STM32CubeF1).
@@ -42,4 +47,4 @@
If you have any issue with the **Software content** of this repo, you can [file an issue on Github](https://github.com/STMicroelectronics/stm32f1xx_hal_driver/issues/new).
-For any other question related to the product, the tools, the environment, you can submit a topic on the [ST Community/STM32 MCUs forum](https://community.st.com/s/group/0F90X000000AXsASAW/stm32-mcus).
+For any other question related to the product, the tools, the environment, you can submit a topic on the [ST Community/STM32 MCUs forum](https://community.st.com/s/group/0F90X000000AXsASAW/stm32-mcus).
\ No newline at end of file
diff --git a/Release_Notes.html b/Release_Notes.html
index ea25dfc..8639489 100644
--- a/Release_Notes.html
+++ b/Release_Notes.html
@@ -25,7 +25,7 @@
<h1 id="release-notes-for-stm32f1xx-hal-drivers"><strong>Release Notes for STM32F1xx HAL Drivers</strong></h1>
<p>Copyright © 2016 STMicroelectronics<br />
</p>
-<a href="https://www.st.com" class="logo"><img src="_htmresc/st_logo.png" alt="ST logo" /></a>
+<a href="https://www.st.com" class="logo"><img src="../../_htmresc/st_logo.png" alt="ST logo" /></a>
</center>
</div>
</div>
@@ -38,11 +38,68 @@
<div class="col-sm-12 col-lg-8">
<h1 id="update-history"><strong>Update History</strong></h1>
<div class="collapse">
-<input type="checkbox" id="collapse-section11" aria-hidden="true"> <label for="collapse-section11" aria-hidden="true"><strong>V1.1.4 / 26-June-2019</strong></label>
+<input type="checkbox" id="collapse-section1_1_5" aria-hidden="true"> <label for="collapse-section1_1_5" aria-hidden="true"><strong>V1.1.5 / 30-July-2020</strong></label>
<div>
<h2 id="main-changes">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation</li>
+</ul>
+<h2 id="contents">Contents</h2>
+<ul>
+<li><strong>HAL</strong> driver
+<ul>
+<li>Enhance HAL_SetTickFreq() API robustness
+<ul>
+<li>Restore previous tick frequency when a wrong tick initialization occurs.</li>
+</ul></li>
+</ul></li>
+<li><strong>HAL/LL I2C</strong> update
+<ul>
+<li>Update HAL_I2C_ER_IRQHandler() API to fix acknowledge failure issue with I2C memory IT processes
+<ul>
+<li>Add stop condition generation when NACK occurs.</li>
+</ul></li>
+<li>Update I2C_DMAXferCplt(), I2C_DMAError() and I2C_DMAAbort() APIs to fix hardfault issue when hdmatx and hdmarx parameters in i2c handle aren’t initialized (NULL pointer).
+<ul>
+<li>Add additional check on hi2c->hdmtx and hi2c->hdmarx before resetting DMA Tx/Rx complete callbacks</li>
+</ul></li>
+<li>Update HAL_I2C_ER_IRQHandler() API to fix acknowledge failure issue with I2C memory IT processes
+<ul>
+<li>Add stop condition generation when NACK occursHAL SMBUS</li>
+</ul></li>
+<li>Update HAL_I2C_Init() API to force software reset before setting new I2C configuration.</li>
+<li>Update HAL I2C processes to report ErrorCode when wrong I2C start condition occurs
+<ul>
+<li>Add new ErrorCode define: HAL_I2C_WRONG_START</li>
+<li>Set ErrorCode parameter in I2C handle to HAL_I2C_WRONG_START</li>
+</ul></li>
+<li>Update sequential APIs to avoid requesting a START when a STOP condition is not fully treated
+<ul>
+<li>Wait the end of STOP treatment by polling (with a timeout) the STOP bit on Control register CR1</li>
+</ul></li>
+<li>Update I2C_MasterReceiveRXNE() static API to avoid set the STOP bit again after the bit clearing by Hardware during the masking operation
+<ul>
+<li>Add new API I2C_WaitOnSTOPRequestThroughIT() to wait for stop bit.</li>
+</ul></li>
+</ul></li>
+<li><strong>HAL/LL USB</strong> driver
+<ul>
+<li>Bug fix: USB_ReadPMA() and USB_WritePMA() by ensuring 16-bits access to USB PMA memory</li>
+<li>Bug fix: correct USB RX count calculation</li>
+<li>Fix USB Bulk transfer double buffer mode</li>
+<li>Remove register keyword from USB defined macros as no more supported by C++ compiler</li>
+<li>Minor rework on USBD_Start() and USBD_Stop() APIs: stopping device will be handled by HAL_PCD_DeInit() API.</li>
+<li>Remove non used API for USB device mode.</li>
+</ul></li>
+</ul>
+</div>
+</div>
+<div class="collapse">
+<input type="checkbox" id="collapse-section11" aria-hidden="true"> <label for="collapse-section11" aria-hidden="true"><strong>V1.1.4 / 26-June-2019</strong></label>
+<div>
+<h2 id="main-changes-1">Main Changes</h2>
+<ul>
+<li>General updates to fix known defects and enhancements implementation</li>
<li>Add support of HAL callback registration feature</li>
<li>Add new <strong>HAL EXTI</strong> driver</li>
<li>General updates to fix CodeSonar compilation warnings</li>
@@ -56,7 +113,7 @@
<li>The feature disabled by default is available for the following HAL drivers:
<ul>
<li><strong>ADC, CEC, CAN, DAC, ETH, HCD, UART, USART, IRDA, SMARTCARD,</strong></li>
-<li><strong>MMC, NAND, NOR, PCCARD, PCD, RTC, SD, SRAM, I2C, SPI, I2S, TIM and WWDG</strong></li>
+<li><strong>MMC, NAND, NOR, PCCARD, PCD, RTC, SD, SRAM, SPI, I2S, TIM and WWDG</strong></li>
</ul></li>
<li>The feature may be enabled individually per HAL PPP driver by setting the corresponding definition USE_HAL_PPP_REGISTER_CALLBACKS to 1U in stm32f1xx_hal_conf.h project configuration file (template file stm32f1xx_hal_conf_template.h available from Drivers/STM32F1xx_HAL_Driver/Inc)</li>
<li>Once enabled , the user application may resort to HAL_PPP_RegisterCallback() to register specific callback function(s) and unregister it(them) with HAL_PPP_UnRegisterCallback()</li>
@@ -170,32 +227,6 @@
<li>Add callback identifiers in HAL_SD_CallbackIDTypeDef enumerated typedef</li>
</ul></li>
</ul></li>
-<li><strong>HAL I2C</strong> update
-<ul>
-<li>I2C API changes for MISRA-C 2012 compliance:
-<ul>
-<li>Rename HAL_I2C_Master_Sequential_Transmit_IT() to HAL_I2C_Master_Seq_Transmit_IT()</li>
-<li>Rename HAL_I2C_Master_Sequentiel_Receive_IT() to HAL_I2C_Master_Seq_Receive_IT()</li>
-<li>Rename HAL_I2C_Slave_Sequentiel_Transmit_IT() to HAL_I2C_Slave_Seq_Transmit_IT()</li>
-<li>Rename HAL_I2C_Slave_Sequentiel_Receive_DMA() to HAL_I2C_Slave_Seq_Receive_DMA()</li>
-</ul></li>
-<li>Add support of I2C repeated start feature in DMA Mode With the following new API’s
-<ul>
-<li>HAL_I2C_Master_Seq_Transmit_DMA()</li>
-<li>HAL_I2C_Master_Seq_Receive_DMA()</li>
-<li>HAL_I2C_Slave_Seq_Transmit_DMA()</li>
-<li>HAL_I2C_Slave_Seq_Receive_DMA()</li>
-</ul></li>
-<li>Add new I2C transfer options to easy manage the sequential transfers
-<ul>
-<li>I2C_OTHER_FRAME</li>
-<li>I2C_OTHER_AND_LAST_FRAME</li>
-</ul></li>
-<li>Fix I2C send break issue in IT processes
-<ul>
-<li>Add additional check on hi2c->hdmatxand hi2c->hdmarx to avoid the DMA request enable when ITmode is used.</li>
-</ul></li>
-</ul></li>
<li><strong>HAL SPI</strong> update
<ul>
<li>Align HAL/LL SPI driver with latest updates and enhancements</li>
@@ -273,7 +304,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section10" aria-hidden="true"> <label for="collapse-section10" aria-hidden="true"><strong>V1.1.3 / 09-October-2018</strong></label>
<div>
-<h2 id="main-changes-1">Main Changes</h2>
+<h2 id="main-changes-2">Main Changes</h2>
<ul>
<li><strong>Maintenance release to fix known defects and enhancements implementation</strong></li>
<li><strong>Generic drivers changes</strong></li>
@@ -316,7 +347,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section9" aria-hidden="true"> <label for="collapse-section9" aria-hidden="true"><strong>V1.1.2 / 09-March-2018</strong></label>
<div>
-<h2 id="main-changes-2">Main Changes</h2>
+<h2 id="main-changes-3">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation</li>
<li>Remove Date and version from header files</li>
@@ -394,7 +425,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section8" aria-hidden="true"> <label for="collapse-section8" aria-hidden="true"><strong>V1.1.1 / 12-May-2017</strong></label>
<div>
-<h2 id="main-changes-3">Main Changes</h2>
+<h2 id="main-changes-4">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation</li>
<li><strong>HAL Generic</strong> update
@@ -420,7 +451,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section7" aria-hidden="true"> <label for="collapse-section7" aria-hidden="true"><strong>V1.1.0 / 14-April-2017</strong></label>
<div>
-<h2 id="main-changes-4">Main Changes</h2>
+<h2 id="main-changes-5">Main Changes</h2>
<ul>
<li><strong>Add Low Layer drivers allowing performance and footprint optimization</strong>
<ul>
@@ -702,7 +733,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section6" aria-hidden="true"> <label for="collapse-section6" aria-hidden="true"><strong>V1.0.5 / 06-December-2016</strong></label>
<div>
-<h2 id="main-changes-5">Main Changes</h2>
+<h2 id="main-changes-6">Main Changes</h2>
<ul>
<li>General updates to fix mainly known I2C defects and enhancements implementation</li>
<li><strong>The following changes done on the HAL drivers require an update on the application code based on HAL V1.0.4</strong>
@@ -798,7 +829,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section5" aria-hidden="true"> <label for="collapse-section5" aria-hidden="true"><strong>V1.0.4 / 29-April-2016</strong></label>
<div>
-<h2 id="main-changes-6">Main Changes</h2>
+<h2 id="main-changes-7">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation.</li>
<li><strong>HAL RCC</strong>
@@ -838,7 +869,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section4" aria-hidden="true"> <label for="collapse-section4" aria-hidden="true"><strong>V1.0.3 / 11-January-2016</strong></label>
<div>
-<h2 id="main-changes-7">Main Changes</h2>
+<h2 id="main-changes-8">Main Changes</h2>
<ul>
<li>Remove the #if defined(USE_HAL_LEGACY) condition to include Legacy/stm32_hal_legacy.h by default, in stm32f1xx_hal_def.h.</li>
</ul>
@@ -847,7 +878,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section3" aria-hidden="true"> <label for="collapse-section3" aria-hidden="true"><strong>V1.0.2 / 18-December-2015</strong></label>
<div>
-<h2 id="main-changes-8">Main Changes</h2>
+<h2 id="main-changes-9">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation.</li>
<li><strong>HAL generic</strong>
@@ -933,7 +964,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section2" aria-hidden="true"> <label for="collapse-section2" aria-hidden="true"><strong>V1.0.1 / 31-July-2015</strong></label>
<div>
-<h2 id="main-changes-9">Main Changes</h2>
+<h2 id="main-changes-10">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation.</li>
<li><strong>HAL generic</strong>
@@ -1035,7 +1066,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section1" aria-hidden="true"> <label for="collapse-section1" aria-hidden="true"><strong>V1.0.0 / 15-December-2014</strong></label>
<div>
-<h2 id="main-changes-10">Main Changes</h2>
+<h2 id="main-changes-11">Main Changes</h2>
<ul>
<li>First Official release of <strong>STM32F1xx HAL Drivers</strong> for all STM32F1 devices.</li>
<li>This release is in line with <strong>STM32Cube Firmware specification Rev1.0</strong> document</li>
diff --git a/Src/stm32f1xx_hal.c b/Src/stm32f1xx_hal.c
index 252f973..fbe94fd 100644
--- a/Src/stm32f1xx_hal.c
+++ b/Src/stm32f1xx_hal.c
@@ -53,11 +53,11 @@
* @{
*/
/**
- * @brief STM32F1xx HAL Driver version number V1.1.4
+ * @brief STM32F1xx HAL Driver version number V1.1.5
*/
#define __STM32F1xx_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */
#define __STM32F1xx_HAL_VERSION_SUB1 (0x01U) /*!< [23:16] sub1 version */
-#define __STM32F1xx_HAL_VERSION_SUB2 (0x04U) /*!< [15:8] sub2 version */
+#define __STM32F1xx_HAL_VERSION_SUB2 (0x05U) /*!< [15:8] sub2 version */
#define __STM32F1xx_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */
#define __STM32F1xx_HAL_VERSION ((__STM32F1xx_HAL_VERSION_MAIN << 24)\
|(__STM32F1xx_HAL_VERSION_SUB1 << 16)\
@@ -322,15 +322,25 @@
HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq)
{
HAL_StatusTypeDef status = HAL_OK;
+ HAL_TickFreqTypeDef prevTickFreq;
+
assert_param(IS_TICKFREQ(Freq));
if (uwTickFreq != Freq)
{
+ /* Back up uwTickFreq frequency */
+ prevTickFreq = uwTickFreq;
+
+ /* Update uwTickFreq global variable used by HAL_InitTick() */
+ uwTickFreq = Freq;
+
/* Apply the new tick Freq */
status = HAL_InitTick(uwTickPrio);
- if (status == HAL_OK)
+
+ if (status != HAL_OK)
{
- uwTickFreq = Freq;
+ /* Restore previous tick frequency */
+ uwTickFreq = prevTickFreq;
}
}
diff --git a/Src/stm32f1xx_hal_hcd.c b/Src/stm32f1xx_hal_hcd.c
index b1d50ba..1da3493 100644
--- a/Src/stm32f1xx_hal_hcd.c
+++ b/Src/stm32f1xx_hal_hcd.c
@@ -88,8 +88,8 @@
*/
/** @defgroup HCD_Exported_Functions_Group1 Initialization and de-initialization functions
- * @brief Initialization and Configuration functions
- *
+ * @brief Initialization and Configuration functions
+ *
@verbatim
===============================================================================
##### Initialization and de-initialization functions #####
@@ -595,6 +595,18 @@
}
}
+
+/**
+ * @brief Handles HCD Wakeup interrupt request.
+ * @param hhcd HCD handle
+ * @retval HAL status
+ */
+void HAL_HCD_WKUP_IRQHandler(HCD_HandleTypeDef *hhcd)
+{
+ UNUSED(hhcd);
+}
+
+
/**
* @brief SOF callback.
* @param hhcd HCD handle
@@ -714,7 +726,9 @@
* @param pCallback pointer to the Callback function
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_HCD_RegisterCallback(HCD_HandleTypeDef *hhcd, HAL_HCD_CallbackIDTypeDef CallbackID, pHCD_CallbackTypeDef pCallback)
+HAL_StatusTypeDef HAL_HCD_RegisterCallback(HCD_HandleTypeDef *hhcd,
+ HAL_HCD_CallbackIDTypeDef CallbackID,
+ pHCD_CallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
@@ -802,7 +816,7 @@
/**
* @brief Unregister an USB HCD Callback
- * USB HCD callabck is redirected to the weak predefined callback
+ * USB HCD callback is redirected to the weak predefined callback
* @param hhcd USB HCD handle
* @param CallbackID ID of the callback to be unregistered
* This parameter can be one of the following values:
@@ -906,7 +920,8 @@
* @param pCallback pointer to the USB HCD Host Channel Notify URB Change Callback function
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_HCD_RegisterHC_NotifyURBChangeCallback(HCD_HandleTypeDef *hhcd, pHCD_HC_NotifyURBChangeCallbackTypeDef pCallback)
+HAL_StatusTypeDef HAL_HCD_RegisterHC_NotifyURBChangeCallback(HCD_HandleTypeDef *hhcd,
+ pHCD_HC_NotifyURBChangeCallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
@@ -941,7 +956,7 @@
}
/**
- * @brief UnRegister the USB HCD Host Channel Notify URB Change Callback
+ * @brief Unregister the USB HCD Host Channel Notify URB Change Callback
* USB HCD Host Channel Notify URB Change Callback is redirected to the weak HAL_HCD_HC_NotifyURBChange_Callback() predefined callback
* @param hhcd HCD handle
* @retval HAL status
@@ -978,8 +993,8 @@
*/
/** @defgroup HCD_Exported_Functions_Group3 Peripheral Control functions
- * @brief Management functions
- *
+ * @brief Management functions
+ *
@verbatim
===============================================================================
##### Peripheral Control functions #####
@@ -1037,8 +1052,8 @@
*/
/** @defgroup HCD_Exported_Functions_Group4 Peripheral State functions
- * @brief Peripheral State functions
- *
+ * @brief Peripheral State functions
+ *
@verbatim
===============================================================================
##### Peripheral State functions #####
@@ -1166,6 +1181,13 @@
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_AHBERR);
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
}
+ else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_BBERR) == USB_OTG_HCINT_BBERR)
+ {
+ __HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_BBERR);
+ hhcd->hc[ch_num].state = HC_BBLERR;
+ __HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
+ (void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
+ }
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_ACK) == USB_OTG_HCINT_ACK)
{
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_ACK);
@@ -1224,6 +1246,7 @@
else if (hhcd->hc[ch_num].ep_type == EP_TYPE_ISOC)
{
hhcd->hc[ch_num].urb_state = URB_DONE;
+ hhcd->hc[ch_num].toggle_in ^= 1U;
#if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
hhcd->HC_NotifyURBChangeCallback(hhcd, (uint8_t)ch_num, hhcd->hc[ch_num].urb_state);
@@ -1279,6 +1302,11 @@
tmpreg |= USB_OTG_HCCHAR_CHENA;
USBx_HC(ch_num)->HCCHAR = tmpreg;
}
+ else if (hhcd->hc[ch_num].state == HC_BBLERR)
+ {
+ hhcd->hc[ch_num].ErrCnt++;
+ hhcd->hc[ch_num].urb_state = URB_ERROR;
+ }
else
{
/* ... */
diff --git a/Src/stm32f1xx_hal_i2c.c b/Src/stm32f1xx_hal_i2c.c
index 6e48b9a..66c603d 100644
--- a/Src/stm32f1xx_hal_i2c.c
+++ b/Src/stm32f1xx_hal_i2c.c
@@ -337,6 +337,7 @@
*/
#define I2C_TIMEOUT_FLAG 35U /*!< Timeout 35 ms */
#define I2C_TIMEOUT_BUSY_FLAG 25U /*!< Timeout 25 ms */
+#define I2C_TIMEOUT_STOP_FLAG 5U /*!< Timeout 5 ms */
#define I2C_NO_OPTION_FRAME 0xFFFF0000U /*!< XferOptions default value */
/* Private define for @ref PreviousState usage */
@@ -377,6 +378,7 @@
static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
+static HAL_StatusTypeDef I2C_WaitOnSTOPRequestThroughIT(I2C_HandleTypeDef *hi2c);
static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c);
/* Private functions for I2C transfer IRQ handler */
@@ -396,6 +398,8 @@
static void I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c);
static void I2C_Slave_AF(I2C_HandleTypeDef *hi2c);
+static void I2C_MemoryTransmit_TXE_BTF(I2C_HandleTypeDef *hi2c);
+
/* Private function to Convert Specific options */
static void I2C_ConvertOtherXferOptions(I2C_HandleTypeDef *hi2c);
/**
@@ -504,6 +508,10 @@
/* Disable the selected I2C peripheral */
__HAL_I2C_DISABLE(hi2c);
+ /*Reset I2C*/
+ hi2c->Instance->CR1 |= I2C_CR1_SWRST;
+ hi2c->Instance->CR1 &= ~I2C_CR1_SWRST;
+
/* Get PCLK1 frequency */
pclk1 = HAL_RCC_GetPCLK1Freq();
@@ -1162,6 +1170,8 @@
*/
HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
{
+ __IO uint32_t count = 0U;
+
/* Init tickstart for timeout management*/
uint32_t tickstart = HAL_GetTick();
@@ -1344,10 +1354,27 @@
hi2c->XferCount--;
/* Wait until BTF flag is set */
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
+ count = I2C_TIMEOUT_FLAG * (SystemCoreClock / 25U / 1000U);
+ do
{
- return HAL_ERROR;
+ count--;
+ if (count == 0U)
+ {
+ hi2c->PreviousState = I2C_STATE_NONE;
+ hi2c->State = HAL_I2C_STATE_READY;
+ hi2c->Mode = HAL_I2C_MODE_NONE;
+ hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
+
+ /* Re-enable IRQs */
+ __enable_irq();
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hi2c);
+
+ return HAL_ERROR;
+ }
}
+ while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET);
/* Generate Stop */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
@@ -2567,6 +2594,8 @@
*/
HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
{
+ __IO uint32_t count = 0U;
+
/* Init tickstart for timeout management*/
uint32_t tickstart = HAL_GetTick();
@@ -2751,10 +2780,27 @@
hi2c->XferCount--;
/* Wait until BTF flag is set */
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
+ count = I2C_TIMEOUT_FLAG * (SystemCoreClock / 25U / 1000U);
+ do
{
- return HAL_ERROR;
+ count--;
+ if (count == 0U)
+ {
+ hi2c->PreviousState = I2C_STATE_NONE;
+ hi2c->State = HAL_I2C_STATE_READY;
+ hi2c->Mode = HAL_I2C_MODE_NONE;
+ hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
+
+ /* Re-enable IRQs */
+ __enable_irq();
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hi2c);
+
+ return HAL_ERROR;
+ }
}
+ while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET);
/* Generate Stop */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
@@ -3100,6 +3146,27 @@
/* Send Slave Address and Memory Address */
if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
{
+ /* Abort the ongoing DMA */
+ dmaxferstatus = HAL_DMA_Abort_IT(hi2c->hdmarx);
+
+ /* Prevent unused argument(s) compilation and MISRA warning */
+ UNUSED(dmaxferstatus);
+
+ /* Clear directly Complete callback as no XferAbortCallback is used to finalize Abort treatment */
+ if (hi2c->hdmatx != NULL)
+ {
+ hi2c->hdmatx->XferCpltCallback = NULL;
+ }
+
+ /* Disable Acknowledge */
+ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
+
+ hi2c->XferSize = 0U;
+ hi2c->XferCount = 0U;
+
+ /* Disable I2C peripheral to prevent dummy data in buffer */
+ __HAL_I2C_DISABLE(hi2c);
+
return HAL_ERROR;
}
@@ -3243,6 +3310,27 @@
/* Send Slave Address and Memory Address */
if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
{
+ /* Abort the ongoing DMA */
+ dmaxferstatus = HAL_DMA_Abort_IT(hi2c->hdmarx);
+
+ /* Prevent unused argument(s) compilation and MISRA warning */
+ UNUSED(dmaxferstatus);
+
+ /* Clear directly Complete callback as no XferAbortCallback is used to finalize Abort treatment */
+ if (hi2c->hdmarx != NULL)
+ {
+ hi2c->hdmarx->XferCpltCallback = NULL;
+ }
+
+ /* Disable Acknowledge */
+ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
+
+ hi2c->XferSize = 0U;
+ hi2c->XferCount = 0U;
+
+ /* Disable I2C peripheral to prevent dummy data in buffer */
+ __HAL_I2C_DISABLE(hi2c);
+
return HAL_ERROR;
}
@@ -3367,7 +3455,11 @@
/* Wait until SB flag is set */
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, tickstart) != HAL_OK)
{
- return HAL_ERROR;
+ if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
+ {
+ hi2c->ErrorCode = HAL_I2C_WRONG_START;
+ }
+ return HAL_TIMEOUT;
}
/* Send slave address */
@@ -3469,7 +3561,7 @@
if (hi2c->State == HAL_I2C_STATE_READY)
{
/* Check Busy Flag only if FIRST call of Master interface */
- if ((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
+ if ((READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP) || (XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
{
/* Wait until BUSY flag is reset */
count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
@@ -3568,7 +3660,7 @@
if (hi2c->State == HAL_I2C_STATE_READY)
{
/* Check Busy Flag only if FIRST call of Master interface */
- if ((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
+ if ((READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP) || (XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
{
/* Wait until BUSY flag is reset */
count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
@@ -3734,7 +3826,7 @@
if (hi2c->State == HAL_I2C_STATE_READY)
{
/* Check Busy Flag only if FIRST call of Master interface */
- if ((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
+ if ((READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP) || (XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
{
/* Wait until BUSY flag is reset */
count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
@@ -3859,7 +3951,7 @@
if (hi2c->State == HAL_I2C_STATE_READY)
{
/* Check Busy Flag only if FIRST call of Master interface */
- if ((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
+ if ((READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP) || (XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
{
/* Wait until BUSY flag is reset */
count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
@@ -4561,11 +4653,14 @@
*/
HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress)
{
+ /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
+ HAL_I2C_ModeTypeDef CurrentMode = hi2c->Mode;
+
/* Prevent unused argument(s) compilation warning */
UNUSED(DevAddress);
/* Abort Master transfer during Receive or Transmit process */
- if (hi2c->Mode == HAL_I2C_MODE_MASTER)
+ if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET) && (CurrentMode == HAL_I2C_MODE_MASTER))
{
/* Process Locked */
__HAL_LOCK(hi2c);
@@ -4596,6 +4691,7 @@
{
/* Wrong usage of abort function */
/* This function should be used only in case of abort monitored by master device */
+ /* Or periphal is not in busy state, mean there is no active sequence to be abort */
return HAL_ERROR;
}
}
@@ -4667,7 +4763,14 @@
/* BTF set -------------------------------------------------------------*/
else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
{
- I2C_MasterTransmit_BTF(hi2c);
+ if (CurrentMode == HAL_I2C_MODE_MASTER)
+ {
+ I2C_MasterTransmit_BTF(hi2c);
+ }
+ else /* HAL_I2C_MODE_MEM */
+ {
+ I2C_MemoryTransmit_TXE_BTF(hi2c);
+ }
}
else
{
@@ -4782,6 +4885,7 @@
uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1);
uint32_t itsources = READ_REG(hi2c->Instance->CR2);
uint32_t error = HAL_I2C_ERROR_NONE;
+ HAL_I2C_ModeTypeDef CurrentMode = hi2c->Mode;
/* I2C Bus error interrupt occurred ----------------------------------------*/
if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BERR) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERR) != RESET))
@@ -4807,7 +4911,7 @@
/* I2C Acknowledge failure error interrupt occurred ------------------------*/
if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_AF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERR) != RESET))
{
- tmp1 = hi2c->Mode;
+ tmp1 = CurrentMode;
tmp2 = hi2c->XferCount;
tmp3 = hi2c->State;
tmp4 = hi2c->PreviousState;
@@ -4825,7 +4929,7 @@
error |= HAL_I2C_ERROR_AF;
/* Do not generate a STOP in case of Slave receive non acknowledge during transfer (mean not at the end of transfer) */
- if (hi2c->Mode == HAL_I2C_MODE_MASTER)
+ if ((CurrentMode == HAL_I2C_MODE_MASTER) || (CurrentMode == HAL_I2C_MODE_MEM))
{
/* Generate Stop */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
@@ -5150,59 +5254,7 @@
{
if (hi2c->Mode == HAL_I2C_MODE_MEM)
{
- if (hi2c->EventCount == 0U)
- {
- /* If Memory address size is 8Bit */
- if (hi2c->MemaddSize == I2C_MEMADD_SIZE_8BIT)
- {
- /* Send Memory Address */
- hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
-
- hi2c->EventCount += 2U;
- }
- /* If Memory address size is 16Bit */
- else
- {
- /* Send MSB of Memory Address */
- hi2c->Instance->DR = I2C_MEM_ADD_MSB(hi2c->Memaddress);
-
- hi2c->EventCount++;
- }
- }
- else if (hi2c->EventCount == 1U)
- {
- /* Send LSB of Memory Address */
- hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
-
- hi2c->EventCount++;
- }
- else if (hi2c->EventCount == 2U)
- {
- if (hi2c->State == HAL_I2C_STATE_BUSY_RX)
- {
- /* Generate Restart */
- hi2c->Instance->CR1 |= I2C_CR1_START;
- }
- else if (hi2c->State == HAL_I2C_STATE_BUSY_TX)
- {
- /* Write data to DR */
- hi2c->Instance->DR = *hi2c->pBuffPtr;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferCount--;
- }
- else
- {
- /* Do nothing */
- }
- }
- else
- {
- /* Do nothing */
- }
+ I2C_MemoryTransmit_TXE_BTF(hi2c);
}
else
{
@@ -5274,29 +5326,104 @@
hi2c->PreviousState = I2C_STATE_NONE;
hi2c->State = HAL_I2C_STATE_READY;
-
- if (hi2c->Mode == HAL_I2C_MODE_MEM)
- {
- hi2c->Mode = HAL_I2C_MODE_NONE;
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- hi2c->MemTxCpltCallback(hi2c);
-#else
- HAL_I2C_MemTxCpltCallback(hi2c);
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- }
- else
- {
- hi2c->Mode = HAL_I2C_MODE_NONE;
+ hi2c->Mode = HAL_I2C_MODE_NONE;
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- hi2c->MasterTxCpltCallback(hi2c);
+ hi2c->MasterTxCpltCallback(hi2c);
#else
- HAL_I2C_MasterTxCpltCallback(hi2c);
+ HAL_I2C_MasterTxCpltCallback(hi2c);
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- }
}
}
}
+ else
+ {
+ /* Do nothing */
+ }
+}
+
+/**
+ * @brief Handle TXE and BTF flag for Memory transmitter
+ * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
+ * the configuration information for I2C module
+ * @retval None
+ */
+static void I2C_MemoryTransmit_TXE_BTF(I2C_HandleTypeDef *hi2c)
+{
+ /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
+ HAL_I2C_StateTypeDef CurrentState = hi2c->State;
+
+ if (hi2c->EventCount == 0U)
+ {
+ /* If Memory address size is 8Bit */
+ if (hi2c->MemaddSize == I2C_MEMADD_SIZE_8BIT)
+ {
+ /* Send Memory Address */
+ hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
+
+ hi2c->EventCount += 2U;
+ }
+ /* If Memory address size is 16Bit */
+ else
+ {
+ /* Send MSB of Memory Address */
+ hi2c->Instance->DR = I2C_MEM_ADD_MSB(hi2c->Memaddress);
+
+ hi2c->EventCount++;
+ }
+ }
+ else if (hi2c->EventCount == 1U)
+ {
+ /* Send LSB of Memory Address */
+ hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
+
+ hi2c->EventCount++;
+ }
+ else if (hi2c->EventCount == 2U)
+ {
+ if (CurrentState == HAL_I2C_STATE_BUSY_RX)
+ {
+ /* Generate Restart */
+ hi2c->Instance->CR1 |= I2C_CR1_START;
+ }
+ else if ((hi2c->XferCount > 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX))
+ {
+ /* Write data to DR */
+ hi2c->Instance->DR = *hi2c->pBuffPtr;
+
+ /* Increment Buffer pointer */
+ hi2c->pBuffPtr++;
+
+ /* Update counter */
+ hi2c->XferCount--;
+ }
+ else if ((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX))
+ {
+ /* Generate Stop condition then Call TxCpltCallback() */
+ /* Disable EVT, BUF and ERR interrupt */
+ __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
+
+ /* Generate Stop */
+ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
+
+ hi2c->PreviousState = I2C_STATE_NONE;
+ hi2c->State = HAL_I2C_STATE_READY;
+ hi2c->Mode = HAL_I2C_MODE_NONE;
+#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
+ hi2c->MemTxCpltCallback(hi2c);
+#else
+ HAL_I2C_MemTxCpltCallback(hi2c);
+#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
+ }
+ else
+ {
+ /* Do nothing */
+ }
+ }
+ else
+ {
+ /* Do nothing */
+ }
}
/**
@@ -5333,43 +5460,70 @@
}
else if ((hi2c->XferOptions != I2C_FIRST_AND_NEXT_FRAME) && ((tmp == 1U) || (tmp == 0U)))
{
- /* Disable Acknowledge */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* Disable EVT, BUF and ERR interrupt */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- /* Read data from DR */
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferCount--;
-
- hi2c->State = HAL_I2C_STATE_READY;
-
- if (hi2c->Mode == HAL_I2C_MODE_MEM)
+ if (I2C_WaitOnSTOPRequestThroughIT(hi2c) == HAL_OK)
{
- hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->PreviousState = I2C_STATE_NONE;
+ /* Disable Acknowledge */
+ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
+
+ /* Disable EVT, BUF and ERR interrupt */
+ __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
+
+ /* Read data from DR */
+ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
+
+ /* Increment Buffer pointer */
+ hi2c->pBuffPtr++;
+
+ /* Update counter */
+ hi2c->XferCount--;
+
+ hi2c->State = HAL_I2C_STATE_READY;
+
+ if (hi2c->Mode == HAL_I2C_MODE_MEM)
+ {
+ hi2c->Mode = HAL_I2C_MODE_NONE;
+ hi2c->PreviousState = I2C_STATE_NONE;
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- hi2c->MemRxCpltCallback(hi2c);
+ hi2c->MemRxCpltCallback(hi2c);
#else
- HAL_I2C_MemRxCpltCallback(hi2c);
+ HAL_I2C_MemRxCpltCallback(hi2c);
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
+ }
+ else
+ {
+ hi2c->Mode = HAL_I2C_MODE_NONE;
+ hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
+
+#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
+ hi2c->MasterRxCpltCallback(hi2c);
+#else
+ HAL_I2C_MasterRxCpltCallback(hi2c);
+#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
+ }
}
else
{
- hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
+ /* Disable EVT, BUF and ERR interrupt */
+ __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
+ /* Read data from DR */
+ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
+
+ /* Increment Buffer pointer */
+ hi2c->pBuffPtr++;
+
+ /* Update counter */
+ hi2c->XferCount--;
+
+ hi2c->State = HAL_I2C_STATE_READY;
+ hi2c->Mode = HAL_I2C_MODE_NONE;
+
+ /* Call user error callback */
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- hi2c->MasterRxCpltCallback(hi2c);
+ hi2c->ErrorCallback(hi2c);
#else
- HAL_I2C_MasterRxCpltCallback(hi2c);
+ HAL_I2C_ErrorCallback(hi2c);
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
}
}
@@ -5540,13 +5694,11 @@
hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
}
- if ((hi2c->hdmatx != NULL) || (hi2c->hdmarx != NULL))
+ if (((hi2c->hdmatx != NULL) && (hi2c->hdmatx->XferCpltCallback != NULL))
+ || ((hi2c->hdmarx != NULL) && (hi2c->hdmarx->XferCpltCallback != NULL)))
{
- if ((hi2c->hdmatx->XferCpltCallback != NULL) || (hi2c->hdmarx->XferCpltCallback != NULL))
- {
- /* Enable DMA Request */
- SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
- }
+ /* Enable DMA Request */
+ SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
}
}
else
@@ -6159,8 +6311,10 @@
{
/* Declaration of temporary variable to prevent undefined behavior of volatile usage */
HAL_I2C_StateTypeDef CurrentState = hi2c->State;
+ HAL_I2C_ModeTypeDef CurrentMode = hi2c->Mode;
+ uint32_t CurrentError;
- if ((hi2c->Mode == HAL_I2C_MODE_MASTER) && (CurrentState == HAL_I2C_STATE_BUSY_RX))
+ if (((CurrentMode == HAL_I2C_MODE_MASTER) || (CurrentMode == HAL_I2C_MODE_MEM)) && (CurrentState == HAL_I2C_STATE_BUSY_RX))
{
/* Disable Pos bit in I2C CR1 when error occurred in Master/Mem Receive IT Process */
hi2c->Instance->CR1 &= ~I2C_CR1_POS;
@@ -6179,9 +6333,9 @@
if ((READ_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN) != I2C_CR2_DMAEN) && (CurrentState != HAL_I2C_STATE_ABORT))
{
hi2c->State = HAL_I2C_STATE_READY;
+ hi2c->Mode = HAL_I2C_MODE_NONE;
}
hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->Mode = HAL_I2C_MODE_NONE;
}
/* Abort DMA transfer */
@@ -6278,15 +6432,24 @@
HAL_I2C_ErrorCallback(hi2c);
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
}
- /* STOP Flag is not set after a NACK reception */
+
+ /* STOP Flag is not set after a NACK reception, BusError, ArbitrationLost, OverRun */
+ CurrentError = hi2c->ErrorCode;
+
+ if (((CurrentError & HAL_I2C_ERROR_BERR) == HAL_I2C_ERROR_BERR) || \
+ ((CurrentError & HAL_I2C_ERROR_ARLO) == HAL_I2C_ERROR_ARLO) || \
+ ((CurrentError & HAL_I2C_ERROR_AF) == HAL_I2C_ERROR_AF) || \
+ ((CurrentError & HAL_I2C_ERROR_OVR) == HAL_I2C_ERROR_OVR))
+ {
+ /* Disable EVT, BUF and ERR interrupt */
+ __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
+ }
+
/* So may inform upper layer that listen phase is stopped */
/* during NACK error treatment */
CurrentState = hi2c->State;
if (((hi2c->ErrorCode & HAL_I2C_ERROR_AF) == HAL_I2C_ERROR_AF) && (CurrentState == HAL_I2C_STATE_LISTEN))
{
- /* Disable EVT, BUF and ERR interrupt */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
hi2c->XferOptions = I2C_NO_OPTION_FRAME;
hi2c->PreviousState = I2C_STATE_NONE;
hi2c->State = HAL_I2C_STATE_READY;
@@ -6334,7 +6497,11 @@
/* Wait until SB flag is set */
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
{
- return HAL_ERROR;
+ if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
+ {
+ hi2c->ErrorCode = HAL_I2C_WRONG_START;
+ }
+ return HAL_TIMEOUT;
}
if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
@@ -6403,7 +6570,11 @@
/* Wait until SB flag is set */
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
{
- return HAL_ERROR;
+ if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
+ {
+ hi2c->ErrorCode = HAL_I2C_WRONG_START;
+ }
+ return HAL_TIMEOUT;
}
if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
@@ -6440,7 +6611,11 @@
/* Wait until SB flag is set */
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
{
- return HAL_ERROR;
+ if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
+ {
+ hi2c->ErrorCode = HAL_I2C_WRONG_START;
+ }
+ return HAL_TIMEOUT;
}
/* Send header of slave address */
@@ -6476,7 +6651,11 @@
/* Wait until SB flag is set */
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
{
- return HAL_ERROR;
+ if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
+ {
+ hi2c->ErrorCode = HAL_I2C_WRONG_START;
+ }
+ return HAL_TIMEOUT;
}
/* Send slave address */
@@ -6555,7 +6734,11 @@
/* Wait until SB flag is set */
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
{
- return HAL_ERROR;
+ if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
+ {
+ hi2c->ErrorCode = HAL_I2C_WRONG_START;
+ }
+ return HAL_TIMEOUT;
}
/* Send slave address */
@@ -6625,7 +6808,11 @@
/* Wait until SB flag is set */
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
{
- return HAL_ERROR;
+ if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
+ {
+ hi2c->ErrorCode = HAL_I2C_WRONG_START;
+ }
+ return HAL_TIMEOUT;
}
/* Send slave address */
@@ -6658,8 +6845,14 @@
__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
/* Clear Complete callback */
- hi2c->hdmatx->XferCpltCallback = NULL;
- hi2c->hdmarx->XferCpltCallback = NULL;
+ if (hi2c->hdmatx != NULL)
+ {
+ hi2c->hdmatx->XferCpltCallback = NULL;
+ }
+ if (hi2c->hdmarx != NULL)
+ {
+ hi2c->hdmarx->XferCpltCallback = NULL;
+ }
if ((((uint32_t)CurrentState & (uint32_t)HAL_I2C_STATE_BUSY_TX) == (uint32_t)HAL_I2C_STATE_BUSY_TX) || ((((uint32_t)CurrentState & (uint32_t)HAL_I2C_STATE_BUSY_RX) == (uint32_t)HAL_I2C_STATE_BUSY_RX) && (CurrentMode == HAL_I2C_MODE_SLAVE)))
{
@@ -6782,8 +6975,14 @@
I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; /* Derogation MISRAC2012-Rule-11.5 */
/* Clear Complete callback */
- hi2c->hdmatx->XferCpltCallback = NULL;
- hi2c->hdmarx->XferCpltCallback = NULL;
+ if (hi2c->hdmatx != NULL)
+ {
+ hi2c->hdmatx->XferCpltCallback = NULL;
+ }
+ if (hi2c->hdmarx != NULL)
+ {
+ hi2c->hdmarx->XferCpltCallback = NULL;
+ }
/* Disable Acknowledge */
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
@@ -6808,14 +7007,35 @@
*/
static void I2C_DMAAbort(DMA_HandleTypeDef *hdma)
{
+ __IO uint32_t count = 0U;
I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; /* Derogation MISRAC2012-Rule-11.5 */
/* Declaration of temporary variable to prevent undefined behavior of volatile usage */
HAL_I2C_StateTypeDef CurrentState = hi2c->State;
+ /* During abort treatment, check that there is no pending STOP request */
+ /* Wait until STOP flag is reset */
+ count = I2C_TIMEOUT_FLAG * (SystemCoreClock / 25U / 1000U);
+ do
+ {
+ if (count == 0U)
+ {
+ hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
+ break;
+ }
+ count--;
+ }
+ while (READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP);
+
/* Clear Complete callback */
- hi2c->hdmatx->XferCpltCallback = NULL;
- hi2c->hdmarx->XferCpltCallback = NULL;
+ if (hi2c->hdmatx != NULL)
+ {
+ hi2c->hdmatx->XferCpltCallback = NULL;
+ }
+ if (hi2c->hdmarx != NULL)
+ {
+ hi2c->hdmarx->XferCpltCallback = NULL;
+ }
/* Disable Acknowledge */
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
@@ -6823,8 +7043,14 @@
hi2c->XferCount = 0U;
/* Reset XferAbortCallback */
- hi2c->hdmatx->XferAbortCallback = NULL;
- hi2c->hdmarx->XferAbortCallback = NULL;
+ if (hi2c->hdmatx != NULL)
+ {
+ hi2c->hdmatx->XferAbortCallback = NULL;
+ }
+ if (hi2c->hdmarx != NULL)
+ {
+ hi2c->hdmarx->XferAbortCallback = NULL;
+ }
/* Disable I2C peripheral to prevent dummy data in buffer */
__HAL_I2C_DISABLE(hi2c);
@@ -7071,6 +7297,33 @@
}
/**
+ * @brief This function handles I2C Communication Timeout for specific usage of STOP request through Interrupt.
+ * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
+ * the configuration information for the specified I2C.
+ * @retval HAL status
+ */
+static HAL_StatusTypeDef I2C_WaitOnSTOPRequestThroughIT(I2C_HandleTypeDef *hi2c)
+{
+ __IO uint32_t count = 0U;
+
+ /* Wait until STOP flag is reset */
+ count = I2C_TIMEOUT_STOP_FLAG * (SystemCoreClock / 25U / 1000U);
+ do
+ {
+ count--;
+ if (count == 0U)
+ {
+ hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
+
+ return HAL_ERROR;
+ }
+ }
+ while (READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP);
+
+ return HAL_OK;
+}
+
+/**
* @brief This function handles I2C Communication Timeout for specific usage of RXNE flag.
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
* the configuration information for the specified I2C.
diff --git a/Src/stm32f1xx_hal_pcd.c b/Src/stm32f1xx_hal_pcd.c
index 4754352..a37814a 100644
--- a/Src/stm32f1xx_hal_pcd.c
+++ b/Src/stm32f1xx_hal_pcd.c
@@ -94,6 +94,8 @@
#if defined (USB)
static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd);
+static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd, PCD_EPTypeDef *ep, uint16_t wEPVal);
+static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd, PCD_EPTypeDef *ep, uint16_t wEPVal);
#endif /* defined (USB) */
/**
* @}
@@ -105,8 +107,8 @@
*/
/** @defgroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
- * @brief Initialization and Configuration functions
- *
+ * @brief Initialization and Configuration functions
+ *
@verbatim
===============================================================================
##### Initialization and de-initialization functions #####
@@ -252,7 +254,10 @@
hpcd->State = HAL_PCD_STATE_BUSY;
/* Stop Device */
- (void)HAL_PCD_Stop(hpcd);
+ if (USB_StopDevice(hpcd->Instance) != HAL_OK)
+ {
+ return HAL_ERROR;
+ }
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
if (hpcd->MspDeInitCallback == NULL)
@@ -321,7 +326,9 @@
* @param pCallback pointer to the Callback function
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID, pPCD_CallbackTypeDef pCallback)
+HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd,
+ HAL_PCD_CallbackIDTypeDef CallbackID,
+ pPCD_CallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
@@ -531,7 +538,8 @@
* @param pCallback pointer to the USB PCD Data OUT Stage Callback function
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataOutStageCallbackTypeDef pCallback)
+HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd,
+ pPCD_DataOutStageCallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
@@ -566,7 +574,7 @@
}
/**
- * @brief UnRegister the USB PCD Data OUT Stage Callback
+ * @brief Unregister the USB PCD Data OUT Stage Callback
* USB PCD Data OUT Stage Callback is redirected to the weak HAL_PCD_DataOutStageCallback() predefined callback
* @param hpcd PCD handle
* @retval HAL status
@@ -604,7 +612,8 @@
* @param pCallback pointer to the USB PCD Data IN Stage Callback function
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataInStageCallbackTypeDef pCallback)
+HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd,
+ pPCD_DataInStageCallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
@@ -639,7 +648,7 @@
}
/**
- * @brief UnRegister the USB PCD Data IN Stage Callback
+ * @brief Unregister the USB PCD Data IN Stage Callback
* USB PCD Data OUT Stage Callback is redirected to the weak HAL_PCD_DataInStageCallback() predefined callback
* @param hpcd PCD handle
* @retval HAL status
@@ -677,7 +686,8 @@
* @param pCallback pointer to the USB PCD Iso OUT incomplete Callback function
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoOutIncpltCallbackTypeDef pCallback)
+HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd,
+ pPCD_IsoOutIncpltCallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
@@ -712,7 +722,7 @@
}
/**
- * @brief UnRegister the USB PCD Iso OUT incomplete Callback
+ * @brief Unregister the USB PCD Iso OUT incomplete Callback
* USB PCD Iso OUT incomplete Callback is redirected to the weak HAL_PCD_ISOOUTIncompleteCallback() predefined callback
* @param hpcd PCD handle
* @retval HAL status
@@ -750,7 +760,8 @@
* @param pCallback pointer to the USB PCD Iso IN incomplete Callback function
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoInIncpltCallbackTypeDef pCallback)
+HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd,
+ pPCD_IsoInIncpltCallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
@@ -785,7 +796,7 @@
}
/**
- * @brief UnRegister the USB PCD Iso IN incomplete Callback
+ * @brief Unregister the USB PCD Iso IN incomplete Callback
* USB PCD Iso IN incomplete Callback is redirected to the weak HAL_PCD_ISOINIncompleteCallback() predefined callback
* @param hpcd PCD handle
* @retval HAL status
@@ -823,8 +834,8 @@
*/
/** @defgroup PCD_Exported_Functions_Group2 Input and Output operation functions
- * @brief Data transfers functions
- *
+ * @brief Data transfers functions
+ *
@verbatim
===============================================================================
##### IO operation functions #####
@@ -845,12 +856,15 @@
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd)
{
__HAL_LOCK(hpcd);
+ __HAL_PCD_ENABLE(hpcd);
+
#if defined (USB)
HAL_PCDEx_SetConnectionState(hpcd, 1U);
#endif /* defined (USB) */
+
(void)USB_DevConnect(hpcd->Instance);
- __HAL_PCD_ENABLE(hpcd);
__HAL_UNLOCK(hpcd);
+
return HAL_OK;
}
@@ -864,17 +878,21 @@
__HAL_LOCK(hpcd);
__HAL_PCD_DISABLE(hpcd);
- if (USB_StopDevice(hpcd->Instance) != HAL_OK)
- {
- __HAL_UNLOCK(hpcd);
- return HAL_ERROR;
- }
+#if defined (USB)
+ HAL_PCDEx_SetConnectionState(hpcd, 0U);
+#endif /* defined (USB) */
(void)USB_DevDisconnect(hpcd->Instance);
+
+#if defined (USB_OTG_FS)
+ (void)USB_FlushTxFifo(hpcd->Instance, 0x10U);
+#endif /* defined (USB_OTG_FS) */
+
__HAL_UNLOCK(hpcd);
return HAL_OK;
}
+
#if defined (USB_OTG_FS)
/**
* @brief Handles PCD interrupt request.
@@ -904,6 +922,38 @@
__HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_MMIS);
}
+ /* Handle RxQLevel Interrupt */
+ if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL))
+ {
+ USB_MASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL);
+
+ temp = USBx->GRXSTSP;
+
+ ep = &hpcd->OUT_ep[temp & USB_OTG_GRXSTSP_EPNUM];
+
+ if (((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_DATA_UPDT)
+ {
+ if ((temp & USB_OTG_GRXSTSP_BCNT) != 0U)
+ {
+ (void)USB_ReadPacket(USBx, ep->xfer_buff,
+ (uint16_t)((temp & USB_OTG_GRXSTSP_BCNT) >> 4));
+
+ ep->xfer_buff += (temp & USB_OTG_GRXSTSP_BCNT) >> 4;
+ ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4;
+ }
+ }
+ else if (((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_SETUP_UPDT)
+ {
+ (void)USB_ReadPacket(USBx, (uint8_t *)hpcd->Setup, 8U);
+ ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4;
+ }
+ else
+ {
+ /* ... */
+ }
+ USB_UNMASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL);
+ }
+
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_OEPINT))
{
epnum = 0U;
@@ -925,9 +975,9 @@
if ((epint & USB_OTG_DOEPINT_STUP) == USB_OTG_DOEPINT_STUP)
{
+ CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_STUP);
/* Class B setup phase done for previous decoded setup */
(void)PCD_EP_OutSetupPacket_int(hpcd, epnum);
- CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_STUP);
}
if ((epint & USB_OTG_DOEPINT_OTEPDIS) == USB_OTG_DOEPINT_OTEPDIS)
@@ -1042,8 +1092,10 @@
{
USBx_INEP(i)->DIEPINT = 0xFB7FU;
USBx_INEP(i)->DIEPCTL &= ~USB_OTG_DIEPCTL_STALL;
+ USBx_INEP(i)->DIEPCTL |= USB_OTG_DIEPCTL_SNAK;
USBx_OUTEP(i)->DOEPINT = 0xFB7FU;
USBx_OUTEP(i)->DOEPCTL &= ~USB_OTG_DOEPCTL_STALL;
+ USBx_OUTEP(i)->DOEPCTL |= USB_OTG_DOEPCTL_SNAK;
}
USBx_DEVICE->DAINTMSK |= 0x10001U;
@@ -1099,38 +1151,6 @@
__HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_ENUMDNE);
}
- /* Handle RxQLevel Interrupt */
- if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL))
- {
- USB_MASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL);
-
- temp = USBx->GRXSTSP;
-
- ep = &hpcd->OUT_ep[temp & USB_OTG_GRXSTSP_EPNUM];
-
- if (((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_DATA_UPDT)
- {
- if ((temp & USB_OTG_GRXSTSP_BCNT) != 0U)
- {
- (void)USB_ReadPacket(USBx, ep->xfer_buff,
- (uint16_t)((temp & USB_OTG_GRXSTSP_BCNT) >> 4));
-
- ep->xfer_buff += (temp & USB_OTG_GRXSTSP_BCNT) >> 4;
- ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4;
- }
- }
- else if (((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_SETUP_UPDT)
- {
- (void)USB_ReadPacket(USBx, (uint8_t *)hpcd->Setup, 8U);
- ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4;
- }
- else
- {
- /* ... */
- }
- USB_UNMASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL);
- }
-
/* Handle SOF Interrupt */
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_SOF))
{
@@ -1204,6 +1224,18 @@
}
}
}
+
+
+/**
+ * @brief Handles PCD Wakeup interrupt request.
+ * @param hpcd PCD handle
+ * @retval HAL status
+ */
+void HAL_PCD_WKUP_IRQHandler(PCD_HandleTypeDef *hpcd)
+{
+ /* Clear EXTI pending Bit */
+ __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG();
+}
#endif /* defined (USB_OTG_FS) */
#if defined (USB)
@@ -1214,6 +1246,9 @@
*/
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
{
+ uint16_t store_ep[8];
+ uint8_t i;
+
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_CTR))
{
/* servicing of the endpoint correct transfer interrupt */
@@ -1260,19 +1295,41 @@
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_SUSP))
{
+ /* WA: To Clear Wakeup flag if raised with suspend signal */
+
+ /* Store Endpoint register */
+ for (i = 0U; i < 8U; i++)
+ {
+ store_ep[i] = PCD_GET_ENDPOINT(hpcd->Instance, i);
+ }
+
+ /* FORCE RESET */
+ hpcd->Instance->CNTR |= (uint16_t)(USB_CNTR_FRES);
+
+ /* CLEAR RESET */
+ hpcd->Instance->CNTR &= (uint16_t)(~USB_CNTR_FRES);
+
+ /* wait for reset flag in ISTR */
+ while ((hpcd->Instance->ISTR & USB_ISTR_RESET) == 0U)
+ {
+ }
+
+ /* Clear Reset Flag */
+ __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
+
+ /* Restore Registre */
+ for (i = 0U; i < 8U; i++)
+ {
+ PCD_SET_ENDPOINT(hpcd->Instance, i, store_ep[i]);
+ }
+
/* Force low-power mode in the macrocell */
- hpcd->Instance->CNTR |= USB_CNTR_FSUSP;
+ hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_FSUSP;
/* clear of the ISTR bit must be done after setting of CNTR_FSUSP */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SUSP);
- hpcd->Instance->CNTR |= USB_CNTR_LP_MODE;
-
- /* WA: Clear Wakeup flag if raised with suspend signal */
- if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_WKUP))
- {
- __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP);
- }
+ hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_LP_MODE;
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SuspendCallback(hpcd);
@@ -1298,6 +1355,18 @@
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ESOF);
}
}
+
+
+/**
+ * @brief Handles PCD Wakeup interrupt request.
+ * @param hpcd PCD handle
+ * @retval HAL status
+ */
+void HAL_PCD_WKUP_IRQHandler(PCD_HandleTypeDef *hpcd)
+{
+ /* Clear EXTI pending Bit */
+ __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG();
+}
#endif /* defined (USB) */
/**
@@ -1477,8 +1546,8 @@
*/
/** @defgroup PCD_Exported_Functions_Group3 Peripheral Control functions
- * @brief management functions
- *
+ * @brief management functions
+ *
@verbatim
===============================================================================
##### Peripheral Control functions #####
@@ -1499,11 +1568,14 @@
HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd)
{
__HAL_LOCK(hpcd);
+
#if defined (USB)
HAL_PCDEx_SetConnectionState(hpcd, 1U);
#endif /* defined (USB) */
+
(void)USB_DevConnect(hpcd->Instance);
__HAL_UNLOCK(hpcd);
+
return HAL_OK;
}
@@ -1515,11 +1587,14 @@
HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd)
{
__HAL_LOCK(hpcd);
+
#if defined (USB)
HAL_PCDEx_SetConnectionState(hpcd, 0U);
#endif /* defined (USB) */
+
(void)USB_DevDisconnect(hpcd->Instance);
__HAL_UNLOCK(hpcd);
+
return HAL_OK;
}
@@ -1535,6 +1610,7 @@
hpcd->USB_Address = address;
(void)USB_SetDevAddress(hpcd->Instance, address);
__HAL_UNLOCK(hpcd);
+
return HAL_OK;
}
/**
@@ -1545,7 +1621,8 @@
* @param ep_type endpoint type
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type)
+HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
+ uint16_t ep_mps, uint8_t ep_type)
{
HAL_StatusTypeDef ret = HAL_OK;
PCD_EPTypeDef *ep;
@@ -1672,6 +1749,10 @@
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
ep->xfer_len = len;
+#if defined (USB)
+ ep->xfer_fill_db = 1U;
+ ep->xfer_len_db = len;
+#endif /* defined (USB) */
ep->xfer_count = 0U;
ep->is_in = 1U;
ep->num = ep_addr & EP_ADDR_MSK;
@@ -1720,10 +1801,12 @@
__HAL_LOCK(hpcd);
(void)USB_EPSetStall(hpcd->Instance, ep);
+
if ((ep_addr & EP_ADDR_MSK) == 0U)
{
(void)USB_EP0_OutStart(hpcd->Instance, (uint8_t *)hpcd->Setup);
}
+
__HAL_UNLOCK(hpcd);
return HAL_OK;
@@ -1814,8 +1897,8 @@
*/
/** @defgroup PCD_Exported_Functions_Group4 Peripheral State functions
- * @brief Peripheral State functions
- *
+ * @brief Peripheral State functions
+ *
@verbatim
===============================================================================
##### Peripheral State functions #####
@@ -1970,8 +2053,7 @@
uint32_t gSNPSiD = *(__IO uint32_t *)(&USBx->CID + 0x1U);
uint32_t DoepintReg = USBx_OUTEP(epnum)->DOEPINT;
-
- if ((gSNPSiD == USB_OTG_CORE_ID_310A) &&
+ if ((gSNPSiD > USB_OTG_CORE_ID_300A) &&
((DoepintReg & USB_OTG_DOEPINT_STPKTRX) == USB_OTG_DOEPINT_STPKTRX))
{
CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_STPKTRX);
@@ -1997,15 +2079,14 @@
static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
{
PCD_EPTypeDef *ep;
- uint16_t count;
- uint16_t wIstr;
- uint16_t wEPVal;
+ uint16_t count, wIstr, wEPVal, TxByteNbre;
uint8_t epindex;
/* stay in loop while pending interrupts */
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
{
wIstr = hpcd->Instance->ISTR;
+
/* extract highest priority endpoint number */
epindex = (uint8_t)(wIstr & USB_ISTR_EP_ID);
@@ -2018,8 +2099,8 @@
{
/* DIR = 0 */
- /* DIR = 0 => IN int */
- /* DIR = 0 implies that (EP_CTR_TX = 1) always */
+ /* DIR = 0 => IN int */
+ /* DIR = 0 implies that (EP_CTR_TX = 1) always */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, PCD_ENDP0);
ep = &hpcd->IN_ep[0];
@@ -2043,20 +2124,20 @@
{
/* DIR = 1 */
- /* DIR = 1 & CTR_RX => SETUP or OUT int */
+ /* DIR = 1 & CTR_RX => SETUP or OUT int */
/* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */
ep = &hpcd->OUT_ep[0];
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
if ((wEPVal & USB_EP_SETUP) != 0U)
{
- /* Get SETUP Packet*/
+ /* Get SETUP Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
ep->pmaadress, (uint16_t)ep->xfer_count);
- /* SETUP bit kept frozen while CTR_RX = 1*/
+ /* SETUP bit kept frozen while CTR_RX = 1 */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
/* Process SETUP Packet*/
@@ -2066,12 +2147,11 @@
HAL_PCD_SetupStageCallback(hpcd);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
-
else if ((wEPVal & USB_EP_CTR_RX) != 0U)
{
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
- /* Get Control Data OUT Packet*/
+ /* Get Control Data OUT Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
if ((ep->xfer_count != 0U) && (ep->xfer_buff != 0U))
@@ -2081,7 +2161,7 @@
ep->xfer_buff += ep->xfer_count;
- /* Process Control Data OUT Packet*/
+ /* Process Control Data OUT Packet */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, 0U);
#else
@@ -2096,20 +2176,21 @@
}
else
{
- /* Decode and service non control endpoints interrupt */
-
+ /* Decode and service non control endpoints interrupt */
/* process related endpoint register */
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, epindex);
+
if ((wEPVal & USB_EP_CTR_RX) != 0U)
{
/* clear int flag */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, epindex);
ep = &hpcd->OUT_ep[epindex];
- /* OUT double Buffering*/
+ /* OUT Single Buffering */
if (ep->doublebuffer == 0U)
{
count = (uint16_t)PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
+
if (count != 0U)
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, count);
@@ -2117,28 +2198,39 @@
}
else
{
- if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX) != 0U)
+ /* manage double buffer bulk out */
+ if (ep->type == EP_TYPE_BULK)
{
- /*read from endpoint BUF0Addr buffer*/
- count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
- if (count != 0U)
+ count = HAL_PCD_EP_DB_Receive(hpcd, ep, wEPVal);
+ }
+ else /* manage double buffer iso out */
+ {
+ /* free EP OUT Buffer */
+ PCD_FreeUserBuffer(hpcd->Instance, ep->num, 0U);
+
+ if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX) != 0U)
{
- USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
+ /* read from endpoint BUF0Addr buffer */
+ count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
+
+ if (count != 0U)
+ {
+ USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
+ }
+ }
+ else
+ {
+ /* read from endpoint BUF1Addr buffer */
+ count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
+
+ if (count != 0U)
+ {
+ USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
+ }
}
}
- else
- {
- /*read from endpoint BUF1Addr buffer*/
- count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
- if (count != 0U)
- {
- USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
- }
- }
- /* free EP OUT Buffer */
- PCD_FreeUserBuffer(hpcd->Instance, ep->num, 0U);
}
- /*multi-packet on the NON control OUT endpoint*/
+ /* multi-packet on the NON control OUT endpoint */
ep->xfer_count += count;
ep->xfer_buff += count;
@@ -2153,10 +2245,10 @@
}
else
{
- (void)HAL_PCD_EP_Receive(hpcd, ep->num, ep->xfer_buff, ep->xfer_len);
+ (void) USB_EPStartXfer(hpcd->Instance, ep);
}
- } /* if((wEPVal & EP_CTR_RX) */
+ }
if ((wEPVal & USB_EP_CTR_TX) != 0U)
{
@@ -2165,29 +2257,294 @@
/* clear int flag */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, epindex);
- /*multi-packet on the NON control IN endpoint*/
- ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
- ep->xfer_buff += ep->xfer_count;
-
- /* Zero Length Packet? */
- if (ep->xfer_len == 0U)
+ /* Manage all non bulk transaction or Bulk Single Buffer Transaction */
+ if ((ep->type != EP_TYPE_BULK) ||
+ ((ep->type == EP_TYPE_BULK) && ((wEPVal & USB_EP_KIND) == 0U)))
{
- /* TX COMPLETE */
+ /* multi-packet on the NON control IN endpoint */
+ TxByteNbre = (uint16_t)PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
+
+ if (ep->xfer_len > TxByteNbre)
+ {
+ ep->xfer_len -= TxByteNbre;
+ }
+ else
+ {
+ ep->xfer_len = 0U;
+ }
+
+ /* Zero Length Packet? */
+ if (ep->xfer_len == 0U)
+ {
+ /* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
- hpcd->DataInStageCallback(hpcd, ep->num);
+ hpcd->DataInStageCallback(hpcd, ep->num);
#else
- HAL_PCD_DataInStageCallback(hpcd, ep->num);
+ HAL_PCD_DataInStageCallback(hpcd, ep->num);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+ }
+ else
+ {
+ /* Transfer is not yet Done */
+ ep->xfer_buff += TxByteNbre;
+ ep->xfer_count += TxByteNbre;
+ (void)USB_EPStartXfer(hpcd->Instance, ep);
+ }
}
+ /* bulk in double buffer enable in case of transferLen> Ep_Mps */
else
{
- (void)HAL_PCD_EP_Transmit(hpcd, ep->num, ep->xfer_buff, ep->xfer_len);
+ (void)HAL_PCD_EP_DB_Transmit(hpcd, ep, wEPVal);
}
}
}
}
+
return HAL_OK;
}
+
+
+/**
+ * @brief Manage double buffer bulk out transaction from ISR
+ * @param hpcd PCD handle
+ * @param ep current endpoint handle
+ * @param wEPVal Last snapshot of EPRx register value taken in ISR
+ * @retval HAL status
+ */
+static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd,
+ PCD_EPTypeDef *ep, uint16_t wEPVal)
+{
+ uint16_t count;
+
+ /* Manage Buffer0 OUT */
+ if ((wEPVal & USB_EP_DTOG_RX) != 0U)
+ {
+ /* Get count of received Data on buffer0 */
+ count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
+
+ if (ep->xfer_len >= count)
+ {
+ ep->xfer_len -= count;
+ }
+ else
+ {
+ ep->xfer_len = 0U;
+ }
+
+ if (ep->xfer_len == 0U)
+ {
+ /* set NAK to OUT endpoint since double buffer is enabled */
+ PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
+ }
+
+ /* Check if Buffer1 is in blocked sate which requires to toggle */
+ if ((wEPVal & USB_EP_DTOG_TX) != 0U)
+ {
+ PCD_FreeUserBuffer(hpcd->Instance, ep->num, 0U);
+ }
+
+ if (count != 0U)
+ {
+ USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
+ }
+ }
+ /* Manage Buffer 1 DTOG_RX=0 */
+ else
+ {
+ /* Get count of received data */
+ count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
+
+ if (ep->xfer_len >= count)
+ {
+ ep->xfer_len -= count;
+ }
+ else
+ {
+ ep->xfer_len = 0U;
+ }
+
+ if (ep->xfer_len == 0U)
+ {
+ /* set NAK on the current endpoint */
+ PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
+ }
+
+ /*Need to FreeUser Buffer*/
+ if ((wEPVal & USB_EP_DTOG_TX) == 0U)
+ {
+ PCD_FreeUserBuffer(hpcd->Instance, ep->num, 0U);
+ }
+
+ if (count != 0U)
+ {
+ USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
+ }
+ }
+
+ return count;
+}
+
+
+/**
+ * @brief Manage double buffer bulk IN transaction from ISR
+ * @param hpcd PCD handle
+ * @param ep current endpoint handle
+ * @param wEPVal Last snapshot of EPRx register value taken in ISR
+ * @retval HAL status
+ */
+static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd,
+ PCD_EPTypeDef *ep, uint16_t wEPVal)
+{
+ uint32_t len;
+ uint16_t TxByteNbre;
+
+ /* Data Buffer0 ACK received */
+ if ((wEPVal & USB_EP_DTOG_TX) != 0U)
+ {
+ /* multi-packet on the NON control IN endpoint */
+ TxByteNbre = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
+
+ if (ep->xfer_len > TxByteNbre)
+ {
+ ep->xfer_len -= TxByteNbre;
+ }
+ else
+ {
+ ep->xfer_len = 0U;
+ }
+ /* Transfer is completed */
+ if (ep->xfer_len == 0U)
+ {
+ /* TX COMPLETE */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+ hpcd->DataInStageCallback(hpcd, ep->num);
+#else
+ HAL_PCD_DataInStageCallback(hpcd, ep->num);
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+
+ if ((wEPVal & USB_EP_DTOG_RX) != 0U)
+ {
+ PCD_FreeUserBuffer(hpcd->Instance, ep->num, 1U);
+ }
+ }
+ else /* Transfer is not yet Done */
+ {
+ /* need to Free USB Buff */
+ if ((wEPVal & USB_EP_DTOG_RX) != 0U)
+ {
+ PCD_FreeUserBuffer(hpcd->Instance, ep->num, 1U);
+ }
+
+ /* Still there is data to Fill in the next Buffer */
+ if (ep->xfer_fill_db == 1U)
+ {
+ ep->xfer_buff += TxByteNbre;
+ ep->xfer_count += TxByteNbre;
+
+ /* Calculate the len of the new buffer to fill */
+ if (ep->xfer_len_db >= ep->maxpacket)
+ {
+ len = ep->maxpacket;
+ ep->xfer_len_db -= len;
+ }
+ else if (ep->xfer_len_db == 0U)
+ {
+ len = TxByteNbre;
+ ep->xfer_fill_db = 0U;
+ }
+ else
+ {
+ ep->xfer_fill_db = 0U;
+ len = ep->xfer_len_db;
+ ep->xfer_len_db = 0U;
+ }
+
+ /* Write remaining Data to Buffer */
+ /* Set the Double buffer counter for pma buffer1 */
+ PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, len);
+
+ /* Copy user buffer to USB PMA */
+ USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, (uint16_t)len);
+ }
+ }
+ }
+ else /* Data Buffer1 ACK received */
+ {
+ /* multi-packet on the NON control IN endpoint */
+ TxByteNbre = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
+
+ if (ep->xfer_len >= TxByteNbre)
+ {
+ ep->xfer_len -= TxByteNbre;
+ }
+ else
+ {
+ ep->xfer_len = 0U;
+ }
+
+ /* Transfer is completed */
+ if (ep->xfer_len == 0U)
+ {
+ /* TX COMPLETE */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+ hpcd->DataInStageCallback(hpcd, ep->num);
+#else
+ HAL_PCD_DataInStageCallback(hpcd, ep->num);
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+
+ /*need to Free USB Buff*/
+ if ((wEPVal & USB_EP_DTOG_RX) == 0U)
+ {
+ PCD_FreeUserBuffer(hpcd->Instance, ep->num, 1U);
+ }
+ }
+ else /* Transfer is not yet Done */
+ {
+ /* need to Free USB Buff */
+ if ((wEPVal & USB_EP_DTOG_RX) == 0U)
+ {
+ PCD_FreeUserBuffer(hpcd->Instance, ep->num, 1U);
+ }
+
+ /* Still there is data to Fill in the next Buffer */
+ if (ep->xfer_fill_db == 1U)
+ {
+ ep->xfer_buff += TxByteNbre;
+ ep->xfer_count += TxByteNbre;
+
+ /* Calculate the len of the new buffer to fill */
+ if (ep->xfer_len_db >= ep->maxpacket)
+ {
+ len = ep->maxpacket;
+ ep->xfer_len_db -= len;
+ }
+ else if (ep->xfer_len_db == 0U)
+ {
+ len = TxByteNbre;
+ ep->xfer_fill_db = 0U;
+ }
+ else
+ {
+ len = ep->xfer_len_db;
+ ep->xfer_len_db = 0U;
+ ep->xfer_fill_db = 0;
+ }
+
+ /* Set the Double buffer counter for pmabuffer1 */
+ PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, len);
+
+ /* Copy the user buffer to USB PMA */
+ USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, (uint16_t)len);
+ }
+ }
+ }
+
+ /*enable endpoint IN*/
+ PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_VALID);
+
+ return HAL_OK;
+}
+
#endif /* defined (USB) */
/**
diff --git a/Src/stm32f1xx_hal_pcd_ex.c b/Src/stm32f1xx_hal_pcd_ex.c
index a20cfb0..42e135c 100644
--- a/Src/stm32f1xx_hal_pcd_ex.c
+++ b/Src/stm32f1xx_hal_pcd_ex.c
@@ -49,7 +49,7 @@
/** @defgroup PCDEx_Exported_Functions_Group1 Peripheral Control functions
* @brief PCDEx control functions
- *
+ *
@verbatim
===============================================================================
##### Extended features functions #####
@@ -135,10 +135,8 @@
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd,
- uint16_t ep_addr,
- uint16_t ep_kind,
- uint32_t pmaadress)
+HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr,
+ uint16_t ep_kind, uint32_t pmaadress)
{
PCD_EPTypeDef *ep;
@@ -176,8 +174,8 @@
* @brief Software Device Connection,
* this function is not required by USB OTG FS peripheral, it is used
* only by USB Device FS peripheral.
- * @param hpcd: PCD handle
- * @param state: connection state (0 : disconnected / 1: connected)
+ * @param hpcd PCD handle
+ * @param state connection state (0 : disconnected / 1: connected)
* @retval None
*/
__weak void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
diff --git a/Src/stm32f1xx_hal_timebase_rtc_alarm_template.c b/Src/stm32f1xx_hal_timebase_rtc_alarm_template.c
index f480062..8802042 100644
--- a/Src/stm32f1xx_hal_timebase_rtc_alarm_template.c
+++ b/Src/stm32f1xx_hal_timebase_rtc_alarm_template.c
@@ -89,6 +89,7 @@
RCC_OscInitTypeDef RCC_OscInitStruct;
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
+ HAL_StatusTypeDef status;
#ifdef RTC_CLOCK_SOURCE_LSE
/* Configue LSE as RTC clock soucre */
@@ -111,76 +112,94 @@
#else
#error Please select the RTC Clock source
#endif /* RTC_CLOCK_SOURCE_LSE */
-
- if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK)
+ status = HAL_RCC_OscConfig(&RCC_OscInitStruct);
+ if (status == HAL_OK)
{
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC;
- if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) == HAL_OK)
+ status = HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
+ if (status == HAL_OK)
{
/* Enable RTC Clock */
__HAL_RCC_RTC_ENABLE();
- hRTC_Handle.Instance = RTC;
/* Configure RTC time base to 10Khz */
+ hRTC_Handle.Instance = RTC;
hRTC_Handle.Init.AsynchPrediv = (HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_RTC) / 10000) - 1;
hRTC_Handle.Init.OutPut = RTC_OUTPUTSOURCE_NONE;
- HAL_RTC_Init(&hRTC_Handle);
-
- /* Disable the write protection for RTC registers */
- __HAL_RTC_WRITEPROTECTION_DISABLE(&hRTC_Handle);
-
- /* Clear flag alarm A */
- __HAL_RTC_ALARM_CLEAR_FLAG(&hRTC_Handle, RTC_FLAG_ALRAF);
-
- counter = 0U;
- /* Wait till RTC ALRAF flag is set and if Time out is reached exit */
- while (__HAL_RTC_ALARM_GET_FLAG(&hRTC_Handle, RTC_FLAG_ALRAF) != RESET)
- {
- if (counter++ == SystemCoreClock / 48U) /* Timeout = ~ 1s */
- {
- return HAL_ERROR;
- }
- }
-
- /* Set RTC COUNTER MSB word */
- hRTC_Handle.Instance->ALRH = 0x00U;
- /* Set RTC COUNTER LSB word */
- hRTC_Handle.Instance->ALRL = 0x09U;
-
- /* RTC Alarm Interrupt Configuration: EXTI configuration */
- __HAL_RTC_ALARM_EXTI_ENABLE_IT();
- __HAL_RTC_ALARM_EXTI_ENABLE_RISING_EDGE();
-
- /* Clear Second and overflow flags */
- CLEAR_BIT(hRTC_Handle.Instance->CRL, (RTC_FLAG_SEC | RTC_FLAG_OW));
-
- /* Set RTC COUNTER MSB word */
- hRTC_Handle.Instance->CNTH = 0x00U;
- /* Set RTC COUNTER LSB word */
- hRTC_Handle.Instance->CNTL = 0x00U;
-
- /* Configure the Alarm interrupt */
- __HAL_RTC_ALARM_ENABLE_IT(&hRTC_Handle, RTC_IT_ALRA);
-
- /* Enable the write protection for RTC registers */
- __HAL_RTC_WRITEPROTECTION_ENABLE(&hRTC_Handle);
-
- /* Wait till RTC is in INIT state and if Time out is reached exit */
- counter = 0U;
- while ((hRTC_Handle.Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET)
- {
- if (counter++ == SystemCoreClock / 48U) /* Timeout = ~ 1s */
- {
- return HAL_ERROR;
- }
- }
-
- HAL_NVIC_SetPriority(RTC_Alarm_IRQn, TickPriority, 0U);
- HAL_NVIC_EnableIRQ(RTC_Alarm_IRQn);
- return HAL_OK;
+ status = HAL_RTC_Init(&hRTC_Handle);
}
}
- return HAL_ERROR;
+ if (status == HAL_OK)
+ {
+ /* Disable the write protection for RTC registers */
+ __HAL_RTC_WRITEPROTECTION_DISABLE(&hRTC_Handle);
+
+ /* Clear flag alarm A */
+ __HAL_RTC_ALARM_CLEAR_FLAG(&hRTC_Handle, RTC_FLAG_ALRAF);
+
+ counter = 0U;
+ /* Wait till RTC ALRAF flag is set and if Time out is reached exit */
+ while (__HAL_RTC_ALARM_GET_FLAG(&hRTC_Handle, RTC_FLAG_ALRAF) != RESET)
+ {
+ if (counter++ == SystemCoreClock / 48U) /* Timeout = ~ 1s */
+ {
+ status = HAL_ERROR;
+ }
+ }
+ }
+ if (status == HAL_OK)
+ {
+ /* Set RTC COUNTER MSB word */
+ hRTC_Handle.Instance->ALRH = 0x00U;
+ /* Set RTC COUNTER LSB word */
+ hRTC_Handle.Instance->ALRL = 0x09U;
+
+ /* RTC Alarm Interrupt Configuration: EXTI configuration */
+ __HAL_RTC_ALARM_EXTI_ENABLE_IT();
+ __HAL_RTC_ALARM_EXTI_ENABLE_RISING_EDGE();
+
+ /* Clear Second and overflow flags */
+ CLEAR_BIT(hRTC_Handle.Instance->CRL, (RTC_FLAG_SEC | RTC_FLAG_OW));
+
+ /* Set RTC COUNTER MSB word */
+ hRTC_Handle.Instance->CNTH = 0x00U;
+ /* Set RTC COUNTER LSB word */
+ hRTC_Handle.Instance->CNTL = 0x00U;
+
+ /* Configure the Alarm interrupt */
+ __HAL_RTC_ALARM_ENABLE_IT(&hRTC_Handle, RTC_IT_ALRA);
+
+ /* Enable the write protection for RTC registers */
+ __HAL_RTC_WRITEPROTECTION_ENABLE(&hRTC_Handle);
+
+ /* Wait till RTC is in INIT state and if Time out is reached exit */
+ counter = 0U;
+ while ((hRTC_Handle.Instance->CRL & RTC_CRL_RTOFF) == (uint32_t)RESET)
+ {
+ if (counter++ == SystemCoreClock / 48U) /* Timeout = ~ 1s */
+ {
+ status = HAL_ERROR;
+ }
+ }
+ }
+ if (status == HAL_OK)
+ {
+ /* Enable the RTC global Interrupt */
+ HAL_NVIC_EnableIRQ(RTC_Alarm_IRQn);
+
+ /* Configure the SysTick IRQ priority */
+ if (TickPriority < (1UL << __NVIC_PRIO_BITS))
+ {
+ HAL_NVIC_SetPriority(RTC_Alarm_IRQn, TickPriority ,0U);
+ uwTickPrio = TickPriority;
+ }
+ else
+ {
+ status = HAL_ERROR;
+ }
+ }
+
+ return status;
}
/**
diff --git a/Src/stm32f1xx_hal_timebase_tim_template.c b/Src/stm32f1xx_hal_timebase_tim_template.c
index e3dd8e4..1c4a1f3 100644
--- a/Src/stm32f1xx_hal_timebase_tim_template.c
+++ b/Src/stm32f1xx_hal_timebase_tim_template.c
@@ -58,12 +58,8 @@
uint32_t uwTimclock, uwAPB1Prescaler = 0U;
uint32_t uwPrescalerValue = 0U;
uint32_t pFLatency;
+ HAL_StatusTypeDef status = HAL_OK;
- /*Configure the TIM2 IRQ priority */
- HAL_NVIC_SetPriority(TIM2_IRQn, TickPriority, 0U);
-
- /* Enable the TIM2 global Interrupt */
- HAL_NVIC_EnableIRQ(TIM2_IRQn);
/* Enable TIM2 clock */
__HAL_RCC_TIM2_CLK_ENABLE();
@@ -101,14 +97,31 @@
TimHandle.Init.ClockDivision = 0U;
TimHandle.Init.CounterMode = TIM_COUNTERMODE_UP;
TimHandle.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- if (HAL_TIM_Base_Init(&TimHandle) == HAL_OK)
+ status = HAL_TIM_Base_Init(&TimHandle);
+ if (status == HAL_OK)
{
/* Start the TIM time Base generation in interrupt mode */
- return HAL_TIM_Base_Start_IT(&TimHandle);
+ status = HAL_TIM_Base_Start_IT(&TimHandle);
+ if (status == HAL_OK)
+ {
+ /* Enable the TIM2 global Interrupt */
+ HAL_NVIC_EnableIRQ(TIM2_IRQn);
+
+ if (TickPriority < (1UL << __NVIC_PRIO_BITS))
+ {
+ /*Configure the TIM2 IRQ priority */
+ HAL_NVIC_SetPriority(TIM2_IRQn, TickPriority ,0);
+ uwTickPrio = TickPriority;
+ }
+ else
+ {
+ status = HAL_ERROR;
+ }
+ }
}
/* Return function status */
- return HAL_ERROR;
+ return status;
}
/**
diff --git a/Src/stm32f1xx_ll_usb.c b/Src/stm32f1xx_ll_usb.c
index 252baac..0b89546 100644
--- a/Src/stm32f1xx_ll_usb.c
+++ b/Src/stm32f1xx_ll_usb.c
@@ -61,8 +61,8 @@
*/
/** @defgroup USB_LL_Exported_Functions_Group1 Initialization/de-initialization functions
- * @brief Initialization and Configuration functions
- *
+ * @brief Initialization and Configuration functions
+ *
@verbatim
===============================================================================
##### Initialization/de-initialization functions #####
@@ -104,7 +104,7 @@
/* Select FS Embedded PHY */
USBx->GUSBCFG |= USB_OTG_GUSBCFG_PHYSEL;
- /* Reset after a PHY select and set Host mode */
+ /* Reset after a PHY select */
ret = USB_CoreReset(USBx);
/* Activate the USB Transceiver */
@@ -211,7 +211,7 @@
* Disable the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
-*/
+ */
HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx)
{
USBx->GAHBCFG &= ~USB_OTG_GAHBCFG_GINT;
@@ -219,13 +219,12 @@
}
/**
- * @brief USB_SetCurrentMode : Set functional mode
+ * @brief USB_SetCurrentMode Set functional mode
* @param USBx Selected device
- * @param mode current core mode
+ * @param mode current core mode
* This parameter can be one of these values:
- * @arg USB_DEVICE_MODE: Peripheral mode
- * @arg USB_HOST_MODE: Host mode
- * @arg USB_DRD_MODE: Dual Role Device mode
+ * @arg USB_DEVICE_MODE Peripheral mode
+ * @arg USB_HOST_MODE Host mode
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx, USB_ModeTypeDef mode)
@@ -250,7 +249,7 @@
}
/**
- * @brief USB_DevInit : Initializes the USB_OTG controller registers
+ * @brief USB_DevInit Initializes the USB_OTG controller registers
* for device mode
* @param USBx Selected device
* @param cfg pointer to a USB_OTG_CfgTypeDef structure that contains
@@ -390,8 +389,7 @@
{
return HAL_TIMEOUT;
}
- }
- while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_TXFFLSH) == USB_OTG_GRSTCTL_TXFFLSH);
+ } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_TXFFLSH) == USB_OTG_GRSTCTL_TXFFLSH);
return HAL_OK;
}
@@ -413,8 +411,7 @@
{
return HAL_TIMEOUT;
}
- }
- while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_RXFFLSH) == USB_OTG_GRSTCTL_RXFFLSH);
+ } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_RXFFLSH) == USB_OTG_GRSTCTL_RXFFLSH);
return HAL_OK;
}
@@ -553,6 +550,12 @@
/* Read DEPCTLn register */
if (ep->is_in == 1U)
{
+ if ((USBx_INEP(epnum)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA)
+ {
+ USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_SNAK;
+ USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_EPDIS;
+ }
+
USBx_DEVICE->DEACHMSK &= ~(USB_OTG_DAINTMSK_IEPM & (uint32_t)(1UL << (ep->num & EP_ADDR_MSK)));
USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_IEPM & (uint32_t)(1UL << (ep->num & EP_ADDR_MSK)));
USBx_INEP(epnum)->DIEPCTL &= ~(USB_OTG_DIEPCTL_USBAEP |
@@ -563,6 +566,12 @@
}
else
{
+ if ((USBx_OUTEP(epnum)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA)
+ {
+ USBx_OUTEP(epnum)->DOEPCTL |= USB_OTG_DOEPCTL_SNAK;
+ USBx_OUTEP(epnum)->DOEPCTL |= USB_OTG_DOEPCTL_EPDIS;
+ }
+
USBx_DEVICE->DEACHMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((uint32_t)(1UL << (ep->num & EP_ADDR_MSK)) << 16));
USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((uint32_t)(1UL << (ep->num & EP_ADDR_MSK)) << 16));
USBx_OUTEP(epnum)->DOEPCTL &= ~(USB_OTG_DOEPCTL_USBAEP |
@@ -588,11 +597,23 @@
/* Read DEPCTLn register */
if (ep->is_in == 1U)
{
+ if ((USBx_INEP(epnum)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA)
+ {
+ USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_SNAK;
+ USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_EPDIS;
+ }
+
USBx_INEP(epnum)->DIEPCTL &= ~ USB_OTG_DIEPCTL_USBAEP;
USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_IEPM & (uint32_t)(1UL << (ep->num & EP_ADDR_MSK)));
}
else
{
+ if ((USBx_OUTEP(epnum)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA)
+ {
+ USBx_OUTEP(epnum)->DOEPCTL |= USB_OTG_DOEPCTL_SNAK;
+ USBx_OUTEP(epnum)->DOEPCTL |= USB_OTG_DOEPCTL_EPDIS;
+ }
+
USBx_OUTEP(epnum)->DOEPCTL &= ~USB_OTG_DOEPCTL_USBAEP;
USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((uint32_t)(1UL << (ep->num & EP_ADDR_MSK)) << 16));
}
@@ -785,7 +806,8 @@
* @param len Number of bytes to write
* @retval HAL status
*/
-HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len)
+HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src,
+ uint8_t ch_ep_num, uint16_t len)
{
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t *pSrc = (uint32_t *)src;
@@ -942,7 +964,7 @@
}
/**
- * @brief USB_DevConnect : Connect the USB device by enabling the pull-up/pull-down
+ * @brief USB_DevConnect : Connect the USB device by enabling Rpu
* @param USBx Selected device
* @retval HAL status
*/
@@ -950,14 +972,16 @@
{
uint32_t USBx_BASE = (uint32_t)USBx;
+ /* In case phy is stopped, ensure to ungate and restore the phy CLK */
+ USBx_PCGCCTL &= ~(USB_OTG_PCGCCTL_STOPCLK | USB_OTG_PCGCCTL_GATECLK);
+
USBx_DEVICE->DCTL &= ~USB_OTG_DCTL_SDIS;
- HAL_Delay(3U);
return HAL_OK;
}
/**
- * @brief USB_DevDisconnect : Disconnect the USB device by disabling the pull-up/pull-down
+ * @brief USB_DevDisconnect : Disconnect the USB device by disabling Rpu
* @param USBx Selected device
* @retval HAL status
*/
@@ -965,8 +989,10 @@
{
uint32_t USBx_BASE = (uint32_t)USBx;
+ /* In case phy is stopped, ensure to ungate and restore the phy CLK */
+ USBx_PCGCCTL &= ~(USB_OTG_PCGCCTL_STOPCLK | USB_OTG_PCGCCTL_GATECLK);
+
USBx_DEVICE->DCTL |= USB_OTG_DCTL_SDIS;
- HAL_Delay(3U);
return HAL_OK;
}
@@ -1059,7 +1085,7 @@
/**
* @brief USB_ClearInterrupts: clear a USB interrupt
* @param USBx Selected device
- * @param interrupt interrupt flag
+ * @param interrupt flag
* @retval None
*/
void USB_ClearInterrupts(USB_OTG_GlobalTypeDef *USBx, uint32_t interrupt)
@@ -1141,8 +1167,7 @@
{
return HAL_TIMEOUT;
}
- }
- while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0U);
+ } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0U);
/* Core Soft Reset */
count = 0U;
@@ -1154,8 +1179,7 @@
{
return HAL_TIMEOUT;
}
- }
- while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST);
+ } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST);
return HAL_OK;
}
@@ -1253,7 +1277,7 @@
}
/**
-* @brief USB_OTG_ResetPort : Reset Host Port
+ * @brief USB_OTG_ResetPort : Reset Host Port
* @param USBx Selected device
* @retval HAL status
* @note (1)The application must wait at least 10 ms
@@ -1282,10 +1306,10 @@
* @brief USB_DriveVbus : activate or de-activate vbus
* @param state VBUS state
* This parameter can be one of these values:
- * 0 : VBUS Active
- * 1 : VBUS Inactive
+ * 0 : Deactivate VBUS
+ * 1 : Activate VBUS
* @retval HAL status
-*/
+ */
HAL_StatusTypeDef USB_DriveVbus(USB_OTG_GlobalTypeDef *USBx, uint8_t state)
{
uint32_t USBx_BASE = (uint32_t)USBx;
@@ -1328,7 +1352,7 @@
* @brief Return Host Current Frame number
* @param USBx Selected device
* @retval current frame number
-*/
+ */
uint32_t USB_GetCurrentFrame(USB_OTG_GlobalTypeDef *USBx)
{
uint32_t USBx_BASE = (uint32_t)USBx;
@@ -1359,13 +1383,9 @@
* This parameter can be a value from 0 to32K
* @retval HAL state
*/
-HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx,
- uint8_t ch_num,
- uint8_t epnum,
- uint8_t dev_address,
- uint8_t speed,
- uint8_t ep_type,
- uint16_t mps)
+HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx, uint8_t ch_num,
+ uint8_t epnum, uint8_t dev_address, uint8_t speed,
+ uint8_t ep_type, uint16_t mps)
{
HAL_StatusTypeDef ret = HAL_OK;
uint32_t USBx_BASE = (uint32_t)USBx;
@@ -1524,44 +1544,44 @@
tmpreg |= USB_OTG_HCCHAR_CHENA;
USBx_HC(ch_num)->HCCHAR = tmpreg;
- if ((hc->ep_is_in == 0U) && (hc->xfer_len > 0U))
+ if ((hc->ep_is_in == 0U) && (hc->xfer_len > 0U))
+ {
+ switch (hc->ep_type)
{
- switch (hc->ep_type)
- {
- /* Non periodic transfer */
- case EP_TYPE_CTRL:
- case EP_TYPE_BULK:
+ /* Non periodic transfer */
+ case EP_TYPE_CTRL:
+ case EP_TYPE_BULK:
- len_words = (uint16_t)((hc->xfer_len + 3U) / 4U);
+ len_words = (uint16_t)((hc->xfer_len + 3U) / 4U);
- /* check if there is enough space in FIFO space */
- if (len_words > (USBx->HNPTXSTS & 0xFFFFU))
- {
- /* need to process data in nptxfempty interrupt */
- USBx->GINTMSK |= USB_OTG_GINTMSK_NPTXFEM;
- }
- break;
+ /* check if there is enough space in FIFO space */
+ if (len_words > (USBx->HNPTXSTS & 0xFFFFU))
+ {
+ /* need to process data in nptxfempty interrupt */
+ USBx->GINTMSK |= USB_OTG_GINTMSK_NPTXFEM;
+ }
+ break;
- /* Periodic transfer */
- case EP_TYPE_INTR:
- case EP_TYPE_ISOC:
- len_words = (uint16_t)((hc->xfer_len + 3U) / 4U);
- /* check if there is enough space in FIFO space */
- if (len_words > (USBx_HOST->HPTXSTS & 0xFFFFU)) /* split the transfer */
- {
- /* need to process data in ptxfempty interrupt */
- USBx->GINTMSK |= USB_OTG_GINTMSK_PTXFEM;
- }
- break;
+ /* Periodic transfer */
+ case EP_TYPE_INTR:
+ case EP_TYPE_ISOC:
+ len_words = (uint16_t)((hc->xfer_len + 3U) / 4U);
+ /* check if there is enough space in FIFO space */
+ if (len_words > (USBx_HOST->HPTXSTS & 0xFFFFU)) /* split the transfer */
+ {
+ /* need to process data in ptxfempty interrupt */
+ USBx->GINTMSK |= USB_OTG_GINTMSK_PTXFEM;
+ }
+ break;
- default:
- break;
- }
-
- /* Write packet into the Tx FIFO. */
- (void)USB_WritePacket(USBx, hc->xfer_buff, hc->ch_num, (uint16_t)hc->xfer_len);
+ default:
+ break;
}
+ /* Write packet into the Tx FIFO. */
+ (void)USB_WritePacket(USBx, hc->xfer_buff, hc->ch_num, (uint16_t)hc->xfer_len);
+ }
+
return HAL_OK;
}
@@ -1607,8 +1627,7 @@
{
break;
}
- }
- while ((USBx_HC(hcnum)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
+ } while ((USBx_HC(hcnum)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
}
else
{
@@ -1630,8 +1649,7 @@
{
break;
}
- }
- while ((USBx_HC(hcnum)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
+ } while ((USBx_HC(hcnum)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
}
else
{
@@ -1711,8 +1729,7 @@
{
break;
}
- }
- while ((USBx_HC(i)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
+ } while ((USBx_HC(i)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
}
/* Clear any pending Host interrupts */
@@ -1761,8 +1778,8 @@
#if defined (USB)
/**
* @brief Initializes the USB Core
- * @param USBx: USB Instance
- * @param cfg : pointer to a USB_CfgTypeDef structure that contains
+ * @param USBx USB Instance
+ * @param cfg pointer to a USB_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
@@ -1783,12 +1800,15 @@
/**
* @brief USB_EnableGlobalInt
* Enables the controller's Global Int in the AHB Config reg
- * @param USBx : Selected device
+ * @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx)
{
- uint16_t winterruptmask;
+ uint32_t winterruptmask;
+
+ /* Clear pending interrupts */
+ USBx->ISTR = 0U;
/* Set winterruptmask variable */
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
@@ -1797,7 +1817,7 @@
USB_CNTR_RESETM;
/* Set interrupt mask */
- USBx->CNTR |= winterruptmask;
+ USBx->CNTR = (uint16_t)winterruptmask;
return HAL_OK;
}
@@ -1805,12 +1825,12 @@
/**
* @brief USB_DisableGlobalInt
* Disable the controller's Global Int in the AHB Config reg
- * @param USBx : Selected device
+ * @param USBx Selected device
* @retval HAL status
-*/
+ */
HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx)
{
- uint16_t winterruptmask;
+ uint32_t winterruptmask;
/* Set winterruptmask variable */
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
@@ -1819,17 +1839,17 @@
USB_CNTR_RESETM;
/* Clear interrupt mask */
- USBx->CNTR &= ~winterruptmask;
+ USBx->CNTR &= (uint16_t)(~winterruptmask);
return HAL_OK;
}
/**
- * @brief USB_SetCurrentMode : Set functional mode
- * @param USBx : Selected device
- * @param mode : current core mode
+ * @brief USB_SetCurrentMode Set functional mode
+ * @param USBx Selected device
+ * @param mode current core mode
* This parameter can be one of the these values:
- * @arg USB_DEVICE_MODE: Peripheral mode mode
+ * @arg USB_DEVICE_MODE Peripheral mode
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode)
@@ -1846,10 +1866,10 @@
}
/**
- * @brief USB_DevInit : Initializes the USB controller registers
+ * @brief USB_DevInit Initializes the USB controller registers
* for device mode
- * @param USBx : Selected device
- * @param cfg : pointer to a USB_CfgTypeDef structure that contains
+ * @param USBx Selected device
+ * @param cfg pointer to a USB_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
@@ -1859,89 +1879,25 @@
UNUSED(cfg);
/* Init Device */
- /*CNTR_FRES = 1*/
- USBx->CNTR = USB_CNTR_FRES;
+ /* CNTR_FRES = 1 */
+ USBx->CNTR = (uint16_t)USB_CNTR_FRES;
- /*CNTR_FRES = 0*/
- USBx->CNTR = 0;
+ /* CNTR_FRES = 0 */
+ USBx->CNTR = 0U;
- /*Clear pending interrupts*/
- USBx->ISTR = 0;
+ /* Clear pending interrupts */
+ USBx->ISTR = 0U;
/*Set Btable Address*/
USBx->BTABLE = BTABLE_ADDRESS;
- /* Enable USB Device Interrupt mask */
- (void)USB_EnableGlobalInt(USBx);
-
- return HAL_OK;
-}
-
-/**
- * @brief USB_SetDevSpeed :Initializes the device speed
- * depending on the PHY type and the enumeration speed of the device.
- * @param USBx Selected device
- * @param speed device speed
- * @retval Hal status
- */
-HAL_StatusTypeDef USB_SetDevSpeed(USB_TypeDef *USBx, uint8_t speed)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(USBx);
- UNUSED(speed);
-
- /* NOTE : - This function is not required by USB Device FS peripheral, it is used
- only by USB OTG FS peripheral.
- - This function is added to ensure compatibility across platforms.
- */
-
- return HAL_OK;
-}
-
-/**
- * @brief USB_FlushTxFifo : Flush a Tx FIFO
- * @param USBx : Selected device
- * @param num : FIFO number
- * This parameter can be a value from 1 to 15
- 15 means Flush all Tx FIFOs
- * @retval HAL status
- */
-HAL_StatusTypeDef USB_FlushTxFifo(USB_TypeDef *USBx, uint32_t num)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(USBx);
- UNUSED(num);
-
- /* NOTE : - This function is not required by USB Device FS peripheral, it is used
- only by USB OTG FS peripheral.
- - This function is added to ensure compatibility across platforms.
- */
-
- return HAL_OK;
-}
-
-/**
- * @brief USB_FlushRxFifo : Flush Rx FIFO
- * @param USBx : Selected device
- * @retval HAL status
- */
-HAL_StatusTypeDef USB_FlushRxFifo(USB_TypeDef *USBx)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(USBx);
-
- /* NOTE : - This function is not required by USB Device FS peripheral, it is used
- only by USB OTG FS peripheral.
- - This function is added to ensure compatibility across platforms.
- */
-
return HAL_OK;
}
/**
* @brief Activate and configure an endpoint
- * @param USBx : Selected device
- * @param ep: pointer to endpoint structure
+ * @param USBx Selected device
+ * @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
@@ -1975,7 +1931,7 @@
break;
}
- PCD_SET_ENDPOINT(USBx, ep->num, wEpRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX);
+ PCD_SET_ENDPOINT(USBx, ep->num, (wEpRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX));
PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num);
@@ -2002,9 +1958,11 @@
{
/*Set the endpoint Receive buffer address */
PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress);
+
/*Set the endpoint Receive buffer counter*/
PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket);
PCD_CLEAR_RX_DTOG(USBx, ep->num);
+
/* Configure VALID status for the Endpoint*/
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
}
@@ -2014,6 +1972,7 @@
{
/* Set the endpoint as double buffered */
PCD_SET_EP_DBUF(USBx, ep->num);
+
/* Set buffer address for double buffered mode */
PCD_SET_EP_DBUF_ADDR(USBx, ep->num, ep->pmaaddr0, ep->pmaaddr1);
@@ -2023,9 +1982,6 @@
PCD_CLEAR_RX_DTOG(USBx, ep->num);
PCD_CLEAR_TX_DTOG(USBx, ep->num);
- /* Reset value of the data toggle bits for the endpoint out */
- PCD_TX_DTOG(USBx, ep->num);
-
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
}
@@ -2034,7 +1990,6 @@
/* Clear the data toggle bits for the endpoint IN/OUT */
PCD_CLEAR_RX_DTOG(USBx, ep->num);
PCD_CLEAR_TX_DTOG(USBx, ep->num);
- PCD_RX_DTOG(USBx, ep->num);
if (ep->type != EP_TYPE_ISOC)
{
@@ -2056,8 +2011,8 @@
/**
* @brief De-activate and de-initialize an endpoint
- * @param USBx : Selected device
- * @param ep: pointer to endpoint structure
+ * @param USBx Selected device
+ * @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
@@ -2067,12 +2022,14 @@
if (ep->is_in != 0U)
{
PCD_CLEAR_TX_DTOG(USBx, ep->num);
+
/* Configure DISABLE status for the Endpoint*/
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
}
else
{
PCD_CLEAR_RX_DTOG(USBx, ep->num);
+
/* Configure DISABLE status for the Endpoint*/
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
}
@@ -2098,6 +2055,7 @@
PCD_CLEAR_RX_DTOG(USBx, ep->num);
PCD_CLEAR_TX_DTOG(USBx, ep->num);
PCD_RX_DTOG(USBx, ep->num);
+
/* Configure DISABLE status for the Endpoint*/
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
@@ -2108,15 +2066,16 @@
}
/**
- * @brief USB_EPStartXfer : setup and starts a transfer over an EP
- * @param USBx : Selected device
- * @param ep: pointer to endpoint structure
+ * @brief USB_EPStartXfer setup and starts a transfer over an EP
+ * @param USBx Selected device
+ * @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
- uint16_t pmabuffer;
uint32_t len;
+ uint16_t pmabuffer;
+ uint16_t wEPVal;
/* IN endpoint */
if (ep->is_in == 1U)
@@ -2125,12 +2084,10 @@
if (ep->xfer_len > ep->maxpacket)
{
len = ep->maxpacket;
- ep->xfer_len -= len;
}
else
{
len = ep->xfer_len;
- ep->xfer_len = 0U;
}
/* configure and validate Tx endpoint */
@@ -2141,49 +2098,174 @@
}
else
{
- /* Write the data to the USB endpoint */
- if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
+ /* double buffer bulk management */
+ if (ep->type == EP_TYPE_BULK)
{
- /* Set the Double buffer counter for pmabuffer1 */
- PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
- pmabuffer = ep->pmaaddr1;
- }
+ if (ep->xfer_len_db > ep->maxpacket)
+ {
+ /* enable double buffer */
+ PCD_SET_EP_DBUF(USBx, ep->num);
+
+ /* each Time to write in PMA xfer_len_db will */
+ ep->xfer_len_db -= len;
+
+ /* Fill the two first buffer in the Buffer0 & Buffer1 */
+ if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
+ {
+ /* Set the Double buffer counter for pmabuffer1 */
+ PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
+ pmabuffer = ep->pmaaddr1;
+
+ /* Write the user buffer to USB PMA */
+ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
+ ep->xfer_buff += len;
+
+ if (ep->xfer_len_db > ep->maxpacket)
+ {
+ ep->xfer_len_db -= len;
+ }
+ else
+ {
+ len = ep->xfer_len_db;
+ ep->xfer_len_db = 0U;
+ }
+
+ /* Set the Double buffer counter for pmabuffer0 */
+ PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
+ pmabuffer = ep->pmaaddr0;
+
+ /* Write the user buffer to USB PMA */
+ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
+ }
+ else
+ {
+ /* Set the Double buffer counter for pmabuffer0 */
+ PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
+ pmabuffer = ep->pmaaddr0;
+
+ /* Write the user buffer to USB PMA */
+ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
+ ep->xfer_buff += len;
+
+ if (ep->xfer_len_db > ep->maxpacket)
+ {
+ ep->xfer_len_db -= len;
+ }
+ else
+ {
+ len = ep->xfer_len_db;
+ ep->xfer_len_db = 0U;
+ }
+
+ /* Set the Double buffer counter for pmabuffer1 */
+ PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
+ pmabuffer = ep->pmaaddr1;
+
+ /* Write the user buffer to USB PMA */
+ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
+ }
+ }
+ /* auto Switch to single buffer mode when transfer <Mps no need to manage in double buffer */
+ else
+ {
+ len = ep->xfer_len_db;
+
+ /* disable double buffer mode */
+ PCD_CLEAR_EP_DBUF(USBx, ep->num);
+
+ /* Set Tx count with nbre of byte to be transmitted */
+ PCD_SET_EP_TX_CNT(USBx, ep->num, len);
+ pmabuffer = ep->pmaaddr0;
+
+ /* Write the user buffer to USB PMA */
+ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
+ }
+ }/* end if bulk double buffer */
+
+ /* manage isochronous double buffer IN mode */
else
{
- /* Set the Double buffer counter for pmabuffer0 */
- PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
- pmabuffer = ep->pmaaddr0;
+ /* Write the data to the USB endpoint */
+ if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
+ {
+ /* Set the Double buffer counter for pmabuffer1 */
+ PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
+ pmabuffer = ep->pmaaddr1;
+ }
+ else
+ {
+ /* Set the Double buffer counter for pmabuffer0 */
+ PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
+ pmabuffer = ep->pmaaddr0;
+ }
+
+ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
+ PCD_FreeUserBuffer(USBx, ep->num, ep->is_in);
}
- USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
- PCD_FreeUserBuffer(USBx, ep->num, ep->is_in);
}
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID);
}
else /* OUT endpoint */
{
- /* Multi packet transfer*/
- if (ep->xfer_len > ep->maxpacket)
- {
- len = ep->maxpacket;
- ep->xfer_len -= len;
- }
- else
- {
- len = ep->xfer_len;
- ep->xfer_len = 0U;
- }
-
- /* configure and validate Rx endpoint */
if (ep->doublebuffer == 0U)
{
- /*Set RX buffer count*/
+ /* Multi packet transfer */
+ if (ep->xfer_len > ep->maxpacket)
+ {
+ len = ep->maxpacket;
+ ep->xfer_len -= len;
+ }
+ else
+ {
+ len = ep->xfer_len;
+ ep->xfer_len = 0U;
+ }
+ /* configure and validate Rx endpoint */
PCD_SET_EP_RX_CNT(USBx, ep->num, len);
}
else
{
- /*Set the Double buffer counter*/
- PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, len);
+ /* First Transfer Coming From HAL_PCD_EP_Receive & From ISR */
+ /* Set the Double buffer counter */
+ if (ep->type == EP_TYPE_BULK)
+ {
+ PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, ep->maxpacket);
+
+ /* Coming from ISR */
+ if (ep->xfer_count != 0U)
+ {
+ /* update last value to check if there is blocking state */
+ wEPVal = PCD_GET_ENDPOINT(USBx, ep->num);
+
+ /*Blocking State */
+ if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
+ (((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
+ {
+ PCD_FreeUserBuffer(USBx, ep->num, 0U);
+ }
+ }
+ }
+ /* iso out double */
+ else if (ep->type == EP_TYPE_ISOC)
+ {
+ /* Multi packet transfer */
+ if (ep->xfer_len > ep->maxpacket)
+ {
+ len = ep->maxpacket;
+ ep->xfer_len -= len;
+ }
+ else
+ {
+ len = ep->xfer_len;
+ ep->xfer_len = 0U;
+ }
+ PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, len);
+ }
+ else
+ {
+ return HAL_ERROR;
+ }
}
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
@@ -2192,54 +2274,11 @@
return HAL_OK;
}
-/**
- * @brief USB_WritePacket : Writes a packet into the Tx FIFO associated
- * with the EP/channel
- * @param USBx : Selected device
- * @param src : pointer to source buffer
- * @param ch_ep_num : endpoint or host channel number
- * @param len : Number of bytes to write
- * @retval HAL status
- */
-HAL_StatusTypeDef USB_WritePacket(USB_TypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(USBx);
- UNUSED(src);
- UNUSED(ch_ep_num);
- UNUSED(len);
- /* NOTE : - This function is not required by USB Device FS peripheral, it is used
- only by USB OTG FS peripheral.
- - This function is added to ensure compatibility across platforms.
- */
- return HAL_OK;
-}
/**
- * @brief USB_ReadPacket : read a packet from the Tx FIFO associated
- * with the EP/channel
- * @param USBx : Selected device
- * @param dest : destination pointer
- * @param len : Number of bytes to read
- * @retval pointer to destination buffer
- */
-void *USB_ReadPacket(USB_TypeDef *USBx, uint8_t *dest, uint16_t len)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(USBx);
- UNUSED(dest);
- UNUSED(len);
- /* NOTE : - This function is not required by USB Device FS peripheral, it is used
- only by USB OTG FS peripheral.
- - This function is added to ensure compatibility across platforms.
- */
- return ((void *)NULL);
-}
-
-/**
- * @brief USB_EPSetStall : set a stall condition over an EP
- * @param USBx : Selected device
- * @param ep: pointer to endpoint structure
+ * @brief USB_EPSetStall set a stall condition over an EP
+ * @param USBx Selected device
+ * @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
@@ -2257,9 +2296,9 @@
}
/**
- * @brief USB_EPClearStall : Clear a stall condition over an EP
- * @param USBx : Selected device
- * @param ep: pointer to endpoint structure
+ * @brief USB_EPClearStall Clear a stall condition over an EP
+ * @param USBx Selected device
+ * @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
@@ -2280,7 +2319,7 @@
{
PCD_CLEAR_RX_DTOG(USBx, ep->num);
- /* Configure VALID status for the Endpoint*/
+ /* Configure VALID status for the Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
}
}
@@ -2289,28 +2328,28 @@
}
/**
- * @brief USB_StopDevice : Stop the usb device mode
- * @param USBx : Selected device
+ * @brief USB_StopDevice Stop the usb device mode
+ * @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_StopDevice(USB_TypeDef *USBx)
{
/* disable all interrupts and force USB reset */
- USBx->CNTR = USB_CNTR_FRES;
+ USBx->CNTR = (uint16_t)USB_CNTR_FRES;
/* clear interrupt status register */
- USBx->ISTR = 0;
+ USBx->ISTR = 0U;
/* switch-off device */
- USBx->CNTR = (USB_CNTR_FRES | USB_CNTR_PDWN);
+ USBx->CNTR = (uint16_t)(USB_CNTR_FRES | USB_CNTR_PDWN);
return HAL_OK;
}
/**
- * @brief USB_SetDevAddress : Stop the usb device mode
- * @param USBx : Selected device
- * @param address : new device address to be assigned
+ * @brief USB_SetDevAddress Stop the usb device mode
+ * @param USBx Selected device
+ * @param address new device address to be assigned
* This parameter can be a value from 0 to 255
* @retval HAL status
*/
@@ -2319,21 +2358,22 @@
if (address == 0U)
{
/* set device address and enable function */
- USBx->DADDR = USB_DADDR_EF;
+ USBx->DADDR = (uint16_t)USB_DADDR_EF;
}
return HAL_OK;
}
/**
- * @brief USB_DevConnect : Connect the USB device by enabling the pull-up/pull-down
- * @param USBx : Selected device
+ * @brief USB_DevConnect Connect the USB device by enabling the pull-up/pull-down
+ * @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(USBx);
+
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
@@ -2343,14 +2383,15 @@
}
/**
- * @brief USB_DevDisconnect : Disconnect the USB device by disabling the pull-up/pull-down
- * @param USBx : Selected device
+ * @brief USB_DevDisconnect Disconnect the USB device by disabling the pull-up/pull-down
+ * @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(USBx);
+
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
@@ -2360,8 +2401,8 @@
}
/**
- * @brief USB_ReadInterrupts: return the global USB interrupt status
- * @param USBx : Selected device
+ * @brief USB_ReadInterrupts return the global USB interrupt status
+ * @param USBx Selected device
* @retval HAL status
*/
uint32_t USB_ReadInterrupts(USB_TypeDef *USBx)
@@ -2373,8 +2414,8 @@
}
/**
- * @brief USB_ReadDevAllOutEpInterrupt: return the USB device OUT endpoints interrupt status
- * @param USBx : Selected device
+ * @brief USB_ReadDevAllOutEpInterrupt return the USB device OUT endpoints interrupt status
+ * @param USBx Selected device
* @retval HAL status
*/
uint32_t USB_ReadDevAllOutEpInterrupt(USB_TypeDef *USBx)
@@ -2389,8 +2430,8 @@
}
/**
- * @brief USB_ReadDevAllInEpInterrupt: return the USB device IN endpoints interrupt status
- * @param USBx : Selected device
+ * @brief USB_ReadDevAllInEpInterrupt return the USB device IN endpoints interrupt status
+ * @param USBx Selected device
* @retval HAL status
*/
uint32_t USB_ReadDevAllInEpInterrupt(USB_TypeDef *USBx)
@@ -2406,8 +2447,8 @@
/**
* @brief Returns Device OUT EP Interrupt register
- * @param USBx : Selected device
- * @param epnum : endpoint number
+ * @param USBx Selected device
+ * @param epnum endpoint number
* This parameter can be a value from 0 to 15
* @retval Device OUT EP Interrupt register
*/
@@ -2425,8 +2466,8 @@
/**
* @brief Returns Device IN EP Interrupt register
- * @param USBx : Selected device
- * @param epnum : endpoint number
+ * @param USBx Selected device
+ * @param epnum endpoint number
* This parameter can be a value from 0 to 15
* @retval Device IN EP Interrupt register
*/
@@ -2444,8 +2485,8 @@
/**
* @brief USB_ClearInterrupts: clear a USB interrupt
- * @param USBx Selected device
- * @param interrupt interrupt flag
+ * @param USBx Selected device
+ * @param interrupt flag
* @retval None
*/
void USB_ClearInterrupts(USB_TypeDef *USBx, uint32_t interrupt)
@@ -2461,8 +2502,8 @@
/**
* @brief Prepare the EP0 to start the first control setup
- * @param USBx Selected device
- * @param psetup pointer to setup packet
+ * @param USBx Selected device
+ * @param psetup pointer to setup packet
* @retval HAL status
*/
HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t *psetup)
@@ -2479,24 +2520,25 @@
/**
* @brief USB_ActivateRemoteWakeup : active remote wakeup signalling
- * @param USBx Selected device
+ * @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_TypeDef *USBx)
{
- USBx->CNTR |= USB_CNTR_RESUME;
+ USBx->CNTR |= (uint16_t)USB_CNTR_RESUME;
return HAL_OK;
}
/**
- * @brief USB_DeActivateRemoteWakeup : de-active remote wakeup signalling
- * @param USBx Selected device
+ * @brief USB_DeActivateRemoteWakeup de-active remote wakeup signalling
+ * @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_TypeDef *USBx)
{
- USBx->CNTR &= ~(USB_CNTR_RESUME);
+ USBx->CNTR &= (uint16_t)(~USB_CNTR_RESUME);
+
return HAL_OK;
}
@@ -2505,7 +2547,7 @@
* @param USBx USB peripheral instance register address.
* @param pbUsrBuf pointer to user memory area.
* @param wPMABufAddr address into PMA.
- * @param wNBytes: no. of bytes to be copied.
+ * @param wNBytes no. of bytes to be copied.
* @retval None
*/
void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
@@ -2535,11 +2577,11 @@
}
/**
- * @brief Copy a buffer from user memory area to packet memory area (PMA)
- * @param USBx: USB peripheral instance register address.
+ * @brief Copy data from packet memory area (PMA) to user memory buffer
+ * @param USBx USB peripheral instance register address.
* @param pbUsrBuf pointer to user memory area.
* @param wPMABufAddr address into PMA.
- * @param wNBytes: no. of bytes to be copied.
+ * @param wNBytes no. of bytes to be copied.
* @retval None
*/
void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
