Release v1.1.10
diff --git a/Inc/Legacy/stm32_hal_legacy.h b/Inc/Legacy/stm32_hal_legacy.h
index b59ff6d..f71f5c2 100644
--- a/Inc/Legacy/stm32_hal_legacy.h
+++ b/Inc/Legacy/stm32_hal_legacy.h
@@ -37,16 +37,12 @@
#define AES_CLEARFLAG_CCF CRYP_CLEARFLAG_CCF
#define AES_CLEARFLAG_RDERR CRYP_CLEARFLAG_RDERR
#define AES_CLEARFLAG_WRERR CRYP_CLEARFLAG_WRERR
-#if defined(STM32U5) || defined(STM32H7) || defined(STM32MP1)
+#if defined(STM32H7) || defined(STM32MP1)
#define CRYP_DATATYPE_32B CRYP_NO_SWAP
#define CRYP_DATATYPE_16B CRYP_HALFWORD_SWAP
#define CRYP_DATATYPE_8B CRYP_BYTE_SWAP
#define CRYP_DATATYPE_1B CRYP_BIT_SWAP
-#if defined(STM32U5)
-#define CRYP_CCF_CLEAR CRYP_CLEAR_CCF
-#define CRYP_ERR_CLEAR CRYP_CLEAR_RWEIF
-#endif /* STM32U5 */
-#endif /* STM32U5 || STM32H7 || STM32MP1 */
+#endif /* STM32H7 || STM32MP1 */
/**
* @}
*/
@@ -279,7 +275,7 @@
#define DAC_WAVEGENERATION_NOISE DAC_WAVE_NOISE
#define DAC_WAVEGENERATION_TRIANGLE DAC_WAVE_TRIANGLE
-#if defined(STM32G4) || defined(STM32L5) || defined(STM32H7) || defined (STM32U5)
+#if defined(STM32G4) || defined(STM32H7) || defined (STM32U5)
#define DAC_CHIPCONNECT_DISABLE DAC_CHIPCONNECT_EXTERNAL
#define DAC_CHIPCONNECT_ENABLE DAC_CHIPCONNECT_INTERNAL
#endif
@@ -476,7 +472,9 @@
#define TYPEPROGRAMDATA_FASTBYTE FLASH_TYPEPROGRAMDATA_FASTBYTE
#define TYPEPROGRAMDATA_FASTHALFWORD FLASH_TYPEPROGRAMDATA_FASTHALFWORD
#define TYPEPROGRAMDATA_FASTWORD FLASH_TYPEPROGRAMDATA_FASTWORD
+#if !defined(STM32F2) && !defined(STM32F4) && !defined(STM32F7) && !defined(STM32H7)
#define PAGESIZE FLASH_PAGE_SIZE
+#endif /* STM32F2 && STM32F4 && STM32F7 && STM32H7 */
#define TYPEPROGRAM_FASTBYTE FLASH_TYPEPROGRAM_BYTE
#define TYPEPROGRAM_FASTHALFWORD FLASH_TYPEPROGRAM_HALFWORD
#define TYPEPROGRAM_FASTWORD FLASH_TYPEPROGRAM_WORD
@@ -552,6 +550,16 @@
#define OB_SRAM134_RST_ERASE OB_SRAM_RST_ERASE
#define OB_SRAM134_RST_NOT_ERASE OB_SRAM_RST_NOT_ERASE
#endif /* STM32U5 */
+#if defined(STM32U0)
+#define OB_USER_nRST_STOP OB_USER_NRST_STOP
+#define OB_USER_nRST_STDBY OB_USER_NRST_STDBY
+#define OB_USER_nRST_SHDW OB_USER_NRST_SHDW
+#define OB_USER_nBOOT_SEL OB_USER_NBOOT_SEL
+#define OB_USER_nBOOT0 OB_USER_NBOOT0
+#define OB_USER_nBOOT1 OB_USER_NBOOT1
+#define OB_nBOOT0_RESET OB_NBOOT0_RESET
+#define OB_nBOOT0_SET OB_NBOOT0_SET
+#endif /* STM32U0 */
/**
* @}
@@ -800,6 +808,21 @@
#define GPIO_AF0_S2DSTOP GPIO_AF0_SRDSTOP
#define GPIO_AF11_LPGPIO GPIO_AF11_LPGPIO1
#endif /* STM32U5 */
+
+#if defined(STM32WBA)
+#define GPIO_AF11_RF_ANTSW0 GPIO_AF11_RF
+#define GPIO_AF11_RF_ANTSW1 GPIO_AF11_RF
+#define GPIO_AF11_RF_ANTSW2 GPIO_AF11_RF
+#define GPIO_AF11_RF_IO1 GPIO_AF11_RF
+#define GPIO_AF11_RF_IO2 GPIO_AF11_RF
+#define GPIO_AF11_RF_IO3 GPIO_AF11_RF
+#define GPIO_AF11_RF_IO4 GPIO_AF11_RF
+#define GPIO_AF11_RF_IO5 GPIO_AF11_RF
+#define GPIO_AF11_RF_IO6 GPIO_AF11_RF
+#define GPIO_AF11_RF_IO7 GPIO_AF11_RF
+#define GPIO_AF11_RF_IO8 GPIO_AF11_RF
+#define GPIO_AF11_RF_IO9 GPIO_AF11_RF
+#endif /* STM32WBA */
/**
* @}
*/
@@ -1243,10 +1266,10 @@
#define RTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1
#define RTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1
-#if defined(STM32H5)
+#if defined(STM32H5) || defined(STM32H7RS)
#define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE
#define TAMP_SECRETDEVICE_ERASE_BKP_SRAM TAMP_DEVICESECRETS_ERASE_BKPSRAM
-#endif /* STM32H5 */
+#endif /* STM32H5 || STM32H7RS */
#if defined(STM32WBA)
#define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE
@@ -1258,10 +1281,10 @@
#define TAMP_SECRETDEVICE_ERASE_ALL TAMP_DEVICESECRETS_ERASE_ALL
#endif /* STM32WBA */
-#if defined(STM32H5) || defined(STM32WBA)
+#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS)
#define TAMP_SECRETDEVICE_ERASE_DISABLE TAMP_DEVICESECRETS_ERASE_NONE
#define TAMP_SECRETDEVICE_ERASE_ENABLE TAMP_SECRETDEVICE_ERASE_ALL
-#endif /* STM32H5 || STM32WBA */
+#endif /* STM32H5 || STM32WBA || STM32H7RS */
#if defined(STM32F7)
#define RTC_TAMPCR_TAMPXE RTC_TAMPER_ENABLE_BITS_MASK
@@ -1599,6 +1622,8 @@
#define ETH_MAC_SMALL_FIFO_RW_ACTIVE 0x00000006U /* MAC small FIFO read / write controllers active */
#define ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE 0x00000001U /* MAC MII receive protocol engine active */
+#define ETH_TxPacketConfig ETH_TxPacketConfigTypeDef /* Transmit Packet Configuration structure definition */
+
/**
* @}
*/
@@ -1809,7 +1834,7 @@
#define HAL_FMPI2CEx_AnalogFilter_Config HAL_FMPI2CEx_ConfigAnalogFilter
#define HAL_FMPI2CEx_DigitalFilter_Config HAL_FMPI2CEx_ConfigDigitalFilter
-#define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) ((cmd == ENABLE)? \
+#define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd) == ENABLE)? \
HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): \
HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus))
@@ -1991,12 +2016,12 @@
/** @defgroup HAL_RTC_Aliased_Functions HAL RTC Aliased Functions maintained for legacy purpose
* @{
*/
-#if defined(STM32H5) || defined(STM32WBA)
+#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS)
#define HAL_RTCEx_SetBoothardwareKey HAL_RTCEx_LockBootHardwareKey
#define HAL_RTCEx_BKUPBlock_Enable HAL_RTCEx_BKUPBlock
#define HAL_RTCEx_BKUPBlock_Disable HAL_RTCEx_BKUPUnblock
#define HAL_RTCEx_Erase_SecretDev_Conf HAL_RTCEx_ConfigEraseDeviceSecrets
-#endif /* STM32H5 || STM32WBA */
+#endif /* STM32H5 || STM32WBA || STM32H7RS */
/**
* @}
@@ -2311,8 +2336,8 @@
#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \
((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \
__HAL_COMP_COMP6_EXTI_CLEAR_FLAG())
-# endif
-# if defined(STM32F302xE) || defined(STM32F302xC)
+#endif
+#if defined(STM32F302xE) || defined(STM32F302xC)
#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \
@@ -2345,8 +2370,8 @@
((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \
((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \
__HAL_COMP_COMP6_EXTI_CLEAR_FLAG())
-# endif
-# if defined(STM32F303xE) || defined(STM32F398xx) || defined(STM32F303xC) || defined(STM32F358xx)
+#endif
+#if defined(STM32F303xE) || defined(STM32F398xx) || defined(STM32F303xC) || defined(STM32F358xx)
#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_RISING_EDGE() : \
@@ -2403,8 +2428,8 @@
((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_CLEAR_FLAG() : \
((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_CLEAR_FLAG() : \
__HAL_COMP_COMP7_EXTI_CLEAR_FLAG())
-# endif
-# if defined(STM32F373xC) ||defined(STM32F378xx)
+#endif
+#if defined(STM32F373xC) ||defined(STM32F378xx)
#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
__HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE())
#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \
@@ -2421,7 +2446,7 @@
__HAL_COMP_COMP2_EXTI_GET_FLAG())
#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
__HAL_COMP_COMP2_EXTI_CLEAR_FLAG())
-# endif
+#endif
#else
#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
__HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE())
@@ -2723,6 +2748,12 @@
#define __APB1_RELEASE_RESET __HAL_RCC_APB1_RELEASE_RESET
#define __APB2_FORCE_RESET __HAL_RCC_APB2_FORCE_RESET
#define __APB2_RELEASE_RESET __HAL_RCC_APB2_RELEASE_RESET
+#if defined(STM32C0)
+#define __HAL_RCC_APB1_FORCE_RESET __HAL_RCC_APB1_GRP1_FORCE_RESET
+#define __HAL_RCC_APB1_RELEASE_RESET __HAL_RCC_APB1_GRP1_RELEASE_RESET
+#define __HAL_RCC_APB2_FORCE_RESET __HAL_RCC_APB1_GRP2_FORCE_RESET
+#define __HAL_RCC_APB2_RELEASE_RESET __HAL_RCC_APB1_GRP2_RELEASE_RESET
+#endif /* STM32C0 */
#define __BKP_CLK_DISABLE __HAL_RCC_BKP_CLK_DISABLE
#define __BKP_CLK_ENABLE __HAL_RCC_BKP_CLK_ENABLE
#define __BKP_FORCE_RESET __HAL_RCC_BKP_FORCE_RESET
@@ -3646,8 +3677,12 @@
#define RCC_MCOSOURCE_PLLCLK_NODIV RCC_MCO1SOURCE_PLLCLK
#define RCC_MCOSOURCE_PLLCLK_DIV2 RCC_MCO1SOURCE_PLLCLK_DIV2
+#if defined(STM32U0)
+#define RCC_SYSCLKSOURCE_STATUS_PLLR RCC_SYSCLKSOURCE_STATUS_PLLCLK
+#endif
+
#if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) || \
- defined(STM32WL) || defined(STM32C0)
+ defined(STM32WL) || defined(STM32C0) || defined(STM32H7RS) || defined(STM32U0)
#define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE
#else
#define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK
@@ -3749,8 +3784,10 @@
#define __HAL_RCC_GET_DFSDM_SOURCE __HAL_RCC_GET_DFSDM1_SOURCE
#define RCC_DFSDM1CLKSOURCE_PCLK RCC_DFSDM1CLKSOURCE_PCLK2
#define RCC_SWPMI1CLKSOURCE_PCLK RCC_SWPMI1CLKSOURCE_PCLK1
+#if !defined(STM32U0)
#define RCC_LPTIM1CLKSOURCE_PCLK RCC_LPTIM1CLKSOURCE_PCLK1
#define RCC_LPTIM2CLKSOURCE_PCLK RCC_LPTIM2CLKSOURCE_PCLK1
+#endif
#define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB1 RCC_DFSDM1AUDIOCLKSOURCE_I2S1
#define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB2 RCC_DFSDM1AUDIOCLKSOURCE_I2S2
@@ -3896,7 +3933,8 @@
*/
#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || \
defined (STM32L4P5xx)|| defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5) || \
- defined (STM32WBA) || defined (STM32H5) || defined (STM32C0)
+ defined (STM32WBA) || defined (STM32H5) || \
+ defined (STM32C0) || defined (STM32H7RS) || defined (STM32U0)
#else
#define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG
#endif
@@ -3932,7 +3970,9 @@
#endif /* STM32F1 */
#if defined (STM32F0) || defined (STM32F2) || defined (STM32F3) || defined (STM32F4) || defined (STM32F7) || \
- defined (STM32L0) || defined (STM32L1)
+ defined (STM32H7) || \
+ defined (STM32L0) || defined (STM32L1) || \
+ defined (STM32WB)
#define __HAL_RTC_TAMPER_GET_IT __HAL_RTC_TAMPER_GET_FLAG
#endif
@@ -4217,6 +4257,9 @@
#define __HAL_TIM_GetCompare __HAL_TIM_GET_COMPARE
#define TIM_BREAKINPUTSOURCE_DFSDM TIM_BREAKINPUTSOURCE_DFSDM1
+
+#define TIM_OCMODE_ASSYMETRIC_PWM1 TIM_OCMODE_ASYMMETRIC_PWM1
+#define TIM_OCMODE_ASSYMETRIC_PWM2 TIM_OCMODE_ASYMMETRIC_PWM2
/**
* @}
*/
diff --git a/Inc/stm32f1xx_hal_can.h b/Inc/stm32f1xx_hal_can.h
index 287c991..db8cc92 100644
--- a/Inc/stm32f1xx_hal_can.h
+++ b/Inc/stm32f1xx_hal_can.h
@@ -209,7 +209,11 @@
/**
* @brief CAN handle Structure definition
*/
+#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
typedef struct __CAN_HandleTypeDef
+#else
+typedef struct
+#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
{
CAN_TypeDef *Instance; /*!< Register base address */
diff --git a/Inc/stm32f1xx_hal_nand.h b/Inc/stm32f1xx_hal_nand.h
index 38093c3..81562ce 100644
--- a/Inc/stm32f1xx_hal_nand.h
+++ b/Inc/stm32f1xx_hal_nand.h
@@ -194,7 +194,7 @@
FSMC_NAND_PCC_TimingTypeDef *AttSpace_Timing);
HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand);
-HAL_StatusTypeDef HAL_NAND_ConfigDevice(NAND_HandleTypeDef *hnand, NAND_DeviceConfigTypeDef *pDeviceConfig);
+HAL_StatusTypeDef HAL_NAND_ConfigDevice(NAND_HandleTypeDef *hnand, const NAND_DeviceConfigTypeDef *pDeviceConfig);
HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID);
diff --git a/Inc/stm32f1xx_hal_pccard.h b/Inc/stm32f1xx_hal_pccard.h
index 58ec0ea..dc726ca 100644
--- a/Inc/stm32f1xx_hal_pccard.h
+++ b/Inc/stm32f1xx_hal_pccard.h
@@ -68,7 +68,7 @@
typedef struct __PCCARD_HandleTypeDef
#else
typedef struct
-#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */
+#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */
{
FSMC_PCCARD_TypeDef *Instance; /*!< Register base address for PCCARD device */
@@ -82,7 +82,7 @@
void (* MspInitCallback)(struct __PCCARD_HandleTypeDef *hpccard); /*!< PCCARD Msp Init callback */
void (* MspDeInitCallback)(struct __PCCARD_HandleTypeDef *hpccard); /*!< PCCARD Msp DeInit callback */
void (* ItCallback)(struct __PCCARD_HandleTypeDef *hpccard); /*!< PCCARD IT callback */
-#endif
+#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */
} PCCARD_HandleTypeDef;
#if (USE_HAL_PCCARD_REGISTER_CALLBACKS == 1)
@@ -100,7 +100,7 @@
* @brief HAL PCCARD Callback pointer definition
*/
typedef void (*pPCCARD_CallbackTypeDef)(PCCARD_HandleTypeDef *hpccard);
-#endif
+#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */
/**
* @}
*/
@@ -122,7 +122,7 @@
} while(0)
#else
#define __HAL_PCCARD_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_PCCARD_STATE_RESET)
-#endif
+#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */
/**
* @}
*/
@@ -137,7 +137,8 @@
*/
/* Initialization/de-initialization functions **********************************/
HAL_StatusTypeDef HAL_PCCARD_Init(PCCARD_HandleTypeDef *hpccard, FSMC_NAND_PCC_TimingTypeDef *ComSpaceTiming,
- FSMC_NAND_PCC_TimingTypeDef *AttSpaceTiming, FSMC_NAND_PCC_TimingTypeDef *IOSpaceTiming);
+ FSMC_NAND_PCC_TimingTypeDef *AttSpaceTiming,
+ FSMC_NAND_PCC_TimingTypeDef *IOSpaceTiming);
HAL_StatusTypeDef HAL_PCCARD_DeInit(PCCARD_HandleTypeDef *hpccard);
void HAL_PCCARD_MspInit(PCCARD_HandleTypeDef *hpccard);
void HAL_PCCARD_MspDeInit(PCCARD_HandleTypeDef *hpccard);
@@ -165,7 +166,7 @@
pPCCARD_CallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_PCCARD_UnRegisterCallback(PCCARD_HandleTypeDef *hpccard,
HAL_PCCARD_CallbackIDTypeDef CallbackId);
-#endif
+#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */
/**
* @}
*/
diff --git a/Inc/stm32f1xx_hal_spi.h b/Inc/stm32f1xx_hal_spi.h
index 73073fc..309eb5b 100644
--- a/Inc/stm32f1xx_hal_spi.h
+++ b/Inc/stm32f1xx_hal_spi.h
@@ -107,7 +107,7 @@
SPI_InitTypeDef Init; /*!< SPI communication parameters */
- uint8_t *pTxBuffPtr; /*!< Pointer to SPI Tx transfer Buffer */
+ const uint8_t *pTxBuffPtr; /*!< Pointer to SPI Tx transfer Buffer */
uint16_t TxXferSize; /*!< SPI Tx Transfer size */
@@ -336,11 +336,12 @@
* @retval None
*/
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
-#define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) do{ \
- (__HANDLE__)->State = HAL_SPI_STATE_RESET; \
- (__HANDLE__)->MspInitCallback = NULL; \
- (__HANDLE__)->MspDeInitCallback = NULL; \
- } while(0)
+#define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) \
+ do{ \
+ (__HANDLE__)->State = HAL_SPI_STATE_RESET; \
+ (__HANDLE__)->MspInitCallback = NULL; \
+ (__HANDLE__)->MspDeInitCallback = NULL; \
+ } while(0)
#else
#define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET)
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
@@ -482,8 +483,11 @@
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
* @retval None
*/
-#define SPI_RESET_CRC(__HANDLE__) do{CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);\
- SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);}while(0U)
+#define SPI_RESET_CRC(__HANDLE__) \
+ do{ \
+ CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN); \
+ SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN); \
+ } while(0U)
/** @brief Check whether the specified SPI flag is set or not.
* @param __SR__ copy of SPI SR register.
@@ -498,7 +502,7 @@
* @retval SET or RESET.
*/
#define SPI_CHECK_FLAG(__SR__, __FLAG__) ((((__SR__) & ((__FLAG__) & SPI_FLAG_MASK)) == \
- ((__FLAG__) & SPI_FLAG_MASK)) ? SET : RESET)
+ ((__FLAG__) & SPI_FLAG_MASK)) ? SET : RESET)
/** @brief Check whether the specified SPI Interrupt is set or not.
* @param __CR2__ copy of SPI CR2 register.
@@ -510,7 +514,7 @@
* @retval SET or RESET.
*/
#define SPI_CHECK_IT_SOURCE(__CR2__, __INTERRUPT__) ((((__CR2__) & (__INTERRUPT__)) == \
- (__INTERRUPT__)) ? SET : RESET)
+ (__INTERRUPT__)) ? SET : RESET)
/** @brief Checks if SPI Mode parameter is in allowed range.
* @param __MODE__ specifies the SPI Mode.
@@ -619,7 +623,7 @@
*/
#define IS_SPI_CRC_POLYNOMIAL(__POLYNOMIAL__) (((__POLYNOMIAL__) >= 0x1U) && \
((__POLYNOMIAL__) <= 0xFFFFU) && \
- (((__POLYNOMIAL__)&0x1U) != 0U))
+ (((__POLYNOMIAL__)&0x1U) != 0U))
/** @brief Checks if DMA handle is valid.
* @param __HANDLE__ specifies a DMA Handle.
@@ -668,17 +672,17 @@
* @{
*/
/* I/O operation functions ***************************************************/
-HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
+HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size, uint32_t Timeout);
HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size,
- uint32_t Timeout);
-HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
+HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData,
+ uint16_t Size, uint32_t Timeout);
+HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData,
+HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData,
uint16_t Size);
-HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
+HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData,
+HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData,
uint16_t Size);
HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi);
HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi);
@@ -704,8 +708,8 @@
* @{
*/
/* Peripheral State and Error functions ***************************************/
-HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi);
-uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi);
+HAL_SPI_StateTypeDef HAL_SPI_GetState(const SPI_HandleTypeDef *hspi);
+uint32_t HAL_SPI_GetError(const SPI_HandleTypeDef *hspi);
/**
* @}
*/
diff --git a/Inc/stm32f1xx_hal_tim.h b/Inc/stm32f1xx_hal_tim.h
index 53951f7..ac72075 100644
--- a/Inc/stm32f1xx_hal_tim.h
+++ b/Inc/stm32f1xx_hal_tim.h
@@ -385,29 +385,28 @@
*/
typedef enum
{
- HAL_TIM_BASE_MSPINIT_CB_ID = 0x00U /*!< TIM Base MspInit Callback ID */
- , HAL_TIM_BASE_MSPDEINIT_CB_ID = 0x01U /*!< TIM Base MspDeInit Callback ID */
- , HAL_TIM_IC_MSPINIT_CB_ID = 0x02U /*!< TIM IC MspInit Callback ID */
- , HAL_TIM_IC_MSPDEINIT_CB_ID = 0x03U /*!< TIM IC MspDeInit Callback ID */
- , HAL_TIM_OC_MSPINIT_CB_ID = 0x04U /*!< TIM OC MspInit Callback ID */
- , HAL_TIM_OC_MSPDEINIT_CB_ID = 0x05U /*!< TIM OC MspDeInit Callback ID */
- , HAL_TIM_PWM_MSPINIT_CB_ID = 0x06U /*!< TIM PWM MspInit Callback ID */
- , HAL_TIM_PWM_MSPDEINIT_CB_ID = 0x07U /*!< TIM PWM MspDeInit Callback ID */
- , HAL_TIM_ONE_PULSE_MSPINIT_CB_ID = 0x08U /*!< TIM One Pulse MspInit Callback ID */
- , HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID = 0x09U /*!< TIM One Pulse MspDeInit Callback ID */
- , HAL_TIM_ENCODER_MSPINIT_CB_ID = 0x0AU /*!< TIM Encoder MspInit Callback ID */
- , HAL_TIM_ENCODER_MSPDEINIT_CB_ID = 0x0BU /*!< TIM Encoder MspDeInit Callback ID */
- , HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID = 0x0CU /*!< TIM Hall Sensor MspDeInit Callback ID */
- , HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID = 0x0DU /*!< TIM Hall Sensor MspDeInit Callback ID */
+ HAL_TIM_BASE_MSPINIT_CB_ID = 0x00U /*!< TIM Base MspInit Callback ID */
+ , HAL_TIM_BASE_MSPDEINIT_CB_ID = 0x01U /*!< TIM Base MspDeInit Callback ID */
+ , HAL_TIM_IC_MSPINIT_CB_ID = 0x02U /*!< TIM IC MspInit Callback ID */
+ , HAL_TIM_IC_MSPDEINIT_CB_ID = 0x03U /*!< TIM IC MspDeInit Callback ID */
+ , HAL_TIM_OC_MSPINIT_CB_ID = 0x04U /*!< TIM OC MspInit Callback ID */
+ , HAL_TIM_OC_MSPDEINIT_CB_ID = 0x05U /*!< TIM OC MspDeInit Callback ID */
+ , HAL_TIM_PWM_MSPINIT_CB_ID = 0x06U /*!< TIM PWM MspInit Callback ID */
+ , HAL_TIM_PWM_MSPDEINIT_CB_ID = 0x07U /*!< TIM PWM MspDeInit Callback ID */
+ , HAL_TIM_ONE_PULSE_MSPINIT_CB_ID = 0x08U /*!< TIM One Pulse MspInit Callback ID */
+ , HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID = 0x09U /*!< TIM One Pulse MspDeInit Callback ID */
+ , HAL_TIM_ENCODER_MSPINIT_CB_ID = 0x0AU /*!< TIM Encoder MspInit Callback ID */
+ , HAL_TIM_ENCODER_MSPDEINIT_CB_ID = 0x0BU /*!< TIM Encoder MspDeInit Callback ID */
+ , HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID = 0x0CU /*!< TIM Hall Sensor MspDeInit Callback ID */
+ , HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID = 0x0DU /*!< TIM Hall Sensor MspDeInit Callback ID */
, HAL_TIM_PERIOD_ELAPSED_CB_ID = 0x0EU /*!< TIM Period Elapsed Callback ID */
, HAL_TIM_PERIOD_ELAPSED_HALF_CB_ID = 0x0FU /*!< TIM Period Elapsed half complete Callback ID */
, HAL_TIM_TRIGGER_CB_ID = 0x10U /*!< TIM Trigger Callback ID */
, HAL_TIM_TRIGGER_HALF_CB_ID = 0x11U /*!< TIM Trigger half complete Callback ID */
-
, HAL_TIM_IC_CAPTURE_CB_ID = 0x12U /*!< TIM Input Capture Callback ID */
, HAL_TIM_IC_CAPTURE_HALF_CB_ID = 0x13U /*!< TIM Input Capture half complete Callback ID */
, HAL_TIM_OC_DELAY_ELAPSED_CB_ID = 0x14U /*!< TIM Output Compare Delay Elapsed Callback ID */
- , HAL_TIM_PWM_PULSE_FINISHED_CB_ID = 0x15U /*!< TIM PWM Pulse Finished Callback ID */
+ , HAL_TIM_PWM_PULSE_FINISHED_CB_ID = 0x15U /*!< TIM PWM Pulse Finished Callback ID */
, HAL_TIM_PWM_PULSE_FINISHED_HALF_CB_ID = 0x16U /*!< TIM PWM Pulse Finished half complete Callback ID */
, HAL_TIM_ERROR_CB_ID = 0x17U /*!< TIM Error Callback ID */
, HAL_TIM_COMMUTATION_CB_ID = 0x18U /*!< TIM Commutation Callback ID */
@@ -1707,7 +1706,6 @@
#define IS_TIM_BREAK_FILTER(__BRKFILTER__) ((__BRKFILTER__) <= 0xFUL)
-
#define IS_TIM_BREAK_STATE(__STATE__) (((__STATE__) == TIM_BREAK_ENABLE) || \
((__STATE__) == TIM_BREAK_DISABLE))
@@ -2045,7 +2043,8 @@
HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro(TIM_HandleTypeDef *htim, const TIM_SlaveConfigTypeDef *sSlaveConfig);
HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro_IT(TIM_HandleTypeDef *htim, const TIM_SlaveConfigTypeDef *sSlaveConfig);
HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
- uint32_t BurstRequestSrc, const uint32_t *BurstBuffer, uint32_t BurstLength);
+ uint32_t BurstRequestSrc, const uint32_t *BurstBuffer,
+ uint32_t BurstLength);
HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
uint32_t BurstRequestSrc, const uint32_t *BurstBuffer,
uint32_t BurstLength, uint32_t DataLength);
diff --git a/Inc/stm32f1xx_hal_usart.h b/Inc/stm32f1xx_hal_usart.h
index 7952f3b..6c3b858 100644
--- a/Inc/stm32f1xx_hal_usart.h
+++ b/Inc/stm32f1xx_hal_usart.h
@@ -624,7 +624,7 @@
*/
/* Private functions ---------------------------------------------------------*/
-/** @defgroup USART_Private_Functions USART Private Functions
+/** @addtogroup USART_Private_Functions
* @{
*/
diff --git a/Inc/stm32f1xx_hal_wwdg.h b/Inc/stm32f1xx_hal_wwdg.h
index 6179e20..52bb676 100644
--- a/Inc/stm32f1xx_hal_wwdg.h
+++ b/Inc/stm32f1xx_hal_wwdg.h
@@ -183,7 +183,7 @@
/**
* @brief Enable the WWDG early wakeup interrupt.
- * @param __HANDLE__ WWDG handle
+ * @param __HANDLE__: WWDG handle
* @param __INTERRUPT__ specifies the interrupt to enable.
* This parameter can be one of the following values:
* @arg WWDG_IT_EWI: Early wakeup interrupt
@@ -296,3 +296,4 @@
#endif
#endif /* STM32F1xx_HAL_WWDG_H */
+
diff --git a/Inc/stm32f1xx_ll_adc.h b/Inc/stm32f1xx_ll_adc.h
index d6c28b8..a3a3592 100644
--- a/Inc/stm32f1xx_ll_adc.h
+++ b/Inc/stm32f1xx_ll_adc.h
@@ -3686,7 +3686,7 @@
/* end of unitary conversion. */
/* Flag noted as "JEOC" is corresponding to flag "JEOS" */
/* in other STM32 families). */
- return (READ_BIT(ADC1->SR, ADC_SR_JEOC) == (ADC_SR_JEOC));
+ return (READ_BIT(ADCxy_COMMON->SR, ADC_SR_JEOC) == (ADC_SR_JEOC));
}
/**
@@ -3717,7 +3717,7 @@
*/
__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_MST_AWD1(ADC_Common_TypeDef *ADCxy_COMMON)
{
- return (READ_BIT(ADC1->SR, LL_ADC_FLAG_AWD1) == (LL_ADC_FLAG_AWD1));
+ return (READ_BIT(ADCxy_COMMON->SR, LL_ADC_FLAG_AWD1) == (LL_ADC_FLAG_AWD1));
}
/**
diff --git a/Inc/stm32f1xx_ll_dac.h b/Inc/stm32f1xx_ll_dac.h
index 3e17bbf..6e885f0 100644
--- a/Inc/stm32f1xx_ll_dac.h
+++ b/Inc/stm32f1xx_ll_dac.h
@@ -87,7 +87,6 @@
#define DAC_REG_DORX_REGOFFSET_MASK (DAC_REG_DOR1_REGOFFSET | DAC_REG_DOR2_REGOFFSET)
-
#define DAC_REG_DHR_REGOFFSET_MASK_POSBIT0 0x0000000FUL /* Mask of data hold registers offset (DHR12Rx,
DHR12Lx, DHR8Rx, ...) when shifted to position 0 */
#define DAC_REG_DORX_REGOFFSET_MASK_POSBIT0 0x00000001UL /* Mask of DORx registers offset when shifted
@@ -473,7 +472,7 @@
* @arg @ref LL_DAC_RESOLUTION_8B
* @retval DAC conversion data (unit: digital value)
*/
-#define __LL_DAC_CALC_VOLTAGE_TO_DATA(__VREFANALOG_VOLTAGE__, __DAC_VOLTAGE__, __DAC_RESOLUTION__) \
+#define __LL_DAC_CALC_VOLTAGE_TO_DATA(__VREFANALOG_VOLTAGE__, __DAC_VOLTAGE__, __DAC_RESOLUTION__) \
((__DAC_VOLTAGE__) * __LL_DAC_DIGITAL_SCALE(__DAC_RESOLUTION__) \
/ (__VREFANALOG_VOLTAGE__) \
)
diff --git a/Inc/stm32f1xx_ll_fsmc.h b/Inc/stm32f1xx_ll_fsmc.h
index abd4788..118137b 100644
--- a/Inc/stm32f1xx_ll_fsmc.h
+++ b/Inc/stm32f1xx_ll_fsmc.h
@@ -41,47 +41,47 @@
#if defined(FSMC_BANK1)
#define IS_FSMC_NORSRAM_BANK(__BANK__) (((__BANK__) == FSMC_NORSRAM_BANK1) || \
- ((__BANK__) == FSMC_NORSRAM_BANK2) || \
- ((__BANK__) == FSMC_NORSRAM_BANK3) || \
- ((__BANK__) == FSMC_NORSRAM_BANK4))
+ ((__BANK__) == FSMC_NORSRAM_BANK2) || \
+ ((__BANK__) == FSMC_NORSRAM_BANK3) || \
+ ((__BANK__) == FSMC_NORSRAM_BANK4))
#define IS_FSMC_MUX(__MUX__) (((__MUX__) == FSMC_DATA_ADDRESS_MUX_DISABLE) || \
- ((__MUX__) == FSMC_DATA_ADDRESS_MUX_ENABLE))
+ ((__MUX__) == FSMC_DATA_ADDRESS_MUX_ENABLE))
#define IS_FSMC_MEMORY(__MEMORY__) (((__MEMORY__) == FSMC_MEMORY_TYPE_SRAM) || \
- ((__MEMORY__) == FSMC_MEMORY_TYPE_PSRAM)|| \
- ((__MEMORY__) == FSMC_MEMORY_TYPE_NOR))
+ ((__MEMORY__) == FSMC_MEMORY_TYPE_PSRAM)|| \
+ ((__MEMORY__) == FSMC_MEMORY_TYPE_NOR))
#define IS_FSMC_NORSRAM_MEMORY_WIDTH(__WIDTH__) (((__WIDTH__) == FSMC_NORSRAM_MEM_BUS_WIDTH_8) || \
- ((__WIDTH__) == FSMC_NORSRAM_MEM_BUS_WIDTH_16) || \
- ((__WIDTH__) == FSMC_NORSRAM_MEM_BUS_WIDTH_32))
+ ((__WIDTH__) == FSMC_NORSRAM_MEM_BUS_WIDTH_16) || \
+ ((__WIDTH__) == FSMC_NORSRAM_MEM_BUS_WIDTH_32))
#define IS_FSMC_PAGESIZE(__SIZE__) (((__SIZE__) == FSMC_PAGE_SIZE_NONE) || \
- ((__SIZE__) == FSMC_PAGE_SIZE_128) || \
- ((__SIZE__) == FSMC_PAGE_SIZE_256) || \
- ((__SIZE__) == FSMC_PAGE_SIZE_512) || \
- ((__SIZE__) == FSMC_PAGE_SIZE_1024))
+ ((__SIZE__) == FSMC_PAGE_SIZE_128) || \
+ ((__SIZE__) == FSMC_PAGE_SIZE_256) || \
+ ((__SIZE__) == FSMC_PAGE_SIZE_512) || \
+ ((__SIZE__) == FSMC_PAGE_SIZE_1024))
#define IS_FSMC_ACCESS_MODE(__MODE__) (((__MODE__) == FSMC_ACCESS_MODE_A) || \
- ((__MODE__) == FSMC_ACCESS_MODE_B) || \
- ((__MODE__) == FSMC_ACCESS_MODE_C) || \
- ((__MODE__) == FSMC_ACCESS_MODE_D))
+ ((__MODE__) == FSMC_ACCESS_MODE_B) || \
+ ((__MODE__) == FSMC_ACCESS_MODE_C) || \
+ ((__MODE__) == FSMC_ACCESS_MODE_D))
#define IS_FSMC_BURSTMODE(__STATE__) (((__STATE__) == FSMC_BURST_ACCESS_MODE_DISABLE) || \
- ((__STATE__) == FSMC_BURST_ACCESS_MODE_ENABLE))
+ ((__STATE__) == FSMC_BURST_ACCESS_MODE_ENABLE))
#define IS_FSMC_WAIT_POLARITY(__POLARITY__) (((__POLARITY__) == FSMC_WAIT_SIGNAL_POLARITY_LOW) || \
- ((__POLARITY__) == FSMC_WAIT_SIGNAL_POLARITY_HIGH))
+ ((__POLARITY__) == FSMC_WAIT_SIGNAL_POLARITY_HIGH))
#define IS_FSMC_WRAP_MODE(__MODE__) (((__MODE__) == FSMC_WRAP_MODE_DISABLE) || \
- ((__MODE__) == FSMC_WRAP_MODE_ENABLE))
+ ((__MODE__) == FSMC_WRAP_MODE_ENABLE))
#define IS_FSMC_WAIT_SIGNAL_ACTIVE(__ACTIVE__) (((__ACTIVE__) == FSMC_WAIT_TIMING_BEFORE_WS) || \
- ((__ACTIVE__) == FSMC_WAIT_TIMING_DURING_WS))
+ ((__ACTIVE__) == FSMC_WAIT_TIMING_DURING_WS))
#define IS_FSMC_WRITE_OPERATION(__OPERATION__) (((__OPERATION__) == FSMC_WRITE_OPERATION_DISABLE) || \
- ((__OPERATION__) == FSMC_WRITE_OPERATION_ENABLE))
+ ((__OPERATION__) == FSMC_WRITE_OPERATION_ENABLE))
#define IS_FSMC_WAITE_SIGNAL(__SIGNAL__) (((__SIGNAL__) == FSMC_WAIT_SIGNAL_DISABLE) || \
- ((__SIGNAL__) == FSMC_WAIT_SIGNAL_ENABLE))
+ ((__SIGNAL__) == FSMC_WAIT_SIGNAL_ENABLE))
#define IS_FSMC_EXTENDED_MODE(__MODE__) (((__MODE__) == FSMC_EXTENDED_MODE_DISABLE) || \
- ((__MODE__) == FSMC_EXTENDED_MODE_ENABLE))
+ ((__MODE__) == FSMC_EXTENDED_MODE_ENABLE))
#define IS_FSMC_ASYNWAIT(__STATE__) (((__STATE__) == FSMC_ASYNCHRONOUS_WAIT_DISABLE) || \
- ((__STATE__) == FSMC_ASYNCHRONOUS_WAIT_ENABLE))
+ ((__STATE__) == FSMC_ASYNCHRONOUS_WAIT_ENABLE))
#define IS_FSMC_DATA_LATENCY(__LATENCY__) (((__LATENCY__) > 1U) && ((__LATENCY__) <= 17U))
#define IS_FSMC_WRITE_BURST(__BURST__) (((__BURST__) == FSMC_WRITE_BURST_DISABLE) || \
- ((__BURST__) == FSMC_WRITE_BURST_ENABLE))
+ ((__BURST__) == FSMC_WRITE_BURST_ENABLE))
#define IS_FSMC_CONTINOUS_CLOCK(__CCLOCK__) (((__CCLOCK__) == FSMC_CONTINUOUS_CLOCK_SYNC_ONLY) || \
- ((__CCLOCK__) == FSMC_CONTINUOUS_CLOCK_SYNC_ASYNC))
+ ((__CCLOCK__) == FSMC_CONTINUOUS_CLOCK_SYNC_ASYNC))
#define IS_FSMC_ADDRESS_SETUP_TIME(__TIME__) ((__TIME__) <= 15U)
#define IS_FSMC_ADDRESS_HOLD_TIME(__TIME__) (((__TIME__) > 0U) && ((__TIME__) <= 15U))
#define IS_FSMC_DATASETUP_TIME(__TIME__) (((__TIME__) > 0U) && ((__TIME__) <= 255U))
@@ -96,18 +96,18 @@
#define IS_FSMC_NAND_BANK(__BANK__) ((__BANK__) == FSMC_NAND_BANK3)
#define IS_FSMC_WAIT_FEATURE(__FEATURE__) (((__FEATURE__) == FSMC_NAND_PCC_WAIT_FEATURE_DISABLE) || \
- ((__FEATURE__) == FSMC_NAND_PCC_WAIT_FEATURE_ENABLE))
+ ((__FEATURE__) == FSMC_NAND_PCC_WAIT_FEATURE_ENABLE))
#define IS_FSMC_NAND_MEMORY_WIDTH(__WIDTH__) (((__WIDTH__) == FSMC_NAND_PCC_MEM_BUS_WIDTH_8) || \
- ((__WIDTH__) == FSMC_NAND_PCC_MEM_BUS_WIDTH_16))
+ ((__WIDTH__) == FSMC_NAND_PCC_MEM_BUS_WIDTH_16))
#define IS_FSMC_ECC_STATE(__STATE__) (((__STATE__) == FSMC_NAND_ECC_DISABLE) || \
- ((__STATE__) == FSMC_NAND_ECC_ENABLE))
+ ((__STATE__) == FSMC_NAND_ECC_ENABLE))
#define IS_FSMC_ECCPAGE_SIZE(__SIZE__) (((__SIZE__) == FSMC_NAND_ECC_PAGE_SIZE_256BYTE) || \
- ((__SIZE__) == FSMC_NAND_ECC_PAGE_SIZE_512BYTE) || \
- ((__SIZE__) == FSMC_NAND_ECC_PAGE_SIZE_1024BYTE) || \
- ((__SIZE__) == FSMC_NAND_ECC_PAGE_SIZE_2048BYTE) || \
- ((__SIZE__) == FSMC_NAND_ECC_PAGE_SIZE_4096BYTE) || \
- ((__SIZE__) == FSMC_NAND_ECC_PAGE_SIZE_8192BYTE))
+ ((__SIZE__) == FSMC_NAND_ECC_PAGE_SIZE_512BYTE) || \
+ ((__SIZE__) == FSMC_NAND_ECC_PAGE_SIZE_1024BYTE) || \
+ ((__SIZE__) == FSMC_NAND_ECC_PAGE_SIZE_2048BYTE) || \
+ ((__SIZE__) == FSMC_NAND_ECC_PAGE_SIZE_4096BYTE) || \
+ ((__SIZE__) == FSMC_NAND_ECC_PAGE_SIZE_8192BYTE))
#define IS_FSMC_TCLR_TIME(__TIME__) ((__TIME__) <= 255U)
#define IS_FSMC_TAR_TIME(__TIME__) ((__TIME__) <= 255U)
#define IS_FSMC_SETUP_TIME(__TIME__) ((__TIME__) <= 254U)
@@ -161,56 +161,57 @@
typedef struct
{
uint32_t NSBank; /*!< Specifies the NORSRAM memory device that will be used.
- This parameter can be a value of @ref FSMC_NORSRAM_Bank */
+ This parameter can be a value of @ref FSMC_NORSRAM_Bank */
uint32_t DataAddressMux; /*!< Specifies whether the address and data values are
multiplexed on the data bus or not.
- This parameter can be a value of @ref FSMC_Data_Address_Bus_Multiplexing */
+ This parameter can be a value of @ref FSMC_Data_Address_Bus_Multiplexing*/
uint32_t MemoryType; /*!< Specifies the type of external memory attached to
the corresponding memory device.
- This parameter can be a value of @ref FSMC_Memory_Type */
+ This parameter can be a value of @ref FSMC_Memory_Type */
uint32_t MemoryDataWidth; /*!< Specifies the external memory device width.
- This parameter can be a value of @ref FSMC_NORSRAM_Data_Width */
+ This parameter can be a value of @ref FSMC_NORSRAM_Data_Width */
uint32_t BurstAccessMode; /*!< Enables or disables the burst access mode for Flash memory,
valid only with synchronous burst Flash memories.
- This parameter can be a value of @ref FSMC_Burst_Access_Mode */
+ This parameter can be a value of @ref FSMC_Burst_Access_Mode */
uint32_t WaitSignalPolarity; /*!< Specifies the wait signal polarity, valid only when accessing
the Flash memory in burst mode.
- This parameter can be a value of @ref FSMC_Wait_Signal_Polarity */
+ This parameter can be a value of @ref FSMC_Wait_Signal_Polarity */
uint32_t WrapMode; /*!< Enables or disables the Wrapped burst access mode for Flash
memory, valid only when accessing Flash memories in burst mode.
- This parameter can be a value of @ref FSMC_Wrap_Mode */
+ This parameter can be a value of @ref FSMC_Wrap_Mode */
uint32_t WaitSignalActive; /*!< Specifies if the wait signal is asserted by the memory one
clock cycle before the wait state or during the wait state,
valid only when accessing memories in burst mode.
- This parameter can be a value of @ref FSMC_Wait_Timing */
+ This parameter can be a value of @ref FSMC_Wait_Timing */
- uint32_t WriteOperation; /*!< Enables or disables the write operation in the selected device by the FSMC.
- This parameter can be a value of @ref FSMC_Write_Operation */
+ uint32_t WriteOperation; /*!< Enables or disables the write operation in the selected device
+ by the FSMC.
+ This parameter can be a value of @ref FSMC_Write_Operation */
uint32_t WaitSignal; /*!< Enables or disables the wait state insertion via wait
signal, valid for Flash memory access in burst mode.
- This parameter can be a value of @ref FSMC_Wait_Signal */
+ This parameter can be a value of @ref FSMC_Wait_Signal */
uint32_t ExtendedMode; /*!< Enables or disables the extended mode.
- This parameter can be a value of @ref FSMC_Extended_Mode */
+ This parameter can be a value of @ref FSMC_Extended_Mode */
uint32_t AsynchronousWait; /*!< Enables or disables wait signal during asynchronous transfers,
valid only with asynchronous Flash memories.
- This parameter can be a value of @ref FSMC_AsynchronousWait */
+ This parameter can be a value of @ref FSMC_AsynchronousWait */
uint32_t WriteBurst; /*!< Enables or disables the write burst operation.
- This parameter can be a value of @ref FSMC_Write_Burst */
+ This parameter can be a value of @ref FSMC_Write_Burst */
uint32_t PageSize; /*!< Specifies the memory page size.
- This parameter can be a value of @ref FSMC_Page_Size */
+ This parameter can be a value of @ref FSMC_Page_Size */
} FSMC_NORSRAM_InitTypeDef;
/**
@@ -254,7 +255,7 @@
in NOR Flash memories with synchronous burst mode enable */
uint32_t AccessMode; /*!< Specifies the asynchronous access mode.
- This parameter can be a value of @ref FSMC_Access_Mode */
+ This parameter can be a value of @ref FSMC_Access_Mode */
} FSMC_NORSRAM_TimingTypeDef;
#endif /* FSMC_BANK1 */
@@ -338,7 +339,7 @@
uint32_t TARSetupTime; /*!< Defines the number of HCLK cycles to configure the
delay between ALE low and RE low.
This parameter can be a number between Min_Data = 0 and Max_Data = 255 */
-}FSMC_PCCARD_InitTypeDef;
+} FSMC_PCCARD_InitTypeDef;
#endif /* FSMC_BANK4 */
/**
@@ -643,7 +644,7 @@
* @retval None
*/
#define __FSMC_NORSRAM_ENABLE(__INSTANCE__, __BANK__) ((__INSTANCE__)->BTCR[(__BANK__)]\
- |= FSMC_BCRx_MBKEN)
+ |= FSMC_BCRx_MBKEN)
/**
* @brief Disable the NORSRAM device access.
@@ -652,7 +653,7 @@
* @retval None
*/
#define __FSMC_NORSRAM_DISABLE(__INSTANCE__, __BANK__) ((__INSTANCE__)->BTCR[(__BANK__)]\
- &= ~FSMC_BCRx_MBKEN)
+ &= ~FSMC_BCRx_MBKEN)
/**
* @}
@@ -671,8 +672,9 @@
* @param __BANK__ FSMC_NAND Bank
* @retval None
*/
-#define __FSMC_NAND_ENABLE(__INSTANCE__, __BANK__) (((__BANK__) == FSMC_NAND_BANK2)? ((__INSTANCE__)->PCR2 |= FSMC_PCRx_PBKEN): \
- ((__INSTANCE__)->PCR3 |= FSMC_PCRx_PBKEN))
+#define __FSMC_NAND_ENABLE(__INSTANCE__, __BANK__) (((__BANK__) == FSMC_NAND_BANK2) ? \
+ ((__INSTANCE__)->PCR2 |= FSMC_PCRx_PBKEN) : \
+ ((__INSTANCE__)->PCR3 |= FSMC_PCRx_PBKEN))
/**
* @brief Disable the NAND device access.
@@ -680,8 +682,9 @@
* @param __BANK__ FSMC_NAND Bank
* @retval None
*/
-#define __FSMC_NAND_DISABLE(__INSTANCE__, __BANK__) (((__BANK__) == FSMC_NAND_BANK2)? CLEAR_BIT((__INSTANCE__)->PCR2, FSMC_PCRx_PBKEN): \
- CLEAR_BIT((__INSTANCE__)->PCR3, FSMC_PCRx_PBKEN))
+#define __FSMC_NAND_DISABLE(__INSTANCE__, __BANK__) (((__BANK__) == FSMC_NAND_BANK2) ? \
+ CLEAR_BIT((__INSTANCE__)->PCR2, FSMC_PCRx_PBKEN) : \
+ CLEAR_BIT((__INSTANCE__)->PCR3, FSMC_PCRx_PBKEN))
/**
* @}
@@ -710,7 +713,7 @@
* @}
*/
-#endif
+#endif /* FSMC_BANK4 */
#if defined(FSMC_BANK3)
/** @defgroup FSMC_LL_NAND_Interrupt FSMC NAND Interrupt
* @brief macros to handle NAND interrupts
@@ -728,8 +731,9 @@
* @arg FSMC_IT_FALLING_EDGE: Interrupt falling edge.
* @retval None
*/
-#define __FSMC_NAND_ENABLE_IT(__INSTANCE__, __BANK__, __INTERRUPT__) (((__BANK__) == FSMC_NAND_BANK2)? ((__INSTANCE__)->SR2 |= (__INTERRUPT__)): \
- ((__INSTANCE__)->SR3 |= (__INTERRUPT__)))
+#define __FSMC_NAND_ENABLE_IT(__INSTANCE__, __BANK__, __INTERRUPT__) (((__BANK__) == FSMC_NAND_BANK2) ? \
+ ((__INSTANCE__)->SR2 |= (__INTERRUPT__)) : \
+ ((__INSTANCE__)->SR3 |= (__INTERRUPT__)))
/**
* @brief Disable the NAND device interrupt.
@@ -742,8 +746,9 @@
* @arg FSMC_IT_FALLING_EDGE: Interrupt falling edge.
* @retval None
*/
-#define __FSMC_NAND_DISABLE_IT(__INSTANCE__, __BANK__, __INTERRUPT__) (((__BANK__) == FSMC_NAND_BANK2)? ((__INSTANCE__)->SR2 &= ~(__INTERRUPT__)): \
- ((__INSTANCE__)->SR3 &= ~(__INTERRUPT__)))
+#define __FSMC_NAND_DISABLE_IT(__INSTANCE__, __BANK__, __INTERRUPT__) (((__BANK__) == FSMC_NAND_BANK2) ? \
+ ((__INSTANCE__)->SR2 &= ~(__INTERRUPT__)) : \
+ ((__INSTANCE__)->SR3 &= ~(__INTERRUPT__)))
/**
* @brief Get flag status of the NAND device.
@@ -757,8 +762,9 @@
* @arg FSMC_FLAG_FEMPT: FIFO empty flag.
* @retval The state of FLAG (SET or RESET).
*/
-#define __FSMC_NAND_GET_FLAG(__INSTANCE__, __BANK__, __FLAG__) (((__BANK__) == FSMC_NAND_BANK2)? (((__INSTANCE__)->SR2 &(__FLAG__)) == (__FLAG__)): \
- (((__INSTANCE__)->SR3 &(__FLAG__)) == (__FLAG__)))
+#define __FSMC_NAND_GET_FLAG(__INSTANCE__, __BANK__, __FLAG__) (((__BANK__) == FSMC_NAND_BANK2) ? \
+ (((__INSTANCE__)->SR2 &(__FLAG__)) == (__FLAG__)) : \
+ (((__INSTANCE__)->SR3 &(__FLAG__)) == (__FLAG__)))
/**
* @brief Clear flag status of the NAND device.
@@ -772,8 +778,9 @@
* @arg FSMC_FLAG_FEMPT: FIFO empty flag.
* @retval None
*/
-#define __FSMC_NAND_CLEAR_FLAG(__INSTANCE__, __BANK__, __FLAG__) (((__BANK__) == FSMC_NAND_BANK2)? ((__INSTANCE__)->SR2 &= ~(__FLAG__)): \
- ((__INSTANCE__)->SR3 &= ~(__FLAG__)))
+#define __FSMC_NAND_CLEAR_FLAG(__INSTANCE__, __BANK__, __FLAG__) (((__BANK__) == FSMC_NAND_BANK2) ? \
+ ((__INSTANCE__)->SR2 &= ~(__FLAG__)) : \
+ ((__INSTANCE__)->SR3 &= ~(__FLAG__)))
/**
* @}
@@ -839,7 +846,7 @@
/**
* @}
*/
-#endif
+#endif /* FSMC_BANK4 */
/**
* @}
@@ -862,14 +869,14 @@
* @{
*/
HAL_StatusTypeDef FSMC_NORSRAM_Init(FSMC_NORSRAM_TypeDef *Device,
- FSMC_NORSRAM_InitTypeDef *Init);
+ const FSMC_NORSRAM_InitTypeDef *Init);
HAL_StatusTypeDef FSMC_NORSRAM_Timing_Init(FSMC_NORSRAM_TypeDef *Device,
- FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank);
+ const FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank);
HAL_StatusTypeDef FSMC_NORSRAM_Extended_Timing_Init(FSMC_NORSRAM_EXTENDED_TypeDef *Device,
- FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank,
- uint32_t ExtendedMode);
+ const FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank,
+ uint32_t ExtendedMode);
HAL_StatusTypeDef FSMC_NORSRAM_DeInit(FSMC_NORSRAM_TypeDef *Device,
- FSMC_NORSRAM_EXTENDED_TypeDef *ExDevice, uint32_t Bank);
+ FSMC_NORSRAM_EXTENDED_TypeDef *ExDevice, uint32_t Bank);
/**
* @}
*/
@@ -894,11 +901,11 @@
/** @defgroup FSMC_LL_NAND_Private_Functions_Group1 NAND Initialization/de-initialization functions
* @{
*/
-HAL_StatusTypeDef FSMC_NAND_Init(FSMC_NAND_TypeDef *Device, FSMC_NAND_InitTypeDef *Init);
+HAL_StatusTypeDef FSMC_NAND_Init(FSMC_NAND_TypeDef *Device, const FSMC_NAND_InitTypeDef *Init);
HAL_StatusTypeDef FSMC_NAND_CommonSpace_Timing_Init(FSMC_NAND_TypeDef *Device,
- FSMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank);
+ const FSMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank);
HAL_StatusTypeDef FSMC_NAND_AttributeSpace_Timing_Init(FSMC_NAND_TypeDef *Device,
- FSMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank);
+ const FSMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank);
HAL_StatusTypeDef FSMC_NAND_DeInit(FSMC_NAND_TypeDef *Device, uint32_t Bank);
/**
* @}
@@ -909,8 +916,8 @@
*/
HAL_StatusTypeDef FSMC_NAND_ECC_Enable(FSMC_NAND_TypeDef *Device, uint32_t Bank);
HAL_StatusTypeDef FSMC_NAND_ECC_Disable(FSMC_NAND_TypeDef *Device, uint32_t Bank);
-HAL_StatusTypeDef FSMC_NAND_GetECC(FSMC_NAND_TypeDef *Device, uint32_t *ECCval, uint32_t Bank,
- uint32_t Timeout);
+HAL_StatusTypeDef FSMC_NAND_GetECC(const FSMC_NAND_TypeDef *Device, uint32_t *ECCval, uint32_t Bank,
+ uint32_t Timeout);
/**
* @}
*/
@@ -926,13 +933,13 @@
/** @defgroup FSMC_LL_PCCARD_Private_Functions_Group1 PCCARD Initialization/de-initialization functions
* @{
*/
-HAL_StatusTypeDef FSMC_PCCARD_Init(FSMC_PCCARD_TypeDef *Device, FSMC_PCCARD_InitTypeDef *Init);
+HAL_StatusTypeDef FSMC_PCCARD_Init(FSMC_PCCARD_TypeDef *Device, const FSMC_PCCARD_InitTypeDef *Init);
HAL_StatusTypeDef FSMC_PCCARD_CommonSpace_Timing_Init(FSMC_PCCARD_TypeDef *Device,
- FSMC_NAND_PCC_TimingTypeDef *Timing);
+ const FSMC_NAND_PCC_TimingTypeDef *Timing);
HAL_StatusTypeDef FSMC_PCCARD_AttributeSpace_Timing_Init(FSMC_PCCARD_TypeDef *Device,
- FSMC_NAND_PCC_TimingTypeDef *Timing);
+ const FSMC_NAND_PCC_TimingTypeDef *Timing);
HAL_StatusTypeDef FSMC_PCCARD_IOSpace_Timing_Init(FSMC_PCCARD_TypeDef *Device,
- FSMC_NAND_PCC_TimingTypeDef *Timing);
+ const FSMC_NAND_PCC_TimingTypeDef *Timing);
HAL_StatusTypeDef FSMC_PCCARD_DeInit(FSMC_PCCARD_TypeDef *Device);
/**
* @}
diff --git a/Inc/stm32f1xx_ll_iwdg.h b/Inc/stm32f1xx_ll_iwdg.h
index ea718ec..5dce390 100644
--- a/Inc/stm32f1xx_ll_iwdg.h
+++ b/Inc/stm32f1xx_ll_iwdg.h
@@ -207,7 +207,7 @@
* @arg @ref LL_IWDG_PRESCALER_128
* @arg @ref LL_IWDG_PRESCALER_256
*/
-__STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(IWDG_TypeDef *IWDGx)
+__STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(const IWDG_TypeDef *IWDGx)
{
return (READ_REG(IWDGx->PR));
}
@@ -230,7 +230,7 @@
* @param IWDGx IWDG Instance
* @retval Value between Min_Data=0 and Max_Data=0x0FFF
*/
-__STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(IWDG_TypeDef *IWDGx)
+__STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(const IWDG_TypeDef *IWDGx)
{
return (READ_REG(IWDGx->RLR));
}
@@ -249,7 +249,7 @@
* @param IWDGx IWDG Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(IWDG_TypeDef *IWDGx)
+__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(const IWDG_TypeDef *IWDGx)
{
return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU) == (IWDG_SR_PVU)) ? 1UL : 0UL);
}
@@ -260,7 +260,7 @@
* @param IWDGx IWDG Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(IWDG_TypeDef *IWDGx)
+__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(const IWDG_TypeDef *IWDGx)
{
return ((READ_BIT(IWDGx->SR, IWDG_SR_RVU) == (IWDG_SR_RVU)) ? 1UL : 0UL);
}
@@ -272,7 +272,7 @@
* @param IWDGx IWDG Instance
* @retval State of bits (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_IWDG_IsReady(IWDG_TypeDef *IWDGx)
+__STATIC_INLINE uint32_t LL_IWDG_IsReady(const IWDG_TypeDef *IWDGx)
{
return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU) == 0U) ? 1UL : 0UL);
}
diff --git a/Inc/stm32f1xx_ll_sdmmc.h b/Inc/stm32f1xx_ll_sdmmc.h
index 1e0ad5e..0c2541f 100644
--- a/Inc/stm32f1xx_ll_sdmmc.h
+++ b/Inc/stm32f1xx_ll_sdmmc.h
@@ -300,10 +300,14 @@
#define SDMMC_SINGLE_BUS_SUPPORT 0x00010000U
#define SDMMC_CARD_LOCKED 0x02000000U
-#ifndef SDMMC_DATATIMEOUT
-#define SDMMC_DATATIMEOUT 0xFFFFFFFFU
+#ifndef SDMMC_DATATIMEOUT /*Hardware Data Timeout (ms) */
+#define SDMMC_DATATIMEOUT ((uint32_t)0xFFFFFFFFU)
#endif /* SDMMC_DATATIMEOUT */
+#ifndef SDMMC_SWDATATIMEOUT /*Software Data Timeout (ms) */
+#define SDMMC_SWDATATIMEOUT SDMMC_DATATIMEOUT
+#endif /* SDMMC_SWDATATIMEOUT */
+
#define SDMMC_0TO7BITS 0x000000FFU
#define SDMMC_8TO15BITS 0x0000FF00U
#define SDMMC_16TO23BITS 0x00FF0000U
diff --git a/Inc/stm32f1xx_ll_spi.h b/Inc/stm32f1xx_ll_spi.h
index 37e00b1..15bfc9a 100644
--- a/Inc/stm32f1xx_ll_spi.h
+++ b/Inc/stm32f1xx_ll_spi.h
@@ -55,53 +55,66 @@
uint32_t TransferDirection; /*!< Specifies the SPI unidirectional or bidirectional data mode.
This parameter can be a value of @ref SPI_LL_EC_TRANSFER_MODE.
- This feature can be modified afterwards using unitary function @ref LL_SPI_SetTransferDirection().*/
+ This feature can be modified afterwards using unitary
+ function @ref LL_SPI_SetTransferDirection().*/
uint32_t Mode; /*!< Specifies the SPI mode (Master/Slave).
This parameter can be a value of @ref SPI_LL_EC_MODE.
- This feature can be modified afterwards using unitary function @ref LL_SPI_SetMode().*/
+ This feature can be modified afterwards using unitary
+ function @ref LL_SPI_SetMode().*/
uint32_t DataWidth; /*!< Specifies the SPI data width.
This parameter can be a value of @ref SPI_LL_EC_DATAWIDTH.
- This feature can be modified afterwards using unitary function @ref LL_SPI_SetDataWidth().*/
+ This feature can be modified afterwards using unitary
+ function @ref LL_SPI_SetDataWidth().*/
uint32_t ClockPolarity; /*!< Specifies the serial clock steady state.
This parameter can be a value of @ref SPI_LL_EC_POLARITY.
- This feature can be modified afterwards using unitary function @ref LL_SPI_SetClockPolarity().*/
+ This feature can be modified afterwards using unitary
+ function @ref LL_SPI_SetClockPolarity().*/
uint32_t ClockPhase; /*!< Specifies the clock active edge for the bit capture.
This parameter can be a value of @ref SPI_LL_EC_PHASE.
- This feature can be modified afterwards using unitary function @ref LL_SPI_SetClockPhase().*/
+ This feature can be modified afterwards using unitary
+ function @ref LL_SPI_SetClockPhase().*/
- uint32_t NSS; /*!< Specifies whether the NSS signal is managed by hardware (NSS pin) or by software using the SSI bit.
+ uint32_t NSS; /*!< Specifies whether the NSS signal is managed by hardware (NSS pin)
+ or by software using the SSI bit.
This parameter can be a value of @ref SPI_LL_EC_NSS_MODE.
- This feature can be modified afterwards using unitary function @ref LL_SPI_SetNSSMode().*/
+ This feature can be modified afterwards using unitary
+ function @ref LL_SPI_SetNSSMode().*/
- uint32_t BaudRate; /*!< Specifies the BaudRate prescaler value which will be used to configure the transmit and receive SCK clock.
+ uint32_t BaudRate; /*!< Specifies the BaudRate prescaler value which will be used
+ to configure the transmit and receive SCK clock.
This parameter can be a value of @ref SPI_LL_EC_BAUDRATEPRESCALER.
- @note The communication clock is derived from the master clock. The slave clock does not need to be set.
+ @note The communication clock is derived from the master clock.
+ The slave clock does not need to be set.
- This feature can be modified afterwards using unitary function @ref LL_SPI_SetBaudRatePrescaler().*/
+ This feature can be modified afterwards using unitary
+ function @ref LL_SPI_SetBaudRatePrescaler().*/
uint32_t BitOrder; /*!< Specifies whether data transfers start from MSB or LSB bit.
This parameter can be a value of @ref SPI_LL_EC_BIT_ORDER.
- This feature can be modified afterwards using unitary function @ref LL_SPI_SetTransferBitOrder().*/
+ This feature can be modified afterwards using unitary
+ function @ref LL_SPI_SetTransferBitOrder().*/
uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not.
This parameter can be a value of @ref SPI_LL_EC_CRC_CALCULATION.
- This feature can be modified afterwards using unitary functions @ref LL_SPI_EnableCRC() and @ref LL_SPI_DisableCRC().*/
+ This feature can be modified afterwards using unitary
+ functions @ref LL_SPI_EnableCRC() and @ref LL_SPI_DisableCRC().*/
uint32_t CRCPoly; /*!< Specifies the polynomial used for the CRC calculation.
This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFFFF.
- This feature can be modified afterwards using unitary function @ref LL_SPI_SetCRCPolynomial().*/
+ This feature can be modified afterwards using unitary
+ function @ref LL_SPI_SetCRCPolynomial().*/
} LL_SPI_InitTypeDef;
@@ -309,7 +322,7 @@
* @param SPIx SPI Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_SPI_IsEnabled(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_SPI_IsEnabled(const SPI_TypeDef *SPIx)
{
return ((READ_BIT(SPIx->CR1, SPI_CR1_SPE) == (SPI_CR1_SPE)) ? 1UL : 0UL);
}
@@ -339,7 +352,7 @@
* @arg @ref LL_SPI_MODE_MASTER
* @arg @ref LL_SPI_MODE_SLAVE
*/
-__STATIC_INLINE uint32_t LL_SPI_GetMode(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_SPI_GetMode(const SPI_TypeDef *SPIx)
{
return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_MSTR | SPI_CR1_SSI));
}
@@ -369,7 +382,7 @@
* @arg @ref LL_SPI_PHASE_1EDGE
* @arg @ref LL_SPI_PHASE_2EDGE
*/
-__STATIC_INLINE uint32_t LL_SPI_GetClockPhase(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_SPI_GetClockPhase(const SPI_TypeDef *SPIx)
{
return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPHA));
}
@@ -398,7 +411,7 @@
* @arg @ref LL_SPI_POLARITY_LOW
* @arg @ref LL_SPI_POLARITY_HIGH
*/
-__STATIC_INLINE uint32_t LL_SPI_GetClockPolarity(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_SPI_GetClockPolarity(const SPI_TypeDef *SPIx)
{
return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPOL));
}
@@ -438,7 +451,7 @@
* @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV128
* @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV256
*/
-__STATIC_INLINE uint32_t LL_SPI_GetBaudRatePrescaler(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_SPI_GetBaudRatePrescaler(const SPI_TypeDef *SPIx)
{
return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_BR));
}
@@ -466,7 +479,7 @@
* @arg @ref LL_SPI_LSB_FIRST
* @arg @ref LL_SPI_MSB_FIRST
*/
-__STATIC_INLINE uint32_t LL_SPI_GetTransferBitOrder(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_SPI_GetTransferBitOrder(const SPI_TypeDef *SPIx)
{
return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_LSBFIRST));
}
@@ -503,7 +516,7 @@
* @arg @ref LL_SPI_HALF_DUPLEX_RX
* @arg @ref LL_SPI_HALF_DUPLEX_TX
*/
-__STATIC_INLINE uint32_t LL_SPI_GetTransferDirection(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_SPI_GetTransferDirection(const SPI_TypeDef *SPIx)
{
return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_RXONLY | SPI_CR1_BIDIMODE | SPI_CR1_BIDIOE));
}
@@ -530,7 +543,7 @@
* @arg @ref LL_SPI_DATAWIDTH_8BIT
* @arg @ref LL_SPI_DATAWIDTH_16BIT
*/
-__STATIC_INLINE uint32_t LL_SPI_GetDataWidth(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_SPI_GetDataWidth(const SPI_TypeDef *SPIx)
{
return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_DFF));
}
@@ -574,7 +587,7 @@
* @param SPIx SPI Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_SPI_IsEnabledCRC(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_SPI_IsEnabledCRC(const SPI_TypeDef *SPIx)
{
return ((READ_BIT(SPIx->CR1, SPI_CR1_CRCEN) == (SPI_CR1_CRCEN)) ? 1UL : 0UL);
}
@@ -609,7 +622,7 @@
* @param SPIx SPI Instance
* @retval Returned value is a number between Min_Data = 0x00 and Max_Data = 0xFFFF
*/
-__STATIC_INLINE uint32_t LL_SPI_GetCRCPolynomial(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_SPI_GetCRCPolynomial(const SPI_TypeDef *SPIx)
{
return (uint32_t)(READ_REG(SPIx->CRCPR));
}
@@ -620,7 +633,7 @@
* @param SPIx SPI Instance
* @retval Returned value is a number between Min_Data = 0x00 and Max_Data = 0xFFFF
*/
-__STATIC_INLINE uint32_t LL_SPI_GetRxCRC(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_SPI_GetRxCRC(const SPI_TypeDef *SPIx)
{
return (uint32_t)(READ_REG(SPIx->RXCRCR));
}
@@ -631,7 +644,7 @@
* @param SPIx SPI Instance
* @retval Returned value is a number between Min_Data = 0x00 and Max_Data = 0xFFFF
*/
-__STATIC_INLINE uint32_t LL_SPI_GetTxCRC(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_SPI_GetTxCRC(const SPI_TypeDef *SPIx)
{
return (uint32_t)(READ_REG(SPIx->TXCRCR));
}
@@ -672,7 +685,7 @@
* @arg @ref LL_SPI_NSS_HARD_INPUT
* @arg @ref LL_SPI_NSS_HARD_OUTPUT
*/
-__STATIC_INLINE uint32_t LL_SPI_GetNSSMode(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_SPI_GetNSSMode(const SPI_TypeDef *SPIx)
{
uint32_t Ssm = (READ_BIT(SPIx->CR1, SPI_CR1_SSM));
uint32_t Ssoe = (READ_BIT(SPIx->CR2, SPI_CR2_SSOE) << 16U);
@@ -693,7 +706,7 @@
* @param SPIx SPI Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_RXNE(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_RXNE(const SPI_TypeDef *SPIx)
{
return ((READ_BIT(SPIx->SR, SPI_SR_RXNE) == (SPI_SR_RXNE)) ? 1UL : 0UL);
}
@@ -704,7 +717,7 @@
* @param SPIx SPI Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_TXE(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_TXE(const SPI_TypeDef *SPIx)
{
return ((READ_BIT(SPIx->SR, SPI_SR_TXE) == (SPI_SR_TXE)) ? 1UL : 0UL);
}
@@ -715,7 +728,7 @@
* @param SPIx SPI Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_CRCERR(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_CRCERR(const SPI_TypeDef *SPIx)
{
return ((READ_BIT(SPIx->SR, SPI_SR_CRCERR) == (SPI_SR_CRCERR)) ? 1UL : 0UL);
}
@@ -726,7 +739,7 @@
* @param SPIx SPI Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_MODF(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_MODF(const SPI_TypeDef *SPIx)
{
return ((READ_BIT(SPIx->SR, SPI_SR_MODF) == (SPI_SR_MODF)) ? 1UL : 0UL);
}
@@ -737,7 +750,7 @@
* @param SPIx SPI Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_OVR(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_OVR(const SPI_TypeDef *SPIx)
{
return ((READ_BIT(SPIx->SR, SPI_SR_OVR) == (SPI_SR_OVR)) ? 1UL : 0UL);
}
@@ -755,7 +768,7 @@
* @param SPIx SPI Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_BSY(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_BSY(const SPI_TypeDef *SPIx)
{
return ((READ_BIT(SPIx->SR, SPI_SR_BSY) == (SPI_SR_BSY)) ? 1UL : 0UL);
}
@@ -829,7 +842,8 @@
/**
* @brief Enable error interrupt
- * @note This bit controls the generation of an interrupt when an error condition occurs (CRCERR, OVR, MODF in SPI mode, FRE at TI mode).
+ * @note This bit controls the generation of an interrupt when an error condition
+ * occurs (CRCERR, OVR, MODF in SPI mode, FRE at TI mode).
* @rmtoll CR2 ERRIE LL_SPI_EnableIT_ERR
* @param SPIx SPI Instance
* @retval None
@@ -863,7 +877,8 @@
/**
* @brief Disable error interrupt
- * @note This bit controls the generation of an interrupt when an error condition occurs (CRCERR, OVR, MODF in SPI mode, FRE at TI mode).
+ * @note This bit controls the generation of an interrupt when an error condition
+ * occurs (CRCERR, OVR, MODF in SPI mode, FRE at TI mode).
* @rmtoll CR2 ERRIE LL_SPI_DisableIT_ERR
* @param SPIx SPI Instance
* @retval None
@@ -901,7 +916,7 @@
* @param SPIx SPI Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_ERR(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_ERR(const SPI_TypeDef *SPIx)
{
return ((READ_BIT(SPIx->CR2, SPI_CR2_ERRIE) == (SPI_CR2_ERRIE)) ? 1UL : 0UL);
}
@@ -912,7 +927,7 @@
* @param SPIx SPI Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_RXNE(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_RXNE(const SPI_TypeDef *SPIx)
{
return ((READ_BIT(SPIx->CR2, SPI_CR2_RXNEIE) == (SPI_CR2_RXNEIE)) ? 1UL : 0UL);
}
@@ -923,7 +938,7 @@
* @param SPIx SPI Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_TXE(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_TXE(const SPI_TypeDef *SPIx)
{
return ((READ_BIT(SPIx->CR2, SPI_CR2_TXEIE) == (SPI_CR2_TXEIE)) ? 1UL : 0UL);
}
@@ -964,7 +979,7 @@
* @param SPIx SPI Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_SPI_IsEnabledDMAReq_RX(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_SPI_IsEnabledDMAReq_RX(const SPI_TypeDef *SPIx)
{
return ((READ_BIT(SPIx->CR2, SPI_CR2_RXDMAEN) == (SPI_CR2_RXDMAEN)) ? 1UL : 0UL);
}
@@ -997,7 +1012,7 @@
* @param SPIx SPI Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_SPI_IsEnabledDMAReq_TX(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_SPI_IsEnabledDMAReq_TX(const SPI_TypeDef *SPIx)
{
return ((READ_BIT(SPIx->CR2, SPI_CR2_TXDMAEN) == (SPI_CR2_TXDMAEN)) ? 1UL : 0UL);
}
@@ -1008,7 +1023,7 @@
* @param SPIx SPI Instance
* @retval Address of data register
*/
-__STATIC_INLINE uint32_t LL_SPI_DMA_GetRegAddr(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_SPI_DMA_GetRegAddr(const SPI_TypeDef *SPIx)
{
return (uint32_t) &(SPIx->DR);
}
@@ -1085,7 +1100,7 @@
* @{
*/
-ErrorStatus LL_SPI_DeInit(SPI_TypeDef *SPIx);
+ErrorStatus LL_SPI_DeInit(const SPI_TypeDef *SPIx);
ErrorStatus LL_SPI_Init(SPI_TypeDef *SPIx, LL_SPI_InitTypeDef *SPI_InitStruct);
void LL_SPI_StructInit(LL_SPI_InitTypeDef *SPI_InitStruct);
@@ -1353,7 +1368,7 @@
* @param SPIx SPI Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_I2S_IsEnabled(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_I2S_IsEnabled(const SPI_TypeDef *SPIx)
{
return ((READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SE) == (SPI_I2SCFGR_I2SE)) ? 1UL : 0UL);
}
@@ -1386,7 +1401,7 @@
* @arg @ref LL_I2S_DATAFORMAT_24B
* @arg @ref LL_I2S_DATAFORMAT_32B
*/
-__STATIC_INLINE uint32_t LL_I2S_GetDataFormat(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_I2S_GetDataFormat(const SPI_TypeDef *SPIx)
{
return (uint32_t)(READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN));
}
@@ -1413,7 +1428,7 @@
* @arg @ref LL_I2S_POLARITY_LOW
* @arg @ref LL_I2S_POLARITY_HIGH
*/
-__STATIC_INLINE uint32_t LL_I2S_GetClockPolarity(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_I2S_GetClockPolarity(const SPI_TypeDef *SPIx)
{
return (uint32_t)(READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_CKPOL));
}
@@ -1448,7 +1463,7 @@
* @arg @ref LL_I2S_STANDARD_PCM_SHORT
* @arg @ref LL_I2S_STANDARD_PCM_LONG
*/
-__STATIC_INLINE uint32_t LL_I2S_GetStandard(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_I2S_GetStandard(const SPI_TypeDef *SPIx)
{
return (uint32_t)(READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SSTD | SPI_I2SCFGR_PCMSYNC));
}
@@ -1479,7 +1494,7 @@
* @arg @ref LL_I2S_MODE_MASTER_TX
* @arg @ref LL_I2S_MODE_MASTER_RX
*/
-__STATIC_INLINE uint32_t LL_I2S_GetTransferMode(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_I2S_GetTransferMode(const SPI_TypeDef *SPIx)
{
return (uint32_t)(READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SCFG));
}
@@ -1502,7 +1517,7 @@
* @param SPIx SPI Instance
* @retval PrescalerLinear Value between Min_Data=0x02 and Max_Data=0xFF
*/
-__STATIC_INLINE uint32_t LL_I2S_GetPrescalerLinear(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_I2S_GetPrescalerLinear(const SPI_TypeDef *SPIx)
{
return (uint32_t)(READ_BIT(SPIx->I2SPR, SPI_I2SPR_I2SDIV));
}
@@ -1529,7 +1544,7 @@
* @arg @ref LL_I2S_PRESCALER_PARITY_EVEN
* @arg @ref LL_I2S_PRESCALER_PARITY_ODD
*/
-__STATIC_INLINE uint32_t LL_I2S_GetPrescalerParity(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_I2S_GetPrescalerParity(const SPI_TypeDef *SPIx)
{
return (uint32_t)(READ_BIT(SPIx->I2SPR, SPI_I2SPR_ODD) >> 8U);
}
@@ -1562,7 +1577,7 @@
* @param SPIx SPI Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_I2S_IsEnabledMasterClock(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_I2S_IsEnabledMasterClock(const SPI_TypeDef *SPIx)
{
return ((READ_BIT(SPIx->I2SPR, SPI_I2SPR_MCKOE) == (SPI_I2SPR_MCKOE)) ? 1UL : 0UL);
}
@@ -1581,7 +1596,7 @@
* @param SPIx SPI Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_RXNE(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_RXNE(const SPI_TypeDef *SPIx)
{
return LL_SPI_IsActiveFlag_RXNE(SPIx);
}
@@ -1592,7 +1607,7 @@
* @param SPIx SPI Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_TXE(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_TXE(const SPI_TypeDef *SPIx)
{
return LL_SPI_IsActiveFlag_TXE(SPIx);
}
@@ -1603,7 +1618,7 @@
* @param SPIx SPI Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_BSY(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_BSY(const SPI_TypeDef *SPIx)
{
return LL_SPI_IsActiveFlag_BSY(SPIx);
}
@@ -1614,7 +1629,7 @@
* @param SPIx SPI Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_OVR(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_OVR(const SPI_TypeDef *SPIx)
{
return LL_SPI_IsActiveFlag_OVR(SPIx);
}
@@ -1625,7 +1640,7 @@
* @param SPIx SPI Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_UDR(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_UDR(const SPI_TypeDef *SPIx)
{
return ((READ_BIT(SPIx->SR, SPI_SR_UDR) == (SPI_SR_UDR)) ? 1UL : 0UL);
}
@@ -1640,7 +1655,7 @@
* @param SPIx SPI Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_CHSIDE(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_CHSIDE(const SPI_TypeDef *SPIx)
{
return ((READ_BIT(SPIx->SR, SPI_SR_CHSIDE) == (SPI_SR_CHSIDE)) ? 1UL : 0UL);
}
@@ -1762,7 +1777,7 @@
* @param SPIx SPI Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_I2S_IsEnabledIT_ERR(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_I2S_IsEnabledIT_ERR(const SPI_TypeDef *SPIx)
{
return LL_SPI_IsEnabledIT_ERR(SPIx);
}
@@ -1773,7 +1788,7 @@
* @param SPIx SPI Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_I2S_IsEnabledIT_RXNE(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_I2S_IsEnabledIT_RXNE(const SPI_TypeDef *SPIx)
{
return LL_SPI_IsEnabledIT_RXNE(SPIx);
}
@@ -1784,7 +1799,7 @@
* @param SPIx SPI Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_I2S_IsEnabledIT_TXE(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_I2S_IsEnabledIT_TXE(const SPI_TypeDef *SPIx)
{
return LL_SPI_IsEnabledIT_TXE(SPIx);
}
@@ -1825,7 +1840,7 @@
* @param SPIx SPI Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_I2S_IsEnabledDMAReq_RX(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_I2S_IsEnabledDMAReq_RX(const SPI_TypeDef *SPIx)
{
return LL_SPI_IsEnabledDMAReq_RX(SPIx);
}
@@ -1858,7 +1873,7 @@
* @param SPIx SPI Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_I2S_IsEnabledDMAReq_TX(SPI_TypeDef *SPIx)
+__STATIC_INLINE uint32_t LL_I2S_IsEnabledDMAReq_TX(const SPI_TypeDef *SPIx)
{
return LL_SPI_IsEnabledDMAReq_TX(SPIx);
}
@@ -1903,7 +1918,7 @@
* @{
*/
-ErrorStatus LL_I2S_DeInit(SPI_TypeDef *SPIx);
+ErrorStatus LL_I2S_DeInit(const SPI_TypeDef *SPIx);
ErrorStatus LL_I2S_Init(SPI_TypeDef *SPIx, LL_I2S_InitTypeDef *I2S_InitStruct);
void LL_I2S_StructInit(LL_I2S_InitTypeDef *I2S_InitStruct);
void LL_I2S_ConfigPrescaler(SPI_TypeDef *SPIx, uint32_t PrescalerLinear, uint32_t PrescalerParity);
diff --git a/Inc/stm32f1xx_ll_tim.h b/Inc/stm32f1xx_ll_tim.h
index f1bceb7..d54a00e 100644
--- a/Inc/stm32f1xx_ll_tim.h
+++ b/Inc/stm32f1xx_ll_tim.h
@@ -556,10 +556,10 @@
/** @defgroup TIM_LL_EC_COUNTERMODE Counter Mode
* @{
*/
-#define LL_TIM_COUNTERMODE_UP 0x00000000U /*!<Counter used as upcounter */
+#define LL_TIM_COUNTERMODE_UP 0x00000000U /*!< Counter used as upcounter */
#define LL_TIM_COUNTERMODE_DOWN TIM_CR1_DIR /*!< Counter used as downcounter */
#define LL_TIM_COUNTERMODE_CENTER_DOWN TIM_CR1_CMS_0 /*!< The counter counts up and down alternatively. Output compare interrupt flags of output channels are set only when the counter is counting down. */
-#define LL_TIM_COUNTERMODE_CENTER_UP TIM_CR1_CMS_1 /*!<The counter counts up and down alternatively. Output compare interrupt flags of output channels are set only when the counter is counting up */
+#define LL_TIM_COUNTERMODE_CENTER_UP TIM_CR1_CMS_1 /*!< The counter counts up and down alternatively. Output compare interrupt flags of output channels are set only when the counter is counting up */
#define LL_TIM_COUNTERMODE_CENTER_UP_DOWN TIM_CR1_CMS /*!< The counter counts up and down alternatively. Output compare interrupt flags of output channels are set only when the counter is counting up or down. */
/**
* @}
@@ -818,11 +818,11 @@
#define LL_TIM_ETR_FILTER_FDIV2_N8 (TIM_SMCR_ETF_2 | TIM_SMCR_ETF_0) /*!< fSAMPLING=fDTS/2, N=8 */
#define LL_TIM_ETR_FILTER_FDIV4_N6 (TIM_SMCR_ETF_2 | TIM_SMCR_ETF_1) /*!< fSAMPLING=fDTS/4, N=6 */
#define LL_TIM_ETR_FILTER_FDIV4_N8 (TIM_SMCR_ETF_2 | TIM_SMCR_ETF_1 | TIM_SMCR_ETF_0) /*!< fSAMPLING=fDTS/4, N=8 */
-#define LL_TIM_ETR_FILTER_FDIV8_N6 TIM_SMCR_ETF_3 /*!< fSAMPLING=fDTS/8, N=8 */
-#define LL_TIM_ETR_FILTER_FDIV8_N8 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_0) /*!< fSAMPLING=fDTS/16, N=5 */
-#define LL_TIM_ETR_FILTER_FDIV16_N5 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_1) /*!< fSAMPLING=fDTS/16, N=6 */
-#define LL_TIM_ETR_FILTER_FDIV16_N6 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_1 | TIM_SMCR_ETF_0) /*!< fSAMPLING=fDTS/16, N=8 */
-#define LL_TIM_ETR_FILTER_FDIV16_N8 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_2) /*!< fSAMPLING=fDTS/16, N=5 */
+#define LL_TIM_ETR_FILTER_FDIV8_N6 TIM_SMCR_ETF_3 /*!< fSAMPLING=fDTS/8, N=6 */
+#define LL_TIM_ETR_FILTER_FDIV8_N8 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_0) /*!< fSAMPLING=fDTS/16, N=8 */
+#define LL_TIM_ETR_FILTER_FDIV16_N5 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_1) /*!< fSAMPLING=fDTS/16, N=5 */
+#define LL_TIM_ETR_FILTER_FDIV16_N6 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_1 | TIM_SMCR_ETF_0) /*!< fSAMPLING=fDTS/16, N=6 */
+#define LL_TIM_ETR_FILTER_FDIV16_N8 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_2) /*!< fSAMPLING=fDTS/16, N=8 */
#define LL_TIM_ETR_FILTER_FDIV32_N5 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_2 | TIM_SMCR_ETF_0) /*!< fSAMPLING=fDTS/32, N=5 */
#define LL_TIM_ETR_FILTER_FDIV32_N6 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_2 | TIM_SMCR_ETF_1) /*!< fSAMPLING=fDTS/32, N=6 */
#define LL_TIM_ETR_FILTER_FDIV32_N8 TIM_SMCR_ETF /*!< fSAMPLING=fDTS/32, N=8 */
@@ -1447,6 +1447,17 @@
}
/**
+ * @brief Indicates whether the capture/compare control bits (CCxE, CCxNE and OCxM) preload is enabled.
+ * @rmtoll CR2 CCPC LL_TIM_CC_IsEnabledPreload
+ * @param TIMx Timer instance
+ * @retval State of bit (1 or 0).
+ */
+__STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledPreload(const TIM_TypeDef *TIMx)
+{
+ return ((READ_BIT(TIMx->CR2, TIM_CR2_CCPC) == (TIM_CR2_CCPC)) ? 1UL : 0UL);
+}
+
+/**
* @brief Set the updated source of the capture/compare control bits (CCxE, CCxNE and OCxM).
* @note Macro IS_TIM_COMMUTATION_EVENT_INSTANCE(TIMx) can be used to check
* whether or not a timer instance is able to generate a commutation event.
diff --git a/Inc/stm32f1xx_ll_usart.h b/Inc/stm32f1xx_ll_usart.h
index ffe4192..6d37061 100644
--- a/Inc/stm32f1xx_ll_usart.h
+++ b/Inc/stm32f1xx_ll_usart.h
@@ -347,7 +347,7 @@
* @}
*/
-/** @defgroup USART_LL_EM_Exported_Macros_Helper Exported_Macros_Helper
+/** @defgroup USART_LL_EM_Exported_Macros_Helper Exported Macros Helper
* @{
*/
@@ -636,7 +636,7 @@
#endif /* USART_OverSampling_Feature */
/**
* @brief Configure if Clock pulse of the last data bit is output to the SCLK pin or not
- * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
* Synchronous mode is supported by the USARTx instance.
* @rmtoll CR2 LBCL LL_USART_SetLastClkPulseOutput
* @param USARTx USART Instance
@@ -653,7 +653,7 @@
/**
* @brief Retrieve Clock pulse of the last data bit output configuration
* (Last bit Clock pulse output to the SCLK pin or not)
- * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
* Synchronous mode is supported by the USARTx instance.
* @rmtoll CR2 LBCL LL_USART_GetLastClkPulseOutput
* @param USARTx USART Instance
@@ -668,7 +668,7 @@
/**
* @brief Select the phase of the clock output on the SCLK pin in synchronous mode
- * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
* Synchronous mode is supported by the USARTx instance.
* @rmtoll CR2 CPHA LL_USART_SetClockPhase
* @param USARTx USART Instance
@@ -684,7 +684,7 @@
/**
* @brief Return phase of the clock output on the SCLK pin in synchronous mode
- * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
* Synchronous mode is supported by the USARTx instance.
* @rmtoll CR2 CPHA LL_USART_GetClockPhase
* @param USARTx USART Instance
@@ -699,7 +699,7 @@
/**
* @brief Select the polarity of the clock output on the SCLK pin in synchronous mode
- * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
* Synchronous mode is supported by the USARTx instance.
* @rmtoll CR2 CPOL LL_USART_SetClockPolarity
* @param USARTx USART Instance
@@ -715,7 +715,7 @@
/**
* @brief Return polarity of the clock output on the SCLK pin in synchronous mode
- * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
* Synchronous mode is supported by the USARTx instance.
* @rmtoll CR2 CPOL LL_USART_GetClockPolarity
* @param USARTx USART Instance
@@ -730,7 +730,7 @@
/**
* @brief Configure Clock signal format (Phase Polarity and choice about output of last bit clock pulse)
- * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
* Synchronous mode is supported by the USARTx instance.
* @note Call of this function is equivalent to following function call sequence :
* - Clock Phase configuration using @ref LL_USART_SetClockPhase() function
@@ -758,7 +758,7 @@
/**
* @brief Enable Clock output on SCLK pin
- * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
* Synchronous mode is supported by the USARTx instance.
* @rmtoll CR2 CLKEN LL_USART_EnableSCLKOutput
* @param USARTx USART Instance
@@ -771,7 +771,7 @@
/**
* @brief Disable Clock output on SCLK pin
- * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
* Synchronous mode is supported by the USARTx instance.
* @rmtoll CR2 CLKEN LL_USART_DisableSCLKOutput
* @param USARTx USART Instance
@@ -784,7 +784,7 @@
/**
* @brief Indicate if Clock output on SCLK pin is enabled
- * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
* Synchronous mode is supported by the USARTx instance.
* @rmtoll CR2 CLKEN LL_USART_IsEnabledSCLKOutput
* @param USARTx USART Instance
@@ -886,7 +886,7 @@
/**
* @brief Enable RTS HW Flow Control
- * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
* Hardware Flow control feature is supported by the USARTx instance.
* @rmtoll CR3 RTSE LL_USART_EnableRTSHWFlowCtrl
* @param USARTx USART Instance
@@ -899,7 +899,7 @@
/**
* @brief Disable RTS HW Flow Control
- * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
* Hardware Flow control feature is supported by the USARTx instance.
* @rmtoll CR3 RTSE LL_USART_DisableRTSHWFlowCtrl
* @param USARTx USART Instance
@@ -912,7 +912,7 @@
/**
* @brief Enable CTS HW Flow Control
- * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
* Hardware Flow control feature is supported by the USARTx instance.
* @rmtoll CR3 CTSE LL_USART_EnableCTSHWFlowCtrl
* @param USARTx USART Instance
@@ -925,7 +925,7 @@
/**
* @brief Disable CTS HW Flow Control
- * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
* Hardware Flow control feature is supported by the USARTx instance.
* @rmtoll CR3 CTSE LL_USART_DisableCTSHWFlowCtrl
* @param USARTx USART Instance
@@ -938,7 +938,7 @@
/**
* @brief Configure HW Flow Control mode (both CTS and RTS)
- * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
* Hardware Flow control feature is supported by the USARTx instance.
* @rmtoll CR3 RTSE LL_USART_SetHWFlowCtrl\n
* CR3 CTSE LL_USART_SetHWFlowCtrl
@@ -957,7 +957,7 @@
/**
* @brief Return HW Flow Control configuration (both CTS and RTS)
- * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
* Hardware Flow control feature is supported by the USARTx instance.
* @rmtoll CR3 RTSE LL_USART_GetHWFlowCtrl\n
* CR3 CTSE LL_USART_GetHWFlowCtrl
@@ -1125,7 +1125,7 @@
/**
* @brief Enable IrDA mode
- * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
* IrDA feature is supported by the USARTx instance.
* @rmtoll CR3 IREN LL_USART_EnableIrda
* @param USARTx USART Instance
@@ -1138,7 +1138,7 @@
/**
* @brief Disable IrDA mode
- * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
* IrDA feature is supported by the USARTx instance.
* @rmtoll CR3 IREN LL_USART_DisableIrda
* @param USARTx USART Instance
@@ -1151,7 +1151,7 @@
/**
* @brief Indicate if IrDA mode is enabled
- * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
* IrDA feature is supported by the USARTx instance.
* @rmtoll CR3 IREN LL_USART_IsEnabledIrda
* @param USARTx USART Instance
@@ -1164,7 +1164,7 @@
/**
* @brief Configure IrDA Power Mode (Normal or Low Power)
- * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
* IrDA feature is supported by the USARTx instance.
* @rmtoll CR3 IRLP LL_USART_SetIrdaPowerMode
* @param USARTx USART Instance
@@ -1180,7 +1180,7 @@
/**
* @brief Retrieve IrDA Power Mode configuration (Normal or Low Power)
- * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
* IrDA feature is supported by the USARTx instance.
* @rmtoll CR3 IRLP LL_USART_GetIrdaPowerMode
* @param USARTx USART Instance
@@ -1196,7 +1196,7 @@
/**
* @brief Set Irda prescaler value, used for dividing the USART clock source
* to achieve the Irda Low Power frequency (8 bits value)
- * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
* IrDA feature is supported by the USARTx instance.
* @rmtoll GTPR PSC LL_USART_SetIrdaPrescaler
* @param USARTx USART Instance
@@ -1211,7 +1211,7 @@
/**
* @brief Return Irda prescaler value, used for dividing the USART clock source
* to achieve the Irda Low Power frequency (8 bits value)
- * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
* IrDA feature is supported by the USARTx instance.
* @rmtoll GTPR PSC LL_USART_GetIrdaPrescaler
* @param USARTx USART Instance
@@ -1232,7 +1232,7 @@
/**
* @brief Enable Smartcard NACK transmission
- * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
* Smartcard feature is supported by the USARTx instance.
* @rmtoll CR3 NACK LL_USART_EnableSmartcardNACK
* @param USARTx USART Instance
@@ -1245,7 +1245,7 @@
/**
* @brief Disable Smartcard NACK transmission
- * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
* Smartcard feature is supported by the USARTx instance.
* @rmtoll CR3 NACK LL_USART_DisableSmartcardNACK
* @param USARTx USART Instance
@@ -1258,7 +1258,7 @@
/**
* @brief Indicate if Smartcard NACK transmission is enabled
- * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
* Smartcard feature is supported by the USARTx instance.
* @rmtoll CR3 NACK LL_USART_IsEnabledSmartcardNACK
* @param USARTx USART Instance
@@ -1271,7 +1271,7 @@
/**
* @brief Enable Smartcard mode
- * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
* Smartcard feature is supported by the USARTx instance.
* @rmtoll CR3 SCEN LL_USART_EnableSmartcard
* @param USARTx USART Instance
@@ -1284,7 +1284,7 @@
/**
* @brief Disable Smartcard mode
- * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
* Smartcard feature is supported by the USARTx instance.
* @rmtoll CR3 SCEN LL_USART_DisableSmartcard
* @param USARTx USART Instance
@@ -1297,7 +1297,7 @@
/**
* @brief Indicate if Smartcard mode is enabled
- * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
* Smartcard feature is supported by the USARTx instance.
* @rmtoll CR3 SCEN LL_USART_IsEnabledSmartcard
* @param USARTx USART Instance
@@ -1311,7 +1311,7 @@
/**
* @brief Set Smartcard prescaler value, used for dividing the USART clock
* source to provide the SMARTCARD Clock (5 bits value)
- * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
* Smartcard feature is supported by the USARTx instance.
* @rmtoll GTPR PSC LL_USART_SetSmartcardPrescaler
* @param USARTx USART Instance
@@ -1326,7 +1326,7 @@
/**
* @brief Return Smartcard prescaler value, used for dividing the USART clock
* source to provide the SMARTCARD Clock (5 bits value)
- * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
* Smartcard feature is supported by the USARTx instance.
* @rmtoll GTPR PSC LL_USART_GetSmartcardPrescaler
* @param USARTx USART Instance
@@ -1340,7 +1340,7 @@
/**
* @brief Set Smartcard Guard time value, expressed in nb of baud clocks periods
* (GT[7:0] bits : Guard time value)
- * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
* Smartcard feature is supported by the USARTx instance.
* @rmtoll GTPR GT LL_USART_SetSmartcardGuardTime
* @param USARTx USART Instance
@@ -1355,7 +1355,7 @@
/**
* @brief Return Smartcard Guard time value, expressed in nb of baud clocks periods
* (GT[7:0] bits : Guard time value)
- * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
* Smartcard feature is supported by the USARTx instance.
* @rmtoll GTPR GT LL_USART_GetSmartcardGuardTime
* @param USARTx USART Instance
@@ -1376,7 +1376,7 @@
/**
* @brief Enable Single Wire Half-Duplex mode
- * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
* Half-Duplex mode is supported by the USARTx instance.
* @rmtoll CR3 HDSEL LL_USART_EnableHalfDuplex
* @param USARTx USART Instance
@@ -1389,7 +1389,7 @@
/**
* @brief Disable Single Wire Half-Duplex mode
- * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
* Half-Duplex mode is supported by the USARTx instance.
* @rmtoll CR3 HDSEL LL_USART_DisableHalfDuplex
* @param USARTx USART Instance
@@ -1402,7 +1402,7 @@
/**
* @brief Indicate if Single Wire Half-Duplex mode is enabled
- * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
* Half-Duplex mode is supported by the USARTx instance.
* @rmtoll CR3 HDSEL LL_USART_IsEnabledHalfDuplex
* @param USARTx USART Instance
@@ -1423,7 +1423,7 @@
/**
* @brief Set LIN Break Detection Length
- * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
* LIN feature is supported by the USARTx instance.
* @rmtoll CR2 LBDL LL_USART_SetLINBrkDetectionLen
* @param USARTx USART Instance
@@ -1439,7 +1439,7 @@
/**
* @brief Return LIN Break Detection Length
- * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
* LIN feature is supported by the USARTx instance.
* @rmtoll CR2 LBDL LL_USART_GetLINBrkDetectionLen
* @param USARTx USART Instance
@@ -1454,7 +1454,7 @@
/**
* @brief Enable LIN mode
- * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
* LIN feature is supported by the USARTx instance.
* @rmtoll CR2 LINEN LL_USART_EnableLIN
* @param USARTx USART Instance
@@ -1467,7 +1467,7 @@
/**
* @brief Disable LIN mode
- * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
* LIN feature is supported by the USARTx instance.
* @rmtoll CR2 LINEN LL_USART_DisableLIN
* @param USARTx USART Instance
@@ -1480,7 +1480,7 @@
/**
* @brief Indicate if LIN mode is enabled
- * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
* LIN feature is supported by the USARTx instance.
* @rmtoll CR2 LINEN LL_USART_IsEnabledLIN
* @param USARTx USART Instance
@@ -1541,7 +1541,7 @@
* - IREN bit in the USART_CR3 register,
* - HDSEL bit in the USART_CR3 register.
* This function also sets the USART in Synchronous mode.
- * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
* Synchronous mode is supported by the USARTx instance.
* @note Call of this function is equivalent to following function call sequence :
* - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
@@ -1579,7 +1579,7 @@
* - IREN bit in the USART_CR3 register,
* - HDSEL bit in the USART_CR3 register.
* This function also set the UART/USART in LIN mode.
- * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
* LIN feature is supported by the USARTx instance.
* @note Call of this function is equivalent to following function call sequence :
* - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
@@ -1619,7 +1619,7 @@
* - SCEN bit in the USART_CR3 register,
* - IREN bit in the USART_CR3 register,
* This function also sets the UART/USART in Half Duplex mode.
- * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
* Half-Duplex mode is supported by the USARTx instance.
* @note Call of this function is equivalent to following function call sequence :
* - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
@@ -1658,7 +1658,7 @@
* This function also configures Stop bits to 1.5 bits and
* sets the USART in Smartcard mode (SCEN bit).
* Clock Output is also enabled (CLKEN).
- * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
* Smartcard feature is supported by the USARTx instance.
* @note Call of this function is equivalent to following function call sequence :
* - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
@@ -1700,7 +1700,7 @@
* - SCEN bit in the USART_CR3 register,
* - HDSEL bit in the USART_CR3 register.
* This function also sets the UART/USART in IRDA mode (IREN bit).
- * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
* IrDA feature is supported by the USARTx instance.
* @note Call of this function is equivalent to following function call sequence :
* - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
@@ -1866,7 +1866,7 @@
/**
* @brief Check if the USART LIN Break Detection Flag is set or not
- * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
* LIN feature is supported by the USARTx instance.
* @rmtoll SR LBD LL_USART_IsActiveFlag_LBD
* @param USARTx USART Instance
@@ -1879,7 +1879,7 @@
/**
* @brief Check if the USART CTS Flag is set or not
- * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
* Hardware Flow control feature is supported by the USARTx instance.
* @rmtoll SR CTS LL_USART_IsActiveFlag_nCTS
* @param USARTx USART Instance
@@ -2031,7 +2031,7 @@
/**
* @brief Clear LIN Break Detection Flag
- * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
* LIN feature is supported by the USARTx instance.
* @rmtoll SR LBD LL_USART_ClearFlag_LBD
* @param USARTx USART Instance
@@ -2044,7 +2044,7 @@
/**
* @brief Clear CTS Interrupt Flag
- * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
* Hardware Flow control feature is supported by the USARTx instance.
* @rmtoll SR CTS LL_USART_ClearFlag_nCTS
* @param USARTx USART Instance
@@ -2120,7 +2120,7 @@
/**
* @brief Enable LIN Break Detection Interrupt
- * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
* LIN feature is supported by the USARTx instance.
* @rmtoll CR2 LBDIE LL_USART_EnableIT_LBD
* @param USARTx USART Instance
@@ -2148,7 +2148,7 @@
/**
* @brief Enable CTS Interrupt
- * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
* Hardware Flow control feature is supported by the USARTx instance.
* @rmtoll CR3 CTSIE LL_USART_EnableIT_CTS
* @param USARTx USART Instance
@@ -2216,7 +2216,7 @@
/**
* @brief Disable LIN Break Detection Interrupt
- * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
* LIN feature is supported by the USARTx instance.
* @rmtoll CR2 LBDIE LL_USART_DisableIT_LBD
* @param USARTx USART Instance
@@ -2244,7 +2244,7 @@
/**
* @brief Disable CTS Interrupt
- * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
* Hardware Flow control feature is supported by the USARTx instance.
* @rmtoll CR3 CTSIE LL_USART_DisableIT_CTS
* @param USARTx USART Instance
@@ -2312,7 +2312,7 @@
/**
* @brief Check if the USART LIN Break Detection Interrupt is enabled or disabled.
- * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
* LIN feature is supported by the USARTx instance.
* @rmtoll CR2 LBDIE LL_USART_IsEnabledIT_LBD
* @param USARTx USART Instance
@@ -2336,7 +2336,7 @@
/**
* @brief Check if the USART CTS Interrupt is enabled or disabled.
- * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
+ * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
* Hardware Flow control feature is supported by the USARTx instance.
* @rmtoll CR3 CTSIE LL_USART_IsEnabledIT_CTS
* @param USARTx USART Instance
diff --git a/Inc/stm32f1xx_ll_usb.h b/Inc/stm32f1xx_ll_usb.h
index be3407d..f0e13e8 100644
--- a/Inc/stm32f1xx_ll_usb.h
+++ b/Inc/stm32f1xx_ll_usb.h
@@ -92,42 +92,42 @@
*/
typedef struct
{
- uint32_t dev_endpoints; /*!< Device Endpoints number.
+ uint8_t dev_endpoints; /*!< Device Endpoints number.
This parameter depends on the used USB core.
This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
#if defined (USB_OTG_FS)
- uint32_t Host_channels; /*!< Host Channels number.
+ uint8_t Host_channels; /*!< Host Channels number.
This parameter Depends on the used USB core.
This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
-
- uint32_t dma_enable; /*!< USB DMA state.
- If DMA is not supported this parameter shall be set by default to zero */
#endif /* defined (USB_OTG_FS) */
- uint32_t speed; /*!< USB Core speed.
- This parameter can be any value of @ref PCD_Speed/HCD_Speed
- (HCD_SPEED_xxx, HCD_SPEED_xxx) */
+ uint8_t dma_enable; /*!< USB DMA state.
+ If DMA is not supported this parameter shall be set by default to zero */
- uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size. */
+ uint8_t speed; /*!< USB Core speed.
+ This parameter can be any value of @ref PCD_Speed/HCD_Speed
+ (HCD_SPEED_xxx, HCD_SPEED_xxx) */
- uint32_t phy_itface; /*!< Select the used PHY interface.
- This parameter can be any value of @ref PCD_PHY_Module/HCD_PHY_Module */
+ uint8_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size. */
- uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */
+ uint8_t phy_itface; /*!< Select the used PHY interface.
+ This parameter can be any value of @ref PCD_PHY_Module/HCD_PHY_Module */
- uint32_t low_power_enable; /*!< Enable or disable the low Power Mode. */
+ uint8_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */
- uint32_t lpm_enable; /*!< Enable or disable Link Power Management. */
+ uint8_t low_power_enable; /*!< Enable or disable the low Power Mode. */
- uint32_t battery_charging_enable; /*!< Enable or disable Battery charging. */
+ uint8_t lpm_enable; /*!< Enable or disable Link Power Management. */
+
+ uint8_t battery_charging_enable; /*!< Enable or disable Battery charging. */
#if defined (USB_OTG_FS)
- uint32_t vbus_sensing_enable; /*!< Enable or disable the VBUS Sensing feature. */
+ uint8_t vbus_sensing_enable; /*!< Enable or disable the VBUS Sensing feature. */
- uint32_t use_dedicated_ep1; /*!< Enable or disable the use of the dedicated EP1 interrupt. */
+ uint8_t use_dedicated_ep1; /*!< Enable or disable the use of the dedicated EP1 interrupt. */
- uint32_t use_external_vbus; /*!< Enable or disable the use of the external VBUS. */
+ uint8_t use_external_vbus; /*!< Enable or disable the use of the external VBUS. */
#endif /* defined (USB_OTG_FS) */
} USB_CfgTypeDef;
@@ -520,41 +520,41 @@
HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx);
HAL_StatusTypeDef USB_SetTurnaroundTime(USB_OTG_GlobalTypeDef *USBx, uint32_t hclk, uint8_t speed);
HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx, USB_ModeTypeDef mode);
-HAL_StatusTypeDef USB_SetDevSpeed(USB_OTG_GlobalTypeDef *USBx, uint8_t speed);
+HAL_StatusTypeDef USB_SetDevSpeed(const USB_OTG_GlobalTypeDef *USBx, uint8_t speed);
HAL_StatusTypeDef USB_FlushRxFifo(USB_OTG_GlobalTypeDef *USBx);
HAL_StatusTypeDef USB_FlushTxFifo(USB_OTG_GlobalTypeDef *USBx, uint32_t num);
-HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
-HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
-HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
-HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
+HAL_StatusTypeDef USB_ActivateEndpoint(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep);
+HAL_StatusTypeDef USB_DeactivateEndpoint(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep);
+HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep);
+HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep);
HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
-HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src,
+HAL_StatusTypeDef USB_WritePacket(const USB_OTG_GlobalTypeDef *USBx, uint8_t *src,
uint8_t ch_ep_num, uint16_t len);
-void *USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len);
-HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
-HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
-HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
-HAL_StatusTypeDef USB_SetDevAddress(USB_OTG_GlobalTypeDef *USBx, uint8_t address);
-HAL_StatusTypeDef USB_DevConnect(USB_OTG_GlobalTypeDef *USBx);
-HAL_StatusTypeDef USB_DevDisconnect(USB_OTG_GlobalTypeDef *USBx);
+void *USB_ReadPacket(const USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len);
+HAL_StatusTypeDef USB_EPSetStall(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep);
+HAL_StatusTypeDef USB_EPClearStall(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep);
+HAL_StatusTypeDef USB_EPStopXfer(const USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
+HAL_StatusTypeDef USB_SetDevAddress(const USB_OTG_GlobalTypeDef *USBx, uint8_t address);
+HAL_StatusTypeDef USB_DevConnect(const USB_OTG_GlobalTypeDef *USBx);
+HAL_StatusTypeDef USB_DevDisconnect(const USB_OTG_GlobalTypeDef *USBx);
HAL_StatusTypeDef USB_StopDevice(USB_OTG_GlobalTypeDef *USBx);
-HAL_StatusTypeDef USB_ActivateSetup(USB_OTG_GlobalTypeDef *USBx);
-HAL_StatusTypeDef USB_EP0_OutStart(USB_OTG_GlobalTypeDef *USBx, uint8_t *psetup);
-uint8_t USB_GetDevSpeed(USB_OTG_GlobalTypeDef *USBx);
-uint32_t USB_GetMode(USB_OTG_GlobalTypeDef *USBx);
+HAL_StatusTypeDef USB_ActivateSetup(const USB_OTG_GlobalTypeDef *USBx);
+HAL_StatusTypeDef USB_EP0_OutStart(const USB_OTG_GlobalTypeDef *USBx, const uint8_t *psetup);
+uint8_t USB_GetDevSpeed(const USB_OTG_GlobalTypeDef *USBx);
+uint32_t USB_GetMode(const USB_OTG_GlobalTypeDef *USBx);
uint32_t USB_ReadInterrupts(USB_OTG_GlobalTypeDef const *USBx);
-uint32_t USB_ReadChInterrupts(USB_OTG_GlobalTypeDef *USBx, uint8_t chnum);
-uint32_t USB_ReadDevAllOutEpInterrupt(USB_OTG_GlobalTypeDef *USBx);
-uint32_t USB_ReadDevOutEPInterrupt(USB_OTG_GlobalTypeDef *USBx, uint8_t epnum);
-uint32_t USB_ReadDevAllInEpInterrupt(USB_OTG_GlobalTypeDef *USBx);
-uint32_t USB_ReadDevInEPInterrupt(USB_OTG_GlobalTypeDef *USBx, uint8_t epnum);
+uint32_t USB_ReadChInterrupts(const USB_OTG_GlobalTypeDef *USBx, uint8_t chnum);
+uint32_t USB_ReadDevAllOutEpInterrupt(const USB_OTG_GlobalTypeDef *USBx);
+uint32_t USB_ReadDevOutEPInterrupt(const USB_OTG_GlobalTypeDef *USBx, uint8_t epnum);
+uint32_t USB_ReadDevAllInEpInterrupt(const USB_OTG_GlobalTypeDef *USBx);
+uint32_t USB_ReadDevInEPInterrupt(const USB_OTG_GlobalTypeDef *USBx, uint8_t epnum);
void USB_ClearInterrupts(USB_OTG_GlobalTypeDef *USBx, uint32_t interrupt);
HAL_StatusTypeDef USB_HostInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg);
-HAL_StatusTypeDef USB_InitFSLSPClkSel(USB_OTG_GlobalTypeDef *USBx, uint8_t freq);
-HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx);
-HAL_StatusTypeDef USB_DriveVbus(USB_OTG_GlobalTypeDef *USBx, uint8_t state);
+HAL_StatusTypeDef USB_InitFSLSPClkSel(const USB_OTG_GlobalTypeDef *USBx, uint8_t freq);
+HAL_StatusTypeDef USB_ResetPort(const USB_OTG_GlobalTypeDef *USBx);
+HAL_StatusTypeDef USB_DriveVbus(const USB_OTG_GlobalTypeDef *USBx, uint8_t state);
uint32_t USB_GetHostSpeed(USB_OTG_GlobalTypeDef const *USBx);
uint32_t USB_GetCurrentFrame(USB_OTG_GlobalTypeDef const *USBx);
HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx, uint8_t ch_num,
@@ -563,12 +563,12 @@
HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx,
USB_OTG_HCTypeDef *hc);
-uint32_t USB_HC_ReadInterrupt(USB_OTG_GlobalTypeDef *USBx);
-HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx, uint8_t hc_num);
-HAL_StatusTypeDef USB_DoPing(USB_OTG_GlobalTypeDef *USBx, uint8_t ch_num);
+uint32_t USB_HC_ReadInterrupt(const USB_OTG_GlobalTypeDef *USBx);
+HAL_StatusTypeDef USB_HC_Halt(const USB_OTG_GlobalTypeDef *USBx, uint8_t hc_num);
+HAL_StatusTypeDef USB_DoPing(const USB_OTG_GlobalTypeDef *USBx, uint8_t ch_num);
HAL_StatusTypeDef USB_StopHost(USB_OTG_GlobalTypeDef *USBx);
-HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_OTG_GlobalTypeDef *USBx);
-HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_OTG_GlobalTypeDef *USBx);
+HAL_StatusTypeDef USB_ActivateRemoteWakeup(const USB_OTG_GlobalTypeDef *USBx);
+HAL_StatusTypeDef USB_DeActivateRemoteWakeup(const USB_OTG_GlobalTypeDef *USBx);
#endif /* defined (USB_OTG_FS) */
#if defined (USB)
diff --git a/Inc/stm32f1xx_ll_wwdg.h b/Inc/stm32f1xx_ll_wwdg.h
index 6f9e1b7..565d18c 100644
--- a/Inc/stm32f1xx_ll_wwdg.h
+++ b/Inc/stm32f1xx_ll_wwdg.h
@@ -131,7 +131,7 @@
* @param WWDGx WWDG Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_WWDG_IsEnabled(WWDG_TypeDef *WWDGx)
+__STATIC_INLINE uint32_t LL_WWDG_IsEnabled(const WWDG_TypeDef *WWDGx)
{
return ((READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)) ? 1UL : 0UL);
}
@@ -158,7 +158,7 @@
* @param WWDGx WWDG Instance
* @retval 7 bit Watchdog Counter value
*/
-__STATIC_INLINE uint32_t LL_WWDG_GetCounter(WWDG_TypeDef *WWDGx)
+__STATIC_INLINE uint32_t LL_WWDG_GetCounter(const WWDG_TypeDef *WWDGx)
{
return (READ_BIT(WWDGx->CR, WWDG_CR_T));
}
@@ -191,7 +191,7 @@
* @arg @ref LL_WWDG_PRESCALER_4
* @arg @ref LL_WWDG_PRESCALER_8
*/
-__STATIC_INLINE uint32_t LL_WWDG_GetPrescaler(WWDG_TypeDef *WWDGx)
+__STATIC_INLINE uint32_t LL_WWDG_GetPrescaler(const WWDG_TypeDef *WWDGx)
{
return (READ_BIT(WWDGx->CFR, WWDG_CFR_WDGTB));
}
@@ -223,7 +223,7 @@
* @param WWDGx WWDG Instance
* @retval 7 bit Watchdog Window value
*/
-__STATIC_INLINE uint32_t LL_WWDG_GetWindow(WWDG_TypeDef *WWDGx)
+__STATIC_INLINE uint32_t LL_WWDG_GetWindow(const WWDG_TypeDef *WWDGx)
{
return (READ_BIT(WWDGx->CFR, WWDG_CFR_W));
}
@@ -244,7 +244,7 @@
* @param WWDGx WWDG Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_WWDG_IsActiveFlag_EWKUP(WWDG_TypeDef *WWDGx)
+__STATIC_INLINE uint32_t LL_WWDG_IsActiveFlag_EWKUP(const WWDG_TypeDef *WWDGx)
{
return ((READ_BIT(WWDGx->SR, WWDG_SR_EWIF) == (WWDG_SR_EWIF)) ? 1UL : 0UL);
}
@@ -286,7 +286,7 @@
* @param WWDGx WWDG Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_WWDG_IsEnabledIT_EWKUP(WWDG_TypeDef *WWDGx)
+__STATIC_INLINE uint32_t LL_WWDG_IsEnabledIT_EWKUP(const WWDG_TypeDef *WWDGx)
{
return ((READ_BIT(WWDGx->CFR, WWDG_CFR_EWI) == (WWDG_CFR_EWI)) ? 1UL : 0UL);
}
diff --git a/Release_Notes.html b/Release_Notes.html
index a2e9e16..4e08192 100644
--- a/Release_Notes.html
+++ b/Release_Notes.html
@@ -11,11 +11,11 @@
span.underline{text-decoration: underline;}
div.column{display: inline-block; vertical-align: top; width: 50%;}
</style>
- <style type="text/css">@charset "UTF-8";:root {--fore-color: #03234b;--secondary-fore-color: #03234b;--back-color: #ffffff;--secondary-back-color: #ffffff;--blockquote-color: #e6007e;--pre-color: #e6007e;--border-color: #3cb4e6;--secondary-border-color: #3cb4e6;--heading-ratio: 1.2;--universal-margin: 0.5rem;--universal-padding: 0.25rem;--universal-border-radius: 0.075rem;--background-margin: 1.5%;--a-link-color: #3cb4e6;--a-visited-color: #8c0078; }html {font-size: 13.5px; }a, b, del, em, i, ins, q, span, strong, u {font-size: 1em; }html, * {font-family: -apple-system, BlinkMacSystemFont, Helvetica, arial, sans-serif;line-height: 1.25;-webkit-text-size-adjust: 100%; }* {font-size: 1rem; }body {margin: 0;color: var(--fore-color);@background: var(--back-color);background: var(--back-color) linear-gradient(#ffd200, #ffd200) repeat-y left top;background-size: var(--background-margin);}details {display: block; }summary {display: list-item; }abbr[title] {border-bottom: none;text-decoration: underline dotted; }input {overflow: visible; }img {max-width: 100%;height: auto; }h1, h2, h3, h4, h5, h6 {line-height: 1.25;margin: calc(1.5 * var(--universal-margin)) var(--universal-margin);font-weight: 400; }h1 small, h2 small, h3 small, h4 small, h5 small, h6 small {color: var(--secondary-fore-color);display: block;margin-top: -0.25rem; }h1 {font-size: calc(1rem * var(--heading-ratio) * var(--heading-ratio) * var(--heading-ratio)); }h2 {font-size: calc(1rem * var(--heading-ratio) * var(--heading-ratio) );border-style: none none solid none ; border-width: thin;border-color: var(--border-color); }h3 {font-size: calc(1rem * var(--heading-ratio) ); }h4 {font-size: calc(1rem * var(--heading-ratio)); }h5 {font-size: 1rem; }h6 {font-size: calc(1rem / var(--heading-ratio)); }p {margin: var(--universal-margin); }ol, ul {margin: var(--universal-margin);padding-left: calc(3 * var(--universal-margin)); }b, strong {font-weight: 700; }hr {box-sizing: content-box;border: 0;line-height: 1.25em;margin: var(--universal-margin);height: 0.0714285714rem;background: linear-gradient(to right, transparent, var(--border-color) 20%, var(--border-color) 80%, transparent); }blockquote {display: block;position: relative;font-style: italic;color: var(--secondary-fore-color);margin: var(--universal-margin);padding: calc(3 * var(--universal-padding));border: 0.0714285714rem solid var(--secondary-border-color);border-left: 0.3rem solid var(--blockquote-color);border-radius: 0 var(--universal-border-radius) var(--universal-border-radius) 0; }blockquote:before {position: absolute;top: calc(0rem - var(--universal-padding));left: 0;font-family: sans-serif;font-size: 2rem;font-weight: 800;content: "\201c";color: var(--blockquote-color); }blockquote[cite]:after {font-style: normal;font-size: 0.75em;font-weight: 700;content: "\a— " attr(cite);white-space: pre; }code, kbd, pre, samp {font-family: Menlo, Consolas, monospace;font-size: 0.85em; }code {background: var(--secondary-back-color);border-radius: var(--universal-border-radius);padding: calc(var(--universal-padding) / 4) calc(var(--universal-padding) / 2); }kbd {background: var(--fore-color);color: var(--back-color);border-radius: var(--universal-border-radius);padding: calc(var(--universal-padding) / 4) calc(var(--universal-padding) / 2); }pre {overflow: auto;background: var(--secondary-back-color);padding: calc(1.5 * var(--universal-padding));margin: var(--universal-margin);border: 0.0714285714rem solid var(--secondary-border-color);border-left: 0.2857142857rem solid var(--pre-color);border-radius: 0 var(--universal-border-radius) var(--universal-border-radius) 0; }sup, sub, code, kbd {line-height: 0;position: relative;vertical-align: baseline; }small, sup, sub, figcaption {font-size: 0.75em; }sup {top: -0.5em; }sub {bottom: -0.25em; }figure {margin: var(--universal-margin); }figcaption {color: var(--secondary-fore-color); }a {text-decoration: none; }a:link {color: var(--a-link-color); }a:visited {color: var(--a-visited-color); }a:hover, a:focus {text-decoration: underline; }.container {margin: 0 auto;padding: 0 calc(1.5 * var(--universal-padding)); }.row {box-sizing: border-box;display: flex;flex: 0 1 auto;flex-flow: row wrap;margin: 0 0 0 var(--background-margin); }.col-sm,[class^='col-sm-'],[class^='col-sm-offset-'],.row[class*='cols-sm-'] > * {box-sizing: border-box;flex: 0 0 auto;padding: 0 calc(var(--universal-padding) / 2); }.col-sm,.row.cols-sm > * {max-width: 100%;flex-grow: 1;flex-basis: 0; }.col-sm-1,.row.cols-sm-1 > * {max-width: 8.3333333333%;flex-basis: 8.3333333333%; }.col-sm-offset-0 {margin-left: 0; }.col-sm-2,.row.cols-sm-2 > * {max-width: 16.6666666667%;flex-basis: 16.6666666667%; }.col-sm-offset-1 {margin-left: 8.3333333333%; }.col-sm-3,.row.cols-sm-3 > * {max-width: 25%;flex-basis: 25%; }.col-sm-offset-2 {margin-left: 16.6666666667%; }.col-sm-4,.row.cols-sm-4 > * {max-width: 33.3333333333%;flex-basis: 33.3333333333%; }.col-sm-offset-3 {margin-left: 25%; }.col-sm-5,.row.cols-sm-5 > * {max-width: 41.6666666667%;flex-basis: 41.6666666667%; }.col-sm-offset-4 {margin-left: 33.3333333333%; }.col-sm-6,.row.cols-sm-6 > * {max-width: 50%;flex-basis: 50%; }.col-sm-offset-5 {margin-left: 41.6666666667%; }.col-sm-7,.row.cols-sm-7 > * {max-width: 58.3333333333%;flex-basis: 58.3333333333%; }.col-sm-offset-6 {margin-left: 50%; }.col-sm-8,.row.cols-sm-8 > * {max-width: 66.6666666667%;flex-basis: 66.6666666667%; }.col-sm-offset-7 {margin-left: 58.3333333333%; }.col-sm-9,.row.cols-sm-9 > * {max-width: 75%;flex-basis: 75%; }.col-sm-offset-8 {margin-left: 66.6666666667%; }.col-sm-10,.row.cols-sm-10 > * {max-width: 83.3333333333%;flex-basis: 83.3333333333%; }.col-sm-offset-9 {margin-left: 75%; }.col-sm-11,.row.cols-sm-11 > * {max-width: 91.6666666667%;flex-basis: 91.6666666667%; }.col-sm-offset-10 {margin-left: 83.3333333333%; }.col-sm-12,.row.cols-sm-12 > * {max-width: 100%;flex-basis: 100%; }.col-sm-offset-11 {margin-left: 91.6666666667%; }.col-sm-normal {order: initial; }.col-sm-first {order: -999; }.col-sm-last {order: 999; }@media screen and (min-width: 500px) {.col-md,[class^='col-md-'],[class^='col-md-offset-'],.row[class*='cols-md-'] > * {box-sizing: border-box;flex: 0 0 auto;padding: 0 calc(var(--universal-padding) / 2); }.col-md,.row.cols-md > * {max-width: 100%;flex-grow: 1;flex-basis: 0; }.col-md-1,.row.cols-md-1 > * {max-width: 8.3333333333%;flex-basis: 8.3333333333%; }.col-md-offset-0 {margin-left: 0; }.col-md-2,.row.cols-md-2 > * {max-width: 16.6666666667%;flex-basis: 16.6666666667%; }.col-md-offset-1 {margin-left: 8.3333333333%; }.col-md-3,.row.cols-md-3 > * {max-width: 25%;flex-basis: 25%; }.col-md-offset-2 {margin-left: 16.6666666667%; }.col-md-4,.row.cols-md-4 > * {max-width: 33.3333333333%;flex-basis: 33.3333333333%; }.col-md-offset-3 {margin-left: 25%; }.col-md-5,.row.cols-md-5 > * {max-width: 41.6666666667%;flex-basis: 41.6666666667%; }.col-md-offset-4 {margin-left: 33.3333333333%; }.col-md-6,.row.cols-md-6 > * {max-width: 50%;flex-basis: 50%; }.col-md-offset-5 {margin-left: 41.6666666667%; }.col-md-7,.row.cols-md-7 > * {max-width: 58.3333333333%;flex-basis: 58.3333333333%; }.col-md-offset-6 {margin-left: 50%; }.col-md-8,.row.cols-md-8 > * {max-width: 66.6666666667%;flex-basis: 66.6666666667%; }.col-md-offset-7 {margin-left: 58.3333333333%; }.col-md-9,.row.cols-md-9 > * {max-width: 75%;flex-basis: 75%; }.col-md-offset-8 {margin-left: 66.6666666667%; }.col-md-10,.row.cols-md-10 > * {max-width: 83.3333333333%;flex-basis: 83.3333333333%; }.col-md-offset-9 {margin-left: 75%; }.col-md-11,.row.cols-md-11 > * {max-width: 91.6666666667%;flex-basis: 91.6666666667%; }.col-md-offset-10 {margin-left: 83.3333333333%; }.col-md-12,.row.cols-md-12 > * {max-width: 100%;flex-basis: 100%; }.col-md-offset-11 {margin-left: 91.6666666667%; }.col-md-normal {order: initial; }.col-md-first {order: -999; }.col-md-last {order: 999; } }@media screen and (min-width: 1280px) {.col-lg,[class^='col-lg-'],[class^='col-lg-offset-'],.row[class*='cols-lg-'] > * {box-sizing: border-box;flex: 0 0 auto;padding: 0 calc(var(--universal-padding) / 2); }.col-lg,.row.cols-lg > * {max-width: 100%;flex-grow: 1;flex-basis: 0; }.col-lg-1,.row.cols-lg-1 > * {max-width: 8.3333333333%;flex-basis: 8.3333333333%; }.col-lg-offset-0 {margin-left: 0; }.col-lg-2,.row.cols-lg-2 > * {max-width: 16.6666666667%;flex-basis: 16.6666666667%; }.col-lg-offset-1 {margin-left: 8.3333333333%; }.col-lg-3,.row.cols-lg-3 > * {max-width: 25%;flex-basis: 25%; }.col-lg-offset-2 {margin-left: 16.6666666667%; }.col-lg-4,.row.cols-lg-4 > * {max-width: 33.3333333333%;flex-basis: 33.3333333333%; }.col-lg-offset-3 {margin-left: 25%; }.col-lg-5,.row.cols-lg-5 > * {max-width: 41.6666666667%;flex-basis: 41.6666666667%; }.col-lg-offset-4 {margin-left: 33.3333333333%; }.col-lg-6,.row.cols-lg-6 > * {max-width: 50%;flex-basis: 50%; }.col-lg-offset-5 {margin-left: 41.6666666667%; }.col-lg-7,.row.cols-lg-7 > * {max-width: 58.3333333333%;flex-basis: 58.3333333333%; }.col-lg-offset-6 {margin-left: 50%; }.col-lg-8,.row.cols-lg-8 > * {max-width: 66.6666666667%;flex-basis: 66.6666666667%; }.col-lg-offset-7 {margin-left: 58.3333333333%; }.col-lg-9,.row.cols-lg-9 > * {max-width: 75%;flex-basis: 75%; }.col-lg-offset-8 {margin-left: 66.6666666667%; }.col-lg-10,.row.cols-lg-10 > * {max-width: 83.3333333333%;flex-basis: 83.3333333333%; }.col-lg-offset-9 {margin-left: 75%; }.col-lg-11,.row.cols-lg-11 > * {max-width: 91.6666666667%;flex-basis: 91.6666666667%; }.col-lg-offset-10 {margin-left: 83.3333333333%; }.col-lg-12,.row.cols-lg-12 > * {max-width: 100%;flex-basis: 100%; }.col-lg-offset-11 {margin-left: 91.6666666667%; }.col-lg-normal {order: initial; }.col-lg-first {order: -999; }.col-lg-last {order: 999; } }:root {--card-back-color: #3cb4e6;--card-fore-color: #03234b;--card-border-color: #03234b; }.card {display: flex;flex-direction: column;justify-content: space-between;align-self: center;position: relative;width: 100%;background: var(--card-back-color);color: var(--card-fore-color);border: 0.0714285714rem solid var(--card-border-color);border-radius: var(--universal-border-radius);margin: var(--universal-margin);overflow: hidden; }@media screen and (min-width: 320px) {.card {max-width: 320px; } }.card > .sectione {background: var(--card-back-color);color: var(--card-fore-color);box-sizing: border-box;margin: 0;border: 0;border-radius: 0;border-bottom: 0.0714285714rem solid var(--card-border-color);padding: var(--universal-padding);width: 100%; }.card > .sectione.media {height: 200px;padding: 0;-o-object-fit: cover;object-fit: cover; }.card > .sectione:last-child {border-bottom: 0; }@media screen and (min-width: 240px) {.card.small {max-width: 240px; } }@media screen and (min-width: 480px) {.card.large {max-width: 480px; } }.card.fluid {max-width: 100%;width: auto; }.card.warning {--card-back-color: #e5b8b7;--card-fore-color: #3b234b;--card-border-color: #8c0078; }.card.error {--card-back-color: #464650;--card-fore-color: #ffffff;--card-border-color: #8c0078; }.card > .sectione.dark {--card-back-color: #3b234b;--card-fore-color: #ffffff; }.card > .sectione.double-padded {padding: calc(1.5 * var(--universal-padding)); }:root {--form-back-color: #ffe97f;--form-fore-color: #03234b;--form-border-color: #3cb4e6;--input-back-color: #ffffff;--input-fore-color: #03234b;--input-border-color: #3cb4e6;--input-focus-color: #0288d1;--input-invalid-color: #d32f2f;--button-back-color: #e2e2e2;--button-hover-back-color: #dcdcdc;--button-fore-color: #212121;--button-border-color: transparent;--button-hover-border-color: transparent;--button-group-border-color: rgba(124, 124, 124, 0.54); }form {background: var(--form-back-color);color: var(--form-fore-color);border: 0.0714285714rem solid var(--form-border-color);border-radius: var(--universal-border-radius);margin: var(--universal-margin);padding: calc(2 * var(--universal-padding)) var(--universal-padding); }fieldset {border: 0.0714285714rem solid var(--form-border-color);border-radius: var(--universal-border-radius);margin: calc(var(--universal-margin) / 4);padding: var(--universal-padding); }legend {box-sizing: border-box;display: table;max-width: 100%;white-space: normal;font-weight: 500;padding: calc(var(--universal-padding) / 2); }label {padding: calc(var(--universal-padding) / 2) var(--universal-padding); }.input-group {display: inline-block; }.input-group.fluid {display: flex;align-items: center;justify-content: center; }.input-group.fluid > input {max-width: 100%;flex-grow: 1;flex-basis: 0px; }@media screen and (max-width: 499px) {.input-group.fluid {align-items: stretch;flex-direction: column; } }.input-group.vertical {display: flex;align-items: stretch;flex-direction: column; }.input-group.vertical > input {max-width: 100%;flex-grow: 1;flex-basis: 0px; }[type="number"]::-webkit-inner-spin-button, [type="number"]::-webkit-outer-spin-button {height: auto; }[type="search"] {-webkit-appearance: textfield;outline-offset: -2px; }[type="search"]::-webkit-search-cancel-button,[type="search"]::-webkit-search-decoration {-webkit-appearance: none; }input:not([type]), [type="text"], [type="email"], [type="number"], [type="search"],[type="password"], [type="url"], [type="tel"], [type="checkbox"], [type="radio"], textarea, select {box-sizing: border-box;background: var(--input-back-color);color: var(--input-fore-color);border: 0.0714285714rem solid var(--input-border-color);border-radius: var(--universal-border-radius);margin: calc(var(--universal-margin) / 2);padding: var(--universal-padding) calc(1.5 * var(--universal-padding)); }input:not([type="button"]):not([type="submit"]):not([type="reset"]):hover, input:not([type="button"]):not([type="submit"]):not([type="reset"]):focus, textarea:hover, textarea:focus, select:hover, select:focus {border-color: var(--input-focus-color);box-shadow: none; }input:not([type="button"]):not([type="submit"]):not([type="reset"]):invalid, input:not([type="button"]):not([type="submit"]):not([type="reset"]):focus:invalid, textarea:invalid, textarea:focus:invalid, select:invalid, select:focus:invalid {border-color: var(--input-invalid-color);box-shadow: none; }input:not([type="button"]):not([type="submit"]):not([type="reset"])[readonly], textarea[readonly], select[readonly] {background: var(--secondary-back-color); }select {max-width: 100%; }option {overflow: hidden;text-overflow: ellipsis; }[type="checkbox"], [type="radio"] {-webkit-appearance: none;-moz-appearance: none;appearance: none;position: relative;height: calc(1rem + var(--universal-padding) / 2);width: calc(1rem + var(--universal-padding) / 2);vertical-align: text-bottom;padding: 0;flex-basis: calc(1rem + var(--universal-padding) / 2) !important;flex-grow: 0 !important; }[type="checkbox"]:checked:before, [type="radio"]:checked:before {position: absolute; }[type="checkbox"]:checked:before {content: '\2713';font-family: sans-serif;font-size: calc(1rem + var(--universal-padding) / 2);top: calc(0rem - var(--universal-padding));left: calc(var(--universal-padding) / 4); }[type="radio"] {border-radius: 100%; }[type="radio"]:checked:before {border-radius: 100%;content: '';top: calc(0.0714285714rem + var(--universal-padding) / 2);left: calc(0.0714285714rem + var(--universal-padding) / 2);background: var(--input-fore-color);width: 0.5rem;height: 0.5rem; }:placeholder-shown {color: var(--input-fore-color); }::-ms-placeholder {color: var(--input-fore-color);opacity: 0.54; }button::-moz-focus-inner, [type="button"]::-moz-focus-inner, [type="reset"]::-moz-focus-inner, [type="submit"]::-moz-focus-inner {border-style: none;padding: 0; }button, html [type="button"], [type="reset"], [type="submit"] {-webkit-appearance: button; }button {overflow: visible;text-transform: none; }button, [type="button"], [type="submit"], [type="reset"],a.button, label.button, .button,a[role="button"], label[role="button"], [role="button"] {display: inline-block;background: var(--button-back-color);color: var(--button-fore-color);border: 0.0714285714rem solid var(--button-border-color);border-radius: var(--universal-border-radius);padding: var(--universal-padding) calc(1.5 * var(--universal-padding));margin: var(--universal-margin);text-decoration: none;cursor: pointer;transition: background 0.3s; }button:hover, button:focus, [type="button"]:hover, [type="button"]:focus, [type="submit"]:hover, [type="submit"]:focus, [type="reset"]:hover, [type="reset"]:focus,a.button:hover,a.button:focus, label.button:hover, label.button:focus, .button:hover, .button:focus,a[role="button"]:hover,a[role="button"]:focus, label[role="button"]:hover, label[role="button"]:focus, [role="button"]:hover, [role="button"]:focus {background: var(--button-hover-back-color);border-color: var(--button-hover-border-color); }input:disabled, input[disabled], textarea:disabled, textarea[disabled], select:disabled, select[disabled], button:disabled, button[disabled], .button:disabled, .button[disabled], [role="button"]:disabled, [role="button"][disabled] {cursor: not-allowed;opacity: 0.75; }.button-group {display: flex;border: 0.0714285714rem solid var(--button-group-border-color);border-radius: var(--universal-border-radius);margin: var(--universal-margin); }.button-group > button, .button-group [type="button"], .button-group > [type="submit"], .button-group > [type="reset"], .button-group > .button, .button-group > [role="button"] {margin: 0;max-width: 100%;flex: 1 1 auto;text-align: center;border: 0;border-radius: 0;box-shadow: none; }.button-group > :not(:first-child) {border-left: 0.0714285714rem solid var(--button-group-border-color); }@media screen and (max-width: 499px) {.button-group {flex-direction: column; }.button-group > :not(:first-child) {border: 0;border-top: 0.0714285714rem solid var(--button-group-border-color); } }button.primary, [type="button"].primary, [type="submit"].primary, [type="reset"].primary, .button.primary, [role="button"].primary {--button-back-color: #1976d2;--button-fore-color: #f8f8f8; }button.primary:hover, button.primary:focus, [type="button"].primary:hover, [type="button"].primary:focus, [type="submit"].primary:hover, [type="submit"].primary:focus, [type="reset"].primary:hover, [type="reset"].primary:focus, .button.primary:hover, .button.primary:focus, [role="button"].primary:hover, [role="button"].primary:focus {--button-hover-back-color: #1565c0; }button.secondary, [type="button"].secondary, [type="submit"].secondary, [type="reset"].secondary, .button.secondary, [role="button"].secondary {--button-back-color: #d32f2f;--button-fore-color: #f8f8f8; }button.secondary:hover, button.secondary:focus, [type="button"].secondary:hover, [type="button"].secondary:focus, [type="submit"].secondary:hover, [type="submit"].secondary:focus, [type="reset"].secondary:hover, [type="reset"].secondary:focus, .button.secondary:hover, .button.secondary:focus, [role="button"].secondary:hover, [role="button"].secondary:focus {--button-hover-back-color: #c62828; }button.tertiary, [type="button"].tertiary, [type="submit"].tertiary, [type="reset"].tertiary, .button.tertiary, [role="button"].tertiary {--button-back-color: #308732;--button-fore-color: #f8f8f8; }button.tertiary:hover, button.tertiary:focus, [type="button"].tertiary:hover, [type="button"].tertiary:focus, [type="submit"].tertiary:hover, [type="submit"].tertiary:focus, [type="reset"].tertiary:hover, [type="reset"].tertiary:focus, .button.tertiary:hover, .button.tertiary:focus, [role="button"].tertiary:hover, [role="button"].tertiary:focus {--button-hover-back-color: #277529; }button.inverse, [type="button"].inverse, [type="submit"].inverse, [type="reset"].inverse, .button.inverse, [role="button"].inverse {--button-back-color: #212121;--button-fore-color: #f8f8f8; }button.inverse:hover, button.inverse:focus, [type="button"].inverse:hover, [type="button"].inverse:focus, [type="submit"].inverse:hover, [type="submit"].inverse:focus, [type="reset"].inverse:hover, [type="reset"].inverse:focus, .button.inverse:hover, .button.inverse:focus, [role="button"].inverse:hover, [role="button"].inverse:focus {--button-hover-back-color: #111; }button.small, [type="button"].small, [type="submit"].small, [type="reset"].small, .button.small, [role="button"].small {padding: calc(0.5 * var(--universal-padding)) calc(0.75 * var(--universal-padding));margin: var(--universal-margin); }button.large, [type="button"].large, [type="submit"].large, [type="reset"].large, .button.large, [role="button"].large {padding: calc(1.5 * var(--universal-padding)) calc(2 * var(--universal-padding));margin: var(--universal-margin); }:root {--header-back-color: #03234b;--header-hover-back-color: #ffd200;--header-fore-color: #ffffff;--header-border-color: #3cb4e6;--nav-back-color: #ffffff;--nav-hover-back-color: #ffe97f;--nav-fore-color: #e6007e;--nav-border-color: #3cb4e6;--nav-link-color: #3cb4e6;--footer-fore-color: #ffffff;--footer-back-color: #03234b;--footer-border-color: #3cb4e6;--footer-link-color: #3cb4e6;--drawer-back-color: #ffffff;--drawer-hover-back-color: #ffe97f;--drawer-border-color: #3cb4e6;--drawer-close-color: #e6007e; }header {height: 2.75rem;background: var(--header-back-color);color: var(--header-fore-color);border-bottom: 0.0714285714rem solid var(--header-border-color);padding: calc(var(--universal-padding) / 4) 0;white-space: nowrap;overflow-x: auto;overflow-y: hidden; }header.row {box-sizing: content-box; }header .logo {color: var(--header-fore-color);font-size: 1.75rem;padding: var(--universal-padding) calc(2 * var(--universal-padding));text-decoration: none; }header button, header [type="button"], header .button, header [role="button"] {box-sizing: border-box;position: relative;top: calc(0rem - var(--universal-padding) / 4);height: calc(3.1875rem + var(--universal-padding) / 2);background: var(--header-back-color);line-height: calc(3.1875rem - var(--universal-padding) * 1.5);text-align: center;color: var(--header-fore-color);border: 0;border-radius: 0;margin: 0;text-transform: uppercase; }header button:hover, header button:focus, header [type="button"]:hover, header [type="button"]:focus, header .button:hover, header .button:focus, header [role="button"]:hover, header [role="button"]:focus {background: var(--header-hover-back-color); }nav {background: var(--nav-back-color);color: var(--nav-fore-color);border: 0.0714285714rem solid var(--nav-border-color);border-radius: var(--universal-border-radius);margin: var(--universal-margin); }nav * {padding: var(--universal-padding) calc(1.5 * var(--universal-padding)); }nav a, nav a:visited {display: block;color: var(--nav-link-color);border-radius: var(--universal-border-radius);transition: background 0.3s; }nav a:hover, nav a:focus, nav a:visited:hover, nav a:visited:focus {text-decoration: none;background: var(--nav-hover-back-color); }nav .sublink-1 {position: relative;margin-left: calc(2 * var(--universal-padding)); }nav .sublink-1:before {position: absolute;left: calc(var(--universal-padding) - 1 * var(--universal-padding));top: -0.0714285714rem;content: '';height: 100%;border: 0.0714285714rem solid var(--nav-border-color);border-left: 0; }nav .sublink-2 {position: relative;margin-left: calc(4 * var(--universal-padding)); }nav .sublink-2:before {position: absolute;left: calc(var(--universal-padding) - 3 * var(--universal-padding));top: -0.0714285714rem;content: '';height: 100%;border: 0.0714285714rem solid var(--nav-border-color);border-left: 0; }footer {background: var(--footer-back-color);color: var(--footer-fore-color);border-top: 0.0714285714rem solid var(--footer-border-color);padding: calc(2 * var(--universal-padding)) var(--universal-padding);font-size: 0.875rem; }footer a, footer a:visited {color: var(--footer-link-color); }header.sticky {position: -webkit-sticky;position: sticky;z-index: 1101;top: 0; }footer.sticky {position: -webkit-sticky;position: sticky;z-index: 1101;bottom: 0; }.drawer-toggle:before {display: inline-block;position: relative;vertical-align: bottom;content: '\00a0\2261\00a0';font-family: sans-serif;font-size: 1.5em; }@media screen and (min-width: 500px) {.drawer-toggle:not(.persistent) {display: none; } }[type="checkbox"].drawer {height: 1px;width: 1px;margin: -1px;overflow: hidden;position: absolute;clip: rect(0 0 0 0);-webkit-clip-path: inset(100%);clip-path: inset(100%); }[type="checkbox"].drawer + * {display: block;box-sizing: border-box;position: fixed;top: 0;width: 320px;height: 100vh;overflow-y: auto;background: var(--drawer-back-color);border: 0.0714285714rem solid var(--drawer-border-color);border-radius: 0;margin: 0;z-index: 1110;right: -320px;transition: right 0.3s; }[type="checkbox"].drawer + * .drawer-close {position: absolute;top: var(--universal-margin);right: var(--universal-margin);z-index: 1111;width: 2rem;height: 2rem;border-radius: var(--universal-border-radius);padding: var(--universal-padding);margin: 0;cursor: pointer;transition: background 0.3s; }[type="checkbox"].drawer + * .drawer-close:before {display: block;content: '\00D7';color: var(--drawer-close-color);position: relative;font-family: sans-serif;font-size: 2rem;line-height: 1;text-align: center; }[type="checkbox"].drawer + * .drawer-close:hover, [type="checkbox"].drawer + * .drawer-close:focus {background: var(--drawer-hover-back-color); }@media screen and (max-width: 320px) {[type="checkbox"].drawer + * {width: 100%; } }[type="checkbox"].drawer:checked + * {right: 0; }@media screen and (min-width: 500px) {[type="checkbox"].drawer:not(.persistent) + * {position: static;height: 100%;z-index: 1100; }[type="checkbox"].drawer:not(.persistent) + * .drawer-close {display: none; } }:root {--table-border-color: #03234b;--table-border-separator-color: #03234b;--table-head-back-color: #03234b;--table-head-fore-color: #ffffff;--table-body-back-color: #ffffff;--table-body-fore-color: #03234b;--table-body-alt-back-color: #f4f4f4; }table {border-collapse: separate;border-spacing: 0;margin: 0;display: flex;flex: 0 1 auto;flex-flow: row wrap;padding: var(--universal-padding);padding-top: 0; }table caption {font-size: 1rem;margin: calc(2 * var(--universal-margin)) 0;max-width: 100%;flex: 0 0 100%; }table thead, table tbody {display: flex;flex-flow: row wrap;border: 0.0714285714rem solid var(--table-border-color); }table thead {z-index: 999;border-radius: var(--universal-border-radius) var(--universal-border-radius) 0 0;border-bottom: 0.0714285714rem solid var(--table-border-separator-color); }table tbody {border-top: 0;margin-top: calc(0 - var(--universal-margin));border-radius: 0 0 var(--universal-border-radius) var(--universal-border-radius); }table tr {display: flex;padding: 0; }table th, table td {padding: calc(0.5 * var(--universal-padding));font-size: 0.9rem; }table th {text-align: left;background: var(--table-head-back-color);color: var(--table-head-fore-color); }table td {background: var(--table-body-back-color);color: var(--table-body-fore-color);border-top: 0.0714285714rem solid var(--table-border-color); }table:not(.horizontal) {overflow: auto;max-height: 100%; }table:not(.horizontal) thead, table:not(.horizontal) tbody {max-width: 100%;flex: 0 0 100%; }table:not(.horizontal) tr {flex-flow: row wrap;flex: 0 0 100%; }table:not(.horizontal) th, table:not(.horizontal) td {flex: 1 0 0%;overflow: hidden;text-overflow: ellipsis; }table:not(.horizontal) thead {position: sticky;top: 0; }table:not(.horizontal) tbody tr:first-child td {border-top: 0; }table.horizontal {border: 0; }table.horizontal thead, table.horizontal tbody {border: 0;flex: .2 0 0;flex-flow: row nowrap; }table.horizontal tbody {overflow: auto;justify-content: space-between;flex: .8 0 0;margin-left: 0;padding-bottom: calc(var(--universal-padding) / 4); }table.horizontal tr {flex-direction: column;flex: 1 0 auto; }table.horizontal th, table.horizontal td {width: auto;border: 0;border-bottom: 0.0714285714rem solid var(--table-border-color); }table.horizontal th:not(:first-child), table.horizontal td:not(:first-child) {border-top: 0; }table.horizontal th {text-align: right;border-left: 0.0714285714rem solid var(--table-border-color);border-right: 0.0714285714rem solid var(--table-border-separator-color); }table.horizontal thead tr:first-child {padding-left: 0; }table.horizontal th:first-child, table.horizontal td:first-child {border-top: 0.0714285714rem solid var(--table-border-color); }table.horizontal tbody tr:last-child td {border-right: 0.0714285714rem solid var(--table-border-color); }table.horizontal tbody tr:last-child td:first-child {border-top-right-radius: 0.25rem; }table.horizontal tbody tr:last-child td:last-child {border-bottom-right-radius: 0.25rem; }table.horizontal thead tr:first-child th:first-child {border-top-left-radius: 0.25rem; }table.horizontal thead tr:first-child th:last-child {border-bottom-left-radius: 0.25rem; }@media screen and (max-width: 499px) {table, table.horizontal {border-collapse: collapse;border: 0;width: 100%;display: table; }table thead, table th, table.horizontal thead, table.horizontal th {border: 0;height: 1px;width: 1px;margin: -1px;overflow: hidden;padding: 0;position: absolute;clip: rect(0 0 0 0);-webkit-clip-path: inset(100%);clip-path: inset(100%); }table tbody, table.horizontal tbody {border: 0;display: table-row-group; }table tr, table.horizontal tr {display: block;border: 0.0714285714rem solid var(--table-border-color);border-radius: var(--universal-border-radius);background: #ffffff;padding: var(--universal-padding);margin: var(--universal-margin);margin-bottom: calc(1 * var(--universal-margin)); }table th, table td, table.horizontal th, table.horizontal td {width: auto; }table td, table.horizontal td {display: block;border: 0;text-align: right; }table td:before, table.horizontal td:before {content: attr(data-label);float: left;font-weight: 600; }table th:first-child, table td:first-child, table.horizontal th:first-child, table.horizontal td:first-child {border-top: 0; }table tbody tr:last-child td, table.horizontal tbody tr:last-child td {border-right: 0; } }table tr:nth-of-type(2n) > td {background: var(--table-body-alt-back-color); }@media screen and (max-width: 500px) {table tr:nth-of-type(2n) {background: var(--table-body-alt-back-color); } }:root {--table-body-hover-back-color: #90caf9; }table.hoverable tr:hover, table.hoverable tr:hover > td, table.hoverable tr:focus, table.hoverable tr:focus > td {background: var(--table-body-hover-back-color); }@media screen and (max-width: 500px) {table.hoverable tr:hover, table.hoverable tr:hover > td, table.hoverable tr:focus, table.hoverable tr:focus > td {background: var(--table-body-hover-back-color); } }:root {--mark-back-color: #3cb4e6;--mark-fore-color: #ffffff; }mark {background: var(--mark-back-color);color: var(--mark-fore-color);font-size: 0.95em;line-height: 1em;border-radius: var(--universal-border-radius);padding: calc(var(--universal-padding) / 4) var(--universal-padding); }mark.inline-block {display: inline-block;font-size: 1em;line-height: 1.4;padding: calc(var(--universal-padding) / 2) var(--universal-padding); }:root {--toast-back-color: #424242;--toast-fore-color: #fafafa; }.toast {position: fixed;bottom: calc(var(--universal-margin) * 3);left: 50%;transform: translate(-50%, -50%);z-index: 1111;color: var(--toast-fore-color);background: var(--toast-back-color);border-radius: calc(var(--universal-border-radius) * 16);padding: var(--universal-padding) calc(var(--universal-padding) * 3); }:root {--tooltip-back-color: #212121;--tooltip-fore-color: #fafafa; }.tooltip {position: relative;display: inline-block; }.tooltip:before, .tooltip:after {position: absolute;opacity: 0;clip: rect(0 0 0 0);-webkit-clip-path: inset(100%);clip-path: inset(100%);transition: all 0.3s;z-index: 1010;left: 50%; }.tooltip:not(.bottom):before, .tooltip:not(.bottom):after {bottom: 75%; }.tooltip.bottom:before, .tooltip.bottom:after {top: 75%; }.tooltip:hover:before, .tooltip:hover:after, .tooltip:focus:before, .tooltip:focus:after {opacity: 1;clip: auto;-webkit-clip-path: inset(0%);clip-path: inset(0%); }.tooltip:before {content: '';background: transparent;border: var(--universal-margin) solid transparent;left: calc(50% - var(--universal-margin)); }.tooltip:not(.bottom):before {border-top-color: #212121; }.tooltip.bottom:before {border-bottom-color: #212121; }.tooltip:after {content: attr(aria-label);color: var(--tooltip-fore-color);background: var(--tooltip-back-color);border-radius: var(--universal-border-radius);padding: var(--universal-padding);white-space: nowrap;transform: translateX(-50%); }.tooltip:not(.bottom):after {margin-bottom: calc(2 * var(--universal-margin)); }.tooltip.bottom:after {margin-top: calc(2 * var(--universal-margin)); }:root {--modal-overlay-color: rgba(0, 0, 0, 0.45);--modal-close-color: #e6007e;--modal-close-hover-color: #ffe97f; }[type="checkbox"].modal {height: 1px;width: 1px;margin: -1px;overflow: hidden;position: absolute;clip: rect(0 0 0 0);-webkit-clip-path: inset(100%);clip-path: inset(100%); }[type="checkbox"].modal + div {position: fixed;top: 0;left: 0;display: none;width: 100vw;height: 100vh;background: var(--modal-overlay-color); }[type="checkbox"].modal + div .card {margin: 0 auto;max-height: 50vh;overflow: auto; }[type="checkbox"].modal + div .card .modal-close {position: absolute;top: 0;right: 0;width: 1.75rem;height: 1.75rem;border-radius: var(--universal-border-radius);padding: var(--universal-padding);margin: 0;cursor: pointer;transition: background 0.3s; }[type="checkbox"].modal + div .card .modal-close:before {display: block;content: '\00D7';color: var(--modal-close-color);position: relative;font-family: sans-serif;font-size: 1.75rem;line-height: 1;text-align: center; }[type="checkbox"].modal + div .card .modal-close:hover, [type="checkbox"].modal + div .card .modal-close:focus {background: var(--modal-close-hover-color); }[type="checkbox"].modal:checked + div {display: flex;flex: 0 1 auto;z-index: 1200; }[type="checkbox"].modal:checked + div .card .modal-close {z-index: 1211; }:root {--collapse-label-back-color: #03234b;--collapse-label-fore-color: #ffffff;--collapse-label-hover-back-color: #3cb4e6;--collapse-selected-label-back-color: #3cb4e6;--collapse-border-color: var(--collapse-label-back-color);--collapse-selected-border-color: #ceecf8;--collapse-content-back-color: #ffffff;--collapse-selected-label-border-color: #3cb4e6; }.collapse {width: calc(100% - 2 * var(--universal-margin));opacity: 1;display: flex;flex-direction: column;margin: var(--universal-margin);border-radius: var(--universal-border-radius); }.collapse > [type="radio"], .collapse > [type="checkbox"] {height: 1px;width: 1px;margin: -1px;overflow: hidden;position: absolute;clip: rect(0 0 0 0);-webkit-clip-path: inset(100%);clip-path: inset(100%); }.collapse > label {flex-grow: 1;display: inline-block;height: 1.25rem;cursor: pointer;transition: background 0.2s;color: var(--collapse-label-fore-color);background: var(--collapse-label-back-color);border: 0.0714285714rem solid var(--collapse-selected-border-color);padding: calc(1.25 * var(--universal-padding)); }.collapse > label:hover, .collapse > label:focus {background: var(--collapse-label-hover-back-color); }.collapse > label + div {flex-basis: auto;height: 1px;width: 1px;margin: -1px;overflow: hidden;position: absolute;clip: rect(0 0 0 0);-webkit-clip-path: inset(100%);clip-path: inset(100%);transition: max-height 0.3s;max-height: 1px; }.collapse > :checked + label {background: var(--collapse-selected-label-back-color);border-color: var(--collapse-selected-label-border-color); }.collapse > :checked + label + div {box-sizing: border-box;position: relative;width: 100%;height: auto;overflow: auto;margin: 0;background: var(--collapse-content-back-color);border: 0.0714285714rem solid var(--collapse-selected-border-color);border-top: 0;padding: var(--universal-padding);clip: auto;-webkit-clip-path: inset(0%);clip-path: inset(0%);max-height: 100%; }.collapse > label:not(:first-of-type) {border-top: 0; }.collapse > label:first-of-type {border-radius: var(--universal-border-radius) var(--universal-border-radius) 0 0; }.collapse > label:last-of-type:not(:first-of-type) {border-radius: 0 0 var(--universal-border-radius) var(--universal-border-radius); }.collapse > label:last-of-type:first-of-type {border-radius: var(--universal-border-radius); }.collapse > :checked:last-of-type:not(:first-of-type) + label {border-radius: 0; }.collapse > :checked:last-of-type + label + div {border-radius: 0 0 var(--universal-border-radius) var(--universal-border-radius); }mark.tertiary {--mark-back-color: #3cb4e6; }mark.tag {padding: calc(var(--universal-padding)/2) var(--universal-padding);border-radius: 1em; }:root {--progress-back-color: #3cb4e6;--progress-fore-color: #555; }progress {display: block;vertical-align: baseline;-webkit-appearance: none;-moz-appearance: none;appearance: none;height: 0.75rem;width: calc(100% - 2 * var(--universal-margin));margin: var(--universal-margin);border: 0;border-radius: calc(2 * var(--universal-border-radius));background: var(--progress-back-color);color: var(--progress-fore-color); }progress::-webkit-progress-value {background: var(--progress-fore-color);border-top-left-radius: calc(2 * var(--universal-border-radius));border-bottom-left-radius: calc(2 * var(--universal-border-radius)); }progress::-webkit-progress-bar {background: var(--progress-back-color); }progress::-moz-progress-bar {background: var(--progress-fore-color);border-top-left-radius: calc(2 * var(--universal-border-radius));border-bottom-left-radius: calc(2 * var(--universal-border-radius)); }progress[value="1000"]::-webkit-progress-value {border-radius: calc(2 * var(--universal-border-radius)); }progress[value="1000"]::-moz-progress-bar {border-radius: calc(2 * var(--universal-border-radius)); }progress.inline {display: inline-block;vertical-align: middle;width: 60%; }:root {--spinner-back-color: #ddd;--spinner-fore-color: #555; }@keyframes spinner-donut-anim {0% {transform: rotate(0deg); }100% {transform: rotate(360deg); } }.spinner {display: inline-block;margin: var(--universal-margin);border: 0.25rem solid var(--spinner-back-color);border-left: 0.25rem solid var(--spinner-fore-color);border-radius: 50%;width: 1.25rem;height: 1.25rem;animation: spinner-donut-anim 1.2s linear infinite; }progress.primary {--progress-fore-color: #1976d2; }progress.secondary {--progress-fore-color: #d32f2f; }progress.tertiary {--progress-fore-color: #308732; }.spinner.primary {--spinner-fore-color: #1976d2; }.spinner.secondary {--spinner-fore-color: #d32f2f; }.spinner.tertiary {--spinner-fore-color: #308732; }span[class^='icon-'] {display: inline-block;height: 1em;width: 1em;vertical-align: -0.125em;background-size: contain;margin: 0 calc(var(--universal-margin) / 4); }span[class^='icon-'].secondary {-webkit-filter: invert(25%);filter: invert(25%); }span[class^='icon-'].inverse {-webkit-filter: invert(100%);filter: invert(100%); }span.icon-alert {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='8' x2='12' y2='12'%3E%3C/line%3E%3Cline x1='12' y1='16' x2='12' y2='16'%3E%3C/line%3E%3C/svg%3E"); }span.icon-bookmark {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M19 21l-7-5-7 5V5a2 2 0 0 1 2-2h10a2 2 0 0 1 2 2z'%3E%3C/path%3E%3C/svg%3E"); }span.icon-calendar {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='3' y='4' width='18' height='18' rx='2' ry='2'%3E%3C/rect%3E%3Cline x1='16' y1='2' x2='16' y2='6'%3E%3C/line%3E%3Cline x1='8' y1='2' x2='8' y2='6'%3E%3C/line%3E%3Cline x1='3' y1='10' x2='21' y2='10'%3E%3C/line%3E%3C/svg%3E"); }span.icon-credit {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='1' y='4' width='22' height='16' rx='2' ry='2'%3E%3C/rect%3E%3Cline x1='1' y1='10' x2='23' y2='10'%3E%3C/line%3E%3C/svg%3E"); }span.icon-edit {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M20 14.66V20a2 2 0 0 1-2 2H4a2 2 0 0 1-2-2V6a2 2 0 0 1 2-2h5.34'%3E%3C/path%3E%3Cpolygon points='18 2 22 6 12 16 8 16 8 12 18 2'%3E%3C/polygon%3E%3C/svg%3E"); }span.icon-link {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M18 13v6a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2V8a2 2 0 0 1 2-2h6'%3E%3C/path%3E%3Cpolyline points='15 3 21 3 21 9'%3E%3C/polyline%3E%3Cline x1='10' y1='14' x2='21' y2='3'%3E%3C/line%3E%3C/svg%3E"); }span.icon-help {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M9.09 9a3 3 0 0 1 5.83 1c0 2-3 3-3 3'%3E%3C/path%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='17' x2='12' y2='17'%3E%3C/line%3E%3C/svg%3E"); }span.icon-home {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M3 9l9-7 9 7v11a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2z'%3E%3C/path%3E%3Cpolyline points='9 22 9 12 15 12 15 22'%3E%3C/polyline%3E%3C/svg%3E"); }span.icon-info {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='16' x2='12' y2='12'%3E%3C/line%3E%3Cline x1='12' y1='8' x2='12' y2='8'%3E%3C/line%3E%3C/svg%3E"); }span.icon-lock {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='3' y='11' width='18' height='11' rx='2' ry='2'%3E%3C/rect%3E%3Cpath d='M7 11V7a5 5 0 0 1 10 0v4'%3E%3C/path%3E%3C/svg%3E"); }span.icon-mail {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M4 4h16c1.1 0 2 .9 2 2v12c0 1.1-.9 2-2 2H4c-1.1 0-2-.9-2-2V6c0-1.1.9-2 2-2z'%3E%3C/path%3E%3Cpolyline points='22,6 12,13 2,6'%3E%3C/polyline%3E%3C/svg%3E"); }span.icon-location {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M21 10c0 7-9 13-9 13s-9-6-9-13a9 9 0 0 1 18 0z'%3E%3C/path%3E%3Ccircle cx='12' cy='10' r='3'%3E%3C/circle%3E%3C/svg%3E"); }span.icon-phone {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M22 16.92v3a2 2 0 0 1-2.18 2 19.79 19.79 0 0 1-8.63-3.07 19.5 19.5 0 0 1-6-6 19.79 19.79 0 0 1-3.07-8.67A2 2 0 0 1 4.11 2h3a2 2 0 0 1 2 1.72 12.84 12.84 0 0 0 .7 2.81 2 2 0 0 1-.45 2.11L8.09 9.91a16 16 0 0 0 6 6l1.27-1.27a2 2 0 0 1 2.11-.45 12.84 12.84 0 0 0 2.81.7A2 2 0 0 1 22 16.92z'%3E%3C/path%3E%3C/svg%3E"); }span.icon-rss {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M4 11a9 9 0 0 1 9 9'%3E%3C/path%3E%3Cpath d='M4 4a16 16 0 0 1 16 16'%3E%3C/path%3E%3Ccircle cx='5' cy='19' r='1'%3E%3C/circle%3E%3C/svg%3E"); }span.icon-search {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='11' cy='11' r='8'%3E%3C/circle%3E%3Cline x1='21' y1='21' x2='16.65' y2='16.65'%3E%3C/line%3E%3C/svg%3E"); }span.icon-settings {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='3'%3E%3C/circle%3E%3Cpath d='M19.4 15a1.65 1.65 0 0 0 .33 1.82l.06.06a2 2 0 0 1 0 2.83 2 2 0 0 1-2.83 0l-.06-.06a1.65 1.65 0 0 0-1.82-.33 1.65 1.65 0 0 0-1 1.51V21a2 2 0 0 1-2 2 2 2 0 0 1-2-2v-.09A1.65 1.65 0 0 0 9 19.4a1.65 1.65 0 0 0-1.82.33l-.06.06a2 2 0 0 1-2.83 0 2 2 0 0 1 0-2.83l.06-.06a1.65 1.65 0 0 0 .33-1.82 1.65 1.65 0 0 0-1.51-1H3a2 2 0 0 1-2-2 2 2 0 0 1 2-2h.09A1.65 1.65 0 0 0 4.6 9a1.65 1.65 0 0 0-.33-1.82l-.06-.06a2 2 0 0 1 0-2.83 2 2 0 0 1 2.83 0l.06.06a1.65 1.65 0 0 0 1.82.33H9a1.65 1.65 0 0 0 1-1.51V3a2 2 0 0 1 2-2 2 2 0 0 1 2 2v.09a1.65 1.65 0 0 0 1 1.51 1.65 1.65 0 0 0 1.82-.33l.06-.06a2 2 0 0 1 2.83 0 2 2 0 0 1 0 2.83l-.06.06a1.65 1.65 0 0 0-.33 1.82V9a1.65 1.65 0 0 0 1.51 1H21a2 2 0 0 1 2 2 2 2 0 0 1-2 2h-.09a1.65 1.65 0 0 0-1.51 1z'%3E%3C/path%3E%3C/svg%3E"); }span.icon-share {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='18' cy='5' r='3'%3E%3C/circle%3E%3Ccircle cx='6' cy='12' r='3'%3E%3C/circle%3E%3Ccircle cx='18' cy='19' r='3'%3E%3C/circle%3E%3Cline x1='8.59' y1='13.51' x2='15.42' y2='17.49'%3E%3C/line%3E%3Cline x1='15.41' y1='6.51' x2='8.59' y2='10.49'%3E%3C/line%3E%3C/svg%3E"); }span.icon-cart {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='9' cy='21' r='1'%3E%3C/circle%3E%3Ccircle cx='20' cy='21' r='1'%3E%3C/circle%3E%3Cpath d='M1 1h4l2.68 13.39a2 2 0 0 0 2 1.61h9.72a2 2 0 0 0 2-1.61L23 6H6'%3E%3C/path%3E%3C/svg%3E"); }span.icon-upload {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M21 15v4a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2v-4'%3E%3C/path%3E%3Cpolyline points='17 8 12 3 7 8'%3E%3C/polyline%3E%3Cline x1='12' y1='3' x2='12' y2='15'%3E%3C/line%3E%3C/svg%3E"); }span.icon-user {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M20 21v-2a4 4 0 0 0-4-4H8a4 4 0 0 0-4 4v2'%3E%3C/path%3E%3Ccircle cx='12' cy='7' r='4'%3E%3C/circle%3E%3C/svg%3E"); }:root {--generic-border-color: rgba(0, 0, 0, 0.3);--generic-box-shadow: 0 0.2857142857rem 0.2857142857rem 0 rgba(0, 0, 0, 0.125), 0 0.1428571429rem 0.1428571429rem -0.1428571429rem rgba(0, 0, 0, 0.125); }.hidden {display: none !important; }.visually-hidden {position: absolute !important;width: 1px !important;height: 1px !important;margin: -1px !important;border: 0 !important;padding: 0 !important;clip: rect(0 0 0 0) !important;-webkit-clip-path: inset(100%) !important;clip-path: inset(100%) !important;overflow: hidden !important; }.bordered {border: 0.0714285714rem solid var(--generic-border-color) !important; }.rounded {border-radius: var(--universal-border-radius) !important; }.circular {border-radius: 50% !important; }.shadowed {box-shadow: var(--generic-box-shadow) !important; }.responsive-margin {margin: calc(var(--universal-margin) / 4) !important; }@media screen and (min-width: 500px) {.responsive-margin {margin: calc(var(--universal-margin) / 2) !important; } }@media screen and (min-width: 1280px) {.responsive-margin {margin: var(--universal-margin) !important; } }.responsive-padding {padding: calc(var(--universal-padding) / 4) !important; }@media screen and (min-width: 500px) {.responsive-padding {padding: calc(var(--universal-padding) / 2) !important; } }@media screen and (min-width: 1280px) {.responsive-padding {padding: var(--universal-padding) !important; } }@media screen and (max-width: 499px) {.hidden-sm {display: none !important; } }@media screen and (min-width: 500px) and (max-width: 1279px) {.hidden-md {display: none !important; } }@media screen and (min-width: 1280px) {.hidden-lg {display: none !important; } }@media screen and (max-width: 499px) {.visually-hidden-sm {position: absolute !important;width: 1px !important;height: 1px !important;margin: -1px !important;border: 0 !important;padding: 0 !important;clip: rect(0 0 0 0) !important;-webkit-clip-path: inset(100%) !important;clip-path: inset(100%) !important;overflow: hidden !important; } }@media screen and (min-width: 500px) and (max-width: 1279px) {.visually-hidden-md {position: absolute !important;width: 1px !important;height: 1px !important;margin: -1px !important;border: 0 !important;padding: 0 !important;clip: rect(0 0 0 0) !important;-webkit-clip-path: inset(100%) !important;clip-path: inset(100%) !important;overflow: hidden !important; } }@media screen and (min-width: 1280px) {.visually-hidden-lg {position: absolute !important;width: 1px !important;height: 1px !important;margin: -1px !important;border: 0 !important;padding: 0 !important;clip: rect(0 0 0 0) !important;-webkit-clip-path: inset(100%) !important;clip-path: inset(100%) !important;overflow: hidden !important; } }img[alt="ST logo"] { display: block; margin: auto; width: 75%; max-width: 250px; min-width: 71px; }img[alt="Cube logo"] { float: right; width: 30%; max-width: 10rem; min-width: 8rem; padding-right: 1rem;}.figure {display: block;margin-left: auto;margin-right: auto;text-align: center;}</style>
+ <link rel="stylesheet" href="_htmresc/mini-st_2020.css" />
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@@ -24,7 +24,7 @@
<h1 id="release-notes-forstm32f1xx-hal-drivers"><small>Release Notes for</small><mark>STM32F1xx HAL Drivers</mark></h1>
<p>Copyright © 2016 STMicroelectronics<br />
</p>
-<a href="https://www.st.com" class="logo"><img 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IrCnw5Hupdl9GRx8bUEiX6rIUcLiENyQaQw+LehQ2g/WfXzf8taUT6euDbNotUSNbOkIIa389Aw9qRqYvXzlvovj1RPWpzrp3R+Ad8i8K8SZ/gpdpASQU3bjqFz36tbTKX2XUk5cvgUh/99xH3U4l6Utt+qCoEyo6m+7iThZcnjESkh0JHy2RfShgtFCH/SQ92hz3lQwKVJqD4JDj/ugv9W/HGJpKEdey8kcPK5dFs+96Xv+UM8JyE8kD6fyunw6D7Xyrk3mrkZF8I96ZilOIa/CFLfHdExC3oZuRCeqO2Sq1fReaZKG65j5Q1XKblM7tubz7WCCHfiO9OEMBls53yhgNEPm5Yc56Cv9JJ80MQt5zqTvt+IubCyg+9AaB6xaKNagPK599ivKliCe3l3nvqbFp7pBXqUfreRXpL3Qpqqlqb7TTJdKjkMjL+ti5bcgGvqxM4huiPTgUscn+leEHV/ylr9jAslDZ2MhtN1y869DX0vXqYfugtyQeoJE/vatjOQNOZlW2YzPoKlWDWXLIjTjiyp/MH+x+PcJoL44dqRg1D5/fyj+Vz3mQtt5/lH6ousQbYlCyKfmB/rkkyqGoDSc3zVTL6vWhY2spC1bXr/UznXU6SEl28LkJb7/OkTmCuxUacoom4MLbK+tyUMSJW1rdg5Ig2rU7UjaKGiDjMPNPmWO/OAFjaHyu8/TL6FplMm7lNlIcLna4fKfC2IoVdMH9QFmPi/KkAO8CnFjdwPUvGiBZPKr6l9Qy94kqxtUTWizixj+hn9d4dq6cmd0VV451/xD5qHnUimDMFak3PwgMqkyYJ2KybzfIEwaWbiGLl8rmqqcUL0iyrYIYz7XMgmzexM0w+P8h5oasOr5uXaC1S2eBz0bcU03aqpq9nHtZPyskylf/8MmV44tHvOsQ2DK8M7GEjgPsyjWjQIcAC7+MwR0wRZ8GLV5wMAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAJ+IJOrpdJMztkjPE/fzDGdqU/AORgzRg72q7m61p7//cC2gB6IMX3jTF2ir4CBbNLA/R9rQ8JCrFAJs1syhi7ZIydj70vQFXcblfzapUhw5K5LCbNjM8A78beD6BKFtvV/Kj2RweFWACTZnaH5TComPV2Nd8bwgPEkjkjk2bGl8Q3o+0AMBSqnxkKoBAzQDbCF8bYdHQ3D4ZG1V5lld/Kas7wIY/xK5QhGAAX29V8MaQHCRtiQkgZPhXWrA1jbFlAO0Bd/Kjdo6wDCjERk2a2S8vklHBF9508gINZ1gAQCyjEBCS0GfLlyxmUHwBuwKmShqeIypDPAk+gBAHwBwoxMhRjuB/hKvfb1fysqJsFoHKgECMyaWZXEQKulxTqsCnqZgEYALAhRmLSzI4ZYw+Bz369Xc2virlJAAYGFGIEInmUj4YW8wVAaSAwOw7Pgc96BmUIQHygEAMzaWbPgT3K90MMgAWgRKAQAxLJo3yR9aYAGBHwMgeCMteE9ijfx/ImU7A4z7RzjH3VTkRzcGV+Nnx/8m3iaxYDZogBII9yjDRef0do63TSzF4owcQplKEzf8Y4KYVq5Xw2XzNcsxigED0hj3Lo8BpBjNnhDUMhKl82MXIAUsb0y+R38wue6PUk4/WzA4XoT2iPcmz+ray9JXIQ2pQxaWb7BZSPGEyiV1egED2YNLOYe5RZjC1/ZB/Clj93gifPIJth7rRwg0r06goUoiPkUT6MfJkodioexrNdzb9AMVpzHSkEKnSoli2DS/TqCnaqOJC4FgpfnkVN4ErLtdiz3dqJkkyjgAJjSBIiAYVoSYas18kqmkl2rBjZeWomyjMgj3JOJ8ogSoeGBArRgkxZr1nqUVyyaUEx/s+jvBfBiRIj+YcNm+1qvpPx+kUChWgBxe/lClnJMpqjZnR4k0XGgVVmD06Uz0AhGkIe5dhOlD429IImF+SRKsaz0E6UQkrQ8gzrjxmvXyzwMhuQyKNswtvLRMo5KXzJPjLPdCyPcm7n1QWUYTuYIfZAuwdyB8y2kS17NtnA7gbqmX6MsWMDHuXygULsoNA6yjqyFZoaYMhOLI9yylAtHcvtan6Q8fpVAIXYQiGGb1s2NGNMXnh+QJ7pnSF6lGN4yocIFGILmT3KvmzIVpQ8sWzlihEe5ZEDhaihEI9yKIJ7Sk2pzDMdpZ8mzewVHuV6gJdZYdLMbgakDDl3k2b2k5RTUsiAv0M2zpK5jaQMc9tWr6EM7cAMUaJwj3IosngaC+7bKAHv8CjXCRQiUZFHORTJQ3YKdFTF8ijnVv7J9r8PDSjEX46A1wKakoOkirGwvo7hUc49sMKj7AFsiP+jtqzXIeHe4Fdu/KeYwqjQi1pCPFzwQYBmwLlXGcGzeY+J0SvESTN7QI2RN/jM7TmFYqTQlpyV3WIV/s+tDINn8x4bo14yk0f5vICmlErUkB3u/c5w37ESveYO1YpWFnVMjFYhjsSjHIqjGDOqDEoklkc598AaZe/1GBnlkrmQCmc18UT2sdD8k7APNpGU4WlmZTj60qEhGZ1CJC/nmJ0ortRuZw3uyClkYEXChoCMcYaYc5N9rZxEckJ8TdQfwUtsFjKwwqMcmN8HdTcG8GUTjeyoMNfNOqbHkp5BCvthrBKbuZXhWY6sRkNndAqR/Qr7AHlJUW3ungrzB6WAUK0oe68BdqqADCTy8EdJiFpA6VDsUY4IFCJICi2VYy83o5TYLCBUC8owMqPfqQLSQft8U9jehuhRvoAyjA8UIkgC1RRJsbUteG0ZKQt4DpaUhCLnVsfRMEqnCkhH4pICsRKiPmeISshWH2fMQCGCaCROknofYy8v3UNKj3K2CooAThUQGJoRciVynLBva/cobyiuEOn+M4MZIggC2Qgvcy0tQ5+USofGUoa8zTyO8DtmgmUBhQicyVw3ZEM2w1jOBt8tcRta/i4picUC2+wAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAhkvVW/condQHutLFU7lInmTgh2nGYSnV/QZZikFqaCukSIyxLDW4W3oXo5aeiE3tO1V0KZm6lLxQbp3lLzUZWsRWKwBSsy/JOd+iGKM+TAhEG68ZY9UWzK9aIW5X8zflR6NTb746i7q8dySIfLTb824oAKAKRrGXmVK/f0jhpKaKokLsYl/uvvS5OO6+aylAvz9WkhssU+xhpfv7k2a/4vobmk38LZb60r0sZNOCcu+d92lzPA1Uf2na9Uhmi0Vbu9Rr0Dm+SZX61nR/PzT3cknHiWe+pGONkinQCkHuU8Fbf9I9a5+ppt2M+uBYas9Gas+nGR/1m7juH9JX3xQzkbbvJXmQMw5Z9YHmXPIz1Pb9EBhLcof/kpKT7THqtH4q1Qmeaj77lJqJhOVGedmX0m8v6ThGnx+FUo6UjUWuMc2F9Lu0pBIK5JiSMCyVJK2yIO9KmV0WdK4uWo8nm+uT8vLckyJh0ot6Sv2y0CgdtU3ytc7onH+S4hHneZQUgDBx/CM9Q56N55yOPWpRRGqyCn7OC6nvvtLzvqHzXGtyMOraLQYBYar5Sm09pvOotVJ2NbLIqA3ywP4uk5p6L0up7eJ8p1IfLNpWTJpzCdkSsv1VeYaDSWI7iHyI8pJZLKM9j3uil7RLaF5I0HozGysCpnuJbO/3SVIi2pe74/qf2qCYHEzOpz1eUSgXfZloKGXYja5dyjW6noNqLjlrc36RU+2c/nsgnhnN6kRW7N6BSypSL57/njheac+GrtM2g+a/f6H/Pm5X85Oe+2tT5M+kLI2ybFMZVTF4HCkzbFm2DgzO1foMawQ1VRyQ6vJyr99On9DQCyqqwF2SgnK99pUksHsmSxa6fvAEqkq7jiVleGaSlouO+aQENFx3nGMhzSrXXZEA29X8QvqvvJx8EMqQJ5rtm8Xz78m2vKbfPbQcetG1PKXvRJuOaXZthRQ5wUgeemdrpHhFP70PJnQuIVu9cs3snmEVIB+iG+Jl2p80s58OZ/jm4bUWS6mFjS2IC/ekmanL05DsS9cyvjeeJZqWXSFwDfcQbXd9nm19atIeWem4JNeVleirS1/yWSgNLOJcVnbvwM8wK1CIbqxphpijTu4/9AIe8iWXqVKk5ZmJMjR5KXXnke2Ix6bp8GlmmZu1NOOPOpOOgPz8dzxt1EtJtqam53KZ2ZYKlsxuiCXCKdnNOuHCxW2OfPZBtsdP8KUwfS//0QWeX0lLxBcTYaRjtNdlv5ad4sW6aTuOffTique4l2a9DyZmATqmbbmZEmGf5DPEZ7IRdrV7SsfxZ/RKfZIFGpDFszOVhzudjJFJwfZcqWptJ6HqGaIUrvGH5rOFJqxDd9yb3UkJlxACvqsLu6Hl5w7ZX07pxVY9cUzyhIoXrMvgrKvfcakLxOUOBslR8ix5a39IAr2rhKlsemZ/B6Q0d2nZuKD7EbOE/b6aKfzlnDSzH6Tk7iTv9g+pX9R2qd7v5NBz/SI5J7iS2yje8ankqRV9kGOF8Aluz5QcRkIeRNvF8/tTCf3ROo/oXKpsPdK5XGWrGmpfMn+V/r1QPlsbHvcf+nuq/HatHPdhCUiC9La8olHym0ZhrC2KCR2QIhECu+gyVosZmRQz903xJDMp9OItbo48iGrfyPezQ+c7p/Ops7dHycEhZpLvL5Q02ziiQUO0S511LoQ3WPGiyoPJRnpWfUu3pfJ3F+8OGE0fqM/zVPJKMyl85rrjedq02+R4o/PR7O6CBnYR9yjP0jdSv3c64hTZOidlqpOtMynGtVW2agJlSEEwlPCe1lAZgRKziF1BIDtQiCAoLfvA+azqX8lo/18l7KWIpScAUIggGjQDFLYmdZfM3xSMjLrEAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAgApj7P8B7rljbw+FKrEAAAAASUVORK5CYII=" alt="ST logo" /></a>
+<a href="https://www.st.com" class="logo"><img src="_htmresc/st_logo_2020.png" alt="ST logo" /></a>
</center>
<h1 id="purpose">Purpose</h1>
<p>The STM32Cube HAL and LL, an STM32 abstraction layer embedded software, ensure maximized portability across STM32 portfolio.</p>
@@ -40,15 +40,92 @@
<div class="col-sm-12 col-lg-8">
<h1 id="update-history">Update History</h1>
<div class="collapse">
-<input type="checkbox" id="collapse-section1_1_9" checked aria-hidden="true"> <label for="collapse-section1_1_9" aria-hidden="true"><strong>V1.1.9 / 07-April-2023</strong></label>
+<input type="checkbox" id="collapse-section1_1_10" checked aria-hidden="true"> <label for="collapse-section1_1_10" aria-hidden="true"><strong>V1.1.10 / 22-July-2024</strong></label>
<div>
<h2 id="main-changes">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation.</li>
+</ul>
+<h2 id="contents">Contents</h2>
+<ul>
+<li><strong>HAL</strong> updates
+<ul>
+<li>HAL code quality enhancement for MISRA-C Rule-8.13 by adding const qualifiers.</li>
+</ul></li>
+<li><strong>LL/HAL CORTEX</strong> driver
+<ul>
+<li>Update HAL_MPU_ConfigRegion() to allow the configuration of the MPU registers independently of the value of Enable/Disable field.</li>
+<li>Add new APIs HAL_MPU_EnableRegion() / HAL_MPU_DisableRegion().</li>
+</ul></li>
+<li><strong>HAL FLASH</strong> driver
+<ul>
+<li>Remove HAL_LOCK/HAL_UNLOCK() from HAL_FLASH_Program_IT() and HAL_FLASHEx_Erase_IT() APIs.</li>
+</ul></li>
+<li><strong>HAL GPIO</strong> driver
+<ul>
+<li>Replace GPIO_Pin_x with GPIO_PIN_x to be compliant with macros definition.</li>
+</ul></li>
+<li><strong>HAL CAN</strong> driver
+<ul>
+<li>Clarify pin configuration in driver header by removing open-drain information.</li>
+</ul></li>
+<li><strong>HAL I2C</strong> driver
+<ul>
+<li>Update HAL_I2C_Mem_Read() API to clear ACK bit once 3 bytes to read remain to be able to send the NACK once the transfer ends.</li>
+<li>Update HAL_I2C_Master_Abort_IT() API to support memory abort transfer.</li>
+<li>Update the HAL I2C driver to reset PreviousState to I2C_STATE_NONE at the end of transfer.</li>
+</ul></li>
+<li><strong>HAL SDMMC</strong> driver
+<ul>
+<li>Update HAL SD processes to manage STBITERR flag.</li>
+</ul></li>
+<li><strong>HAL SPI</strong> driver
+<ul>
+<li>Update HAL_SPI_TransmitReceive() API to set the bit CRCNEXT in case of one byte transaction</li>
+<li>Update IT APIs to enable interrupts after process unlock.</li>
+<li>Add wait on flag TXE to be set at the end of transaction to be aligned with reference manual.</li>
+</ul></li>
+<li><strong>HAL I2S</strong> driver
+<ul>
+<li>Update HAL I2S driver to fix misplaced __HAL_LOCK() and remove ‘go to’ instruction.</li>
+</ul></li>
+<li><strong>LL/HAL TIM</strong> driver
+<ul>
+<li>Improve performance by removing multiple volatile reads or writes in interrupt handler.</li>
+<li>HAL TIM driver’s operational behavior improvement.</li>
+<li>Improve period configuration parameter check.</li>
+<li>Update interrupt flag is cleared when the update event is generated by software.</li>
+<li>Remove unnecessary change of MOE bitfield in LL_TIM_BDTR_Init().</li>
+<li>Add LL_TIM_CC_IsEnabledPreload() API.</li>
+</ul></li>
+<li><strong>HAL UART</strong> driver
+<ul>
+<li>Avoid ORE flag to be cleared by a transmit process in polling mode.</li>
+<li>Rework of UART_WaitOnFlagUntilTimeout() API to avoid being stuck forever when UART overrun error occurs and to enhance behavior.</li>
+</ul></li>
+<li><strong>HAL USB_OTG</strong> driver
+<ul>
+<li>Fix device connection in case battery charging is used with HS instance linked to internal FS PHY.</li>
+<li>ll_usb.c: increase timeout value to allow core reset to complete</li>
+<li>ll_usb.c: improve delay management to set core mode</li>
+</ul></li>
+<li><strong>LL UTILS</strong> driver
+<ul>
+<li>Fix ‘Ticks’ parameter’s description of LL_InitTick() API.</li>
+</ul></li>
+</ul>
+</div>
+</div>
+<div class="collapse">
+<input type="checkbox" id="collapse-section1_1_9" aria-hidden="true"> <label for="collapse-section1_1_9" aria-hidden="true"><strong>V1.1.9 / 07-April-2023</strong></label>
+<div>
+<h2 id="main-changes-1">Main Changes</h2>
+<ul>
+<li>General updates to fix known defects and enhancements implementation.</li>
<li>HAL code quality enhancement for MISRA-C Rule-8.13 by adding const qualifiers.</li>
<li>All source files: update disclaimer to add reference to the new license agreement.</li>
</ul>
-<h2 id="contents">Contents</h2>
+<h2 id="contents-1">Contents</h2>
<ul>
<li><strong>HAL Generic</strong> driver
<ul>
@@ -86,11 +163,9 @@
</ul></li>
<li><strong>HAL/LL TIM</strong> driver
<ul>
-<li>Manage configuration of the Capture/compare DMA request source:
-<ul>
+<li>Manage configuration of the Capture/compare DMA request source:</li>
<li>Add related new exported constants (TIM_CCDMAREQUEST_CC, TIM_CCDMAREQUEST_UPDATE).</li>
<li>Create a new macro __HAL_TIM_SELECT_CCDMAREQUEST() allowing to program the TIMx_CR2.CCDS bitfield.</li>
-</ul></li>
<li>Update __LL_TIM_CALC_PSC() macro to round up the evaluated value when the fractional part of the division is greater than 0.5.</li>
<li>Improved driver robustness against wrong period values.</li>
<li>Improved driver robustness against wrong DMA related parameters.</li>
@@ -178,11 +253,11 @@
<div class="collapse">
<input type="checkbox" id="collapse-section1_1_8" aria-hidden="true"> <label for="collapse-section1_1_8" aria-hidden="true"><strong>V1.1.8 / 18-May-2021</strong></label>
<div>
-<h2 id="main-changes-1">Main Changes</h2>
+<h2 id="main-changes-2">Main Changes</h2>
<ul>
<li>General updates to fix known defects.</li>
</ul>
-<h2 id="contents-1">Contents</h2>
+<h2 id="contents-2">Contents</h2>
<ul>
<li><strong>HAL/LL ADC</strong> driver
<ul>
@@ -303,11 +378,11 @@
<div class="collapse">
<input type="checkbox" id="collapse-section1_1_7" aria-hidden="true"> <label for="collapse-section1_1_7" aria-hidden="true"><strong>V1.1.7 / 20-October-2020</strong></label>
<div>
-<h2 id="main-changes-2">Main Changes</h2>
+<h2 id="main-changes-3">Main Changes</h2>
<ul>
<li>General updates to fix known defects.</li>
</ul>
-<h2 id="contents-2">Contents</h2>
+<h2 id="contents-3">Contents</h2>
<ul>
<li><strong>HAL/LL I2C</strong> driver
<ul>
@@ -326,11 +401,11 @@
<div class="collapse">
<input type="checkbox" id="collapse-section1_1_6" aria-hidden="true"> <label for="collapse-section1_1_6" aria-hidden="true"><strong>V1.1.6 / 07-September-2020</strong></label>
<div>
-<h2 id="main-changes-3">Main Changes</h2>
+<h2 id="main-changes-4">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation</li>
</ul>
-<h2 id="contents-3">Contents</h2>
+<h2 id="contents-4">Contents</h2>
<ul>
<li><strong>HAL/LL ADC</strong> driver
<ul>
@@ -509,11 +584,11 @@
<div class="collapse">
<input type="checkbox" id="collapse-section1_1_5" aria-hidden="true"> <label for="collapse-section1_1_5" aria-hidden="true"><strong>V1.1.5 / 30-July-2020</strong></label>
<div>
-<h2 id="main-changes-4">Main Changes</h2>
+<h2 id="main-changes-5">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation</li>
</ul>
-<h2 id="contents-4">Contents</h2>
+<h2 id="contents-5">Contents</h2>
<ul>
<li><strong>HAL</strong> driver
<ul>
@@ -566,7 +641,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section11" aria-hidden="true"> <label for="collapse-section11" aria-hidden="true"><strong>V1.1.4 / 26-June-2019</strong></label>
<div>
-<h2 id="main-changes-5">Main Changes</h2>
+<h2 id="main-changes-6">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation</li>
<li>Add support of HAL callback registration feature</li>
@@ -773,7 +848,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section10" aria-hidden="true"> <label for="collapse-section10" aria-hidden="true"><strong>V1.1.3 / 09-October-2018</strong></label>
<div>
-<h2 id="main-changes-6">Main Changes</h2>
+<h2 id="main-changes-7">Main Changes</h2>
<ul>
<li><strong>Maintenance release to fix known defects and enhancements implementation</strong></li>
<li><strong>Generic drivers changes</strong></li>
@@ -816,7 +891,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section9" aria-hidden="true"> <label for="collapse-section9" aria-hidden="true"><strong>V1.1.2 / 09-March-2018</strong></label>
<div>
-<h2 id="main-changes-7">Main Changes</h2>
+<h2 id="main-changes-8">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation</li>
<li>Remove Date and version from header files</li>
@@ -894,7 +969,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section8" aria-hidden="true"> <label for="collapse-section8" aria-hidden="true"><strong>V1.1.1 / 12-May-2017</strong></label>
<div>
-<h2 id="main-changes-8">Main Changes</h2>
+<h2 id="main-changes-9">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation</li>
<li><strong>HAL Generic</strong> update
@@ -920,7 +995,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section7" aria-hidden="true"> <label for="collapse-section7" aria-hidden="true"><strong>V1.1.0 / 14-April-2017</strong></label>
<div>
-<h2 id="main-changes-9">Main Changes</h2>
+<h2 id="main-changes-10">Main Changes</h2>
<ul>
<li><strong>Add Low Layer drivers allowing performance and footprint optimization</strong>
<ul>
@@ -1202,7 +1277,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section6" aria-hidden="true"> <label for="collapse-section6" aria-hidden="true"><strong>V1.0.5 / 06-December-2016</strong></label>
<div>
-<h2 id="main-changes-10">Main Changes</h2>
+<h2 id="main-changes-11">Main Changes</h2>
<ul>
<li>General updates to fix mainly known I2C defects and enhancements implementation</li>
<li><strong>The following changes done on the HAL drivers require an update on the application code based on HAL V1.0.4</strong>
@@ -1298,7 +1373,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section5" aria-hidden="true"> <label for="collapse-section5" aria-hidden="true"><strong>V1.0.4 / 29-April-2016</strong></label>
<div>
-<h2 id="main-changes-11">Main Changes</h2>
+<h2 id="main-changes-12">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation.</li>
<li><strong>HAL RCC</strong>
@@ -1338,7 +1413,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section4" aria-hidden="true"> <label for="collapse-section4" aria-hidden="true"><strong>V1.0.3 / 11-January-2016</strong></label>
<div>
-<h2 id="main-changes-12">Main Changes</h2>
+<h2 id="main-changes-13">Main Changes</h2>
<ul>
<li>Remove the #if defined(USE_HAL_LEGACY) condition to include Legacy/stm32_hal_legacy.h by default, in stm32f1xx_hal_def.h.</li>
</ul>
@@ -1347,7 +1422,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section3" aria-hidden="true"> <label for="collapse-section3" aria-hidden="true"><strong>V1.0.2 / 18-December-2015</strong></label>
<div>
-<h2 id="main-changes-13">Main Changes</h2>
+<h2 id="main-changes-14">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation.</li>
<li><strong>HAL generic</strong>
@@ -1433,7 +1508,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section2" aria-hidden="true"> <label for="collapse-section2" aria-hidden="true"><strong>V1.0.1 / 31-July-2015</strong></label>
<div>
-<h2 id="main-changes-14">Main Changes</h2>
+<h2 id="main-changes-15">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation.</li>
<li><strong>HAL generic</strong>
@@ -1535,7 +1610,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section1" aria-hidden="true"> <label for="collapse-section1" aria-hidden="true"><strong>V1.0.0 / 15-December-2014</strong></label>
<div>
-<h2 id="main-changes-15">Main Changes</h2>
+<h2 id="main-changes-16">Main Changes</h2>
<ul>
<li>First Official release of <strong>STM32F1xx HAL Drivers</strong> for all STM32F1 devices.</li>
<li>This release is in line with <strong>STM32Cube Firmware specification Rev1.0</strong> document</li>
diff --git a/Src/stm32f1xx_hal.c b/Src/stm32f1xx_hal.c
index e66fc22..da80972 100644
--- a/Src/stm32f1xx_hal.c
+++ b/Src/stm32f1xx_hal.c
@@ -57,7 +57,7 @@
*/
#define __STM32F1xx_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */
#define __STM32F1xx_HAL_VERSION_SUB1 (0x01U) /*!< [23:16] sub1 version */
-#define __STM32F1xx_HAL_VERSION_SUB2 (0x09U) /*!< [15:8] sub2 version */
+#define __STM32F1xx_HAL_VERSION_SUB2 (0x0AU) /*!< [15:8] sub2 version */
#define __STM32F1xx_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */
#define __STM32F1xx_HAL_VERSION ((__STM32F1xx_HAL_VERSION_MAIN << 24)\
|(__STM32F1xx_HAL_VERSION_SUB1 << 16)\
diff --git a/Src/stm32f1xx_hal_cec.c b/Src/stm32f1xx_hal_cec.c
index c0a173d..e2c9ffd 100644
--- a/Src/stm32f1xx_hal_cec.c
+++ b/Src/stm32f1xx_hal_cec.c
@@ -924,7 +924,7 @@
hcec->TxXferCount--;
/* Write data to TX buffer*/
- hcec->Instance->TXD = (uint8_t)*hcec->pTxBuffPtr++;
+ hcec->Instance->TXD = (uint8_t) * hcec->pTxBuffPtr++;
/* If this is the last byte of the ongoing transmission */
if (hcec->TxXferCount == 0U)
diff --git a/Src/stm32f1xx_hal_dac.c b/Src/stm32f1xx_hal_dac.c
index c890cad..2e86c4a 100644
--- a/Src/stm32f1xx_hal_dac.c
+++ b/Src/stm32f1xx_hal_dac.c
@@ -959,10 +959,7 @@
uint32_t result;
/* Check the DAC peripheral handle */
- if (hdac == NULL)
- {
- return HAL_ERROR;
- }
+ assert_param(hdac != NULL);
/* Check the parameters */
assert_param(IS_DAC_CHANNEL(Channel));
diff --git a/Src/stm32f1xx_hal_dac_ex.c b/Src/stm32f1xx_hal_dac_ex.c
index 3c4fbb8..87a7184 100644
--- a/Src/stm32f1xx_hal_dac_ex.c
+++ b/Src/stm32f1xx_hal_dac_ex.c
@@ -387,7 +387,6 @@
}
-
/**
* @}
*/
diff --git a/Src/stm32f1xx_hal_flash.c b/Src/stm32f1xx_hal_flash.c
index 6f920ae..fe5e596 100644
--- a/Src/stm32f1xx_hal_flash.c
+++ b/Src/stm32f1xx_hal_flash.c
@@ -265,9 +265,6 @@
HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint64_t Data)
{
HAL_StatusTypeDef status = HAL_OK;
-
- /* Process Locked */
- __HAL_LOCK(&pFlash);
/* Check the parameters */
assert_param(IS_FLASH_TYPEPROGRAM(TypeProgram));
@@ -587,8 +584,6 @@
__HAL_FLASH_DISABLE_IT(FLASH_IT_EOP | FLASH_IT_ERR);
#endif /* FLASH_BANK2_END */
- /* Process Unlocked */
- __HAL_UNLOCK(&pFlash);
}
}
diff --git a/Src/stm32f1xx_hal_flash_ex.c b/Src/stm32f1xx_hal_flash_ex.c
index e6200c2..33ae03c 100644
--- a/Src/stm32f1xx_hal_flash_ex.c
+++ b/Src/stm32f1xx_hal_flash_ex.c
@@ -318,9 +318,6 @@
{
HAL_StatusTypeDef status = HAL_OK;
- /* Process Locked */
- __HAL_LOCK(&pFlash);
-
/* If procedure already ongoing, reject the next one */
if (pFlash.ProcedureOnGoing != FLASH_PROC_NONE)
{
diff --git a/Src/stm32f1xx_hal_hcd.c b/Src/stm32f1xx_hal_hcd.c
index d8f8f09..5e9d531 100644
--- a/Src/stm32f1xx_hal_hcd.c
+++ b/Src/stm32f1xx_hal_hcd.c
@@ -106,10 +106,6 @@
*/
HAL_StatusTypeDef HAL_HCD_Init(HCD_HandleTypeDef *hhcd)
{
-#if defined (USB_OTG_FS)
- const USB_OTG_GlobalTypeDef *USBx;
-#endif /* defined (USB_OTG_FS) */
-
/* Check the HCD handle allocation */
if (hhcd == NULL)
{
@@ -119,10 +115,6 @@
/* Check the parameters */
assert_param(IS_HCD_ALL_INSTANCE(hhcd->Instance));
-#if defined (USB_OTG_FS)
- USBx = hhcd->Instance;
-#endif /* defined (USB_OTG_FS) */
-
if (hhcd->State == HAL_HCD_STATE_RESET)
{
/* Allocate lock resource and initialize it */
@@ -151,13 +143,8 @@
hhcd->State = HAL_HCD_STATE_BUSY;
-#if defined (USB_OTG_FS)
/* Disable DMA mode for FS instance */
- if (USBx == USB_OTG_FS)
- {
- hhcd->Init.dma_enable = 0U;
- }
-#endif /* defined (USB_OTG_FS) */
+ hhcd->Init.dma_enable = 0U;
/* Disable the Interrupts */
__HAL_HCD_DISABLE(hhcd);
@@ -1230,7 +1217,7 @@
*/
static void HCD_HC_IN_IRQHandler(HCD_HandleTypeDef *hhcd, uint8_t chnum)
{
- USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
+ const USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t tmpreg;
@@ -1446,7 +1433,7 @@
*/
static void HCD_HC_OUT_IRQHandler(HCD_HandleTypeDef *hhcd, uint8_t chnum)
{
- USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
+ const USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t tmpreg;
uint32_t num_packets;
@@ -1587,7 +1574,7 @@
*/
static void HCD_RXQLVL_IRQHandler(HCD_HandleTypeDef *hhcd)
{
- USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
+ const USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t pktsts;
uint32_t pktcnt;
@@ -1653,7 +1640,7 @@
*/
static void HCD_Port_IRQHandler(HCD_HandleTypeDef *hhcd)
{
- USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
+ const USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
uint32_t USBx_BASE = (uint32_t)USBx;
__IO uint32_t hprt0;
__IO uint32_t hprt0_dup;
diff --git a/Src/stm32f1xx_hal_i2c.c b/Src/stm32f1xx_hal_i2c.c
index c12caad..645f249 100644
--- a/Src/stm32f1xx_hal_i2c.c
+++ b/Src/stm32f1xx_hal_i2c.c
@@ -5795,15 +5795,11 @@
/* Enable Acknowledge */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
}
- else if (CurrentXferOptions != I2C_LAST_FRAME_NO_STOP)
+ else
{
/* Generate Stop */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
}
- else
- {
- /* Do nothing */
- }
/* Read data from DR */
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
diff --git a/Src/stm32f1xx_hal_i2s.c b/Src/stm32f1xx_hal_i2s.c
index 0ae903e..019bcc8 100644
--- a/Src/stm32f1xx_hal_i2s.c
+++ b/Src/stm32f1xx_hal_i2s.c
@@ -777,15 +777,14 @@
return HAL_ERROR;
}
- /* Process Locked */
- __HAL_LOCK(hi2s);
-
if (hi2s->State != HAL_I2S_STATE_READY)
{
- __HAL_UNLOCK(hi2s);
return HAL_BUSY;
}
+ /* Process Locked */
+ __HAL_LOCK(hi2s);
+
/* Set state and reset error code */
hi2s->State = HAL_I2S_STATE_BUSY_TX;
hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
@@ -896,15 +895,14 @@
return HAL_ERROR;
}
- /* Process Locked */
- __HAL_LOCK(hi2s);
-
if (hi2s->State != HAL_I2S_STATE_READY)
{
- __HAL_UNLOCK(hi2s);
return HAL_BUSY;
}
+ /* Process Locked */
+ __HAL_LOCK(hi2s);
+
/* Set state and reset error code */
hi2s->State = HAL_I2S_STATE_BUSY_RX;
hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
@@ -994,15 +992,14 @@
return HAL_ERROR;
}
- /* Process Locked */
- __HAL_LOCK(hi2s);
-
if (hi2s->State != HAL_I2S_STATE_READY)
{
- __HAL_UNLOCK(hi2s);
return HAL_BUSY;
}
+ /* Process Locked */
+ __HAL_LOCK(hi2s);
+
/* Set state and reset error code */
hi2s->State = HAL_I2S_STATE_BUSY_TX;
hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
@@ -1021,6 +1018,8 @@
hi2s->TxXferCount = Size;
}
+ __HAL_UNLOCK(hi2s);
+
/* Enable TXE and ERR interrupt */
__HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
@@ -1031,7 +1030,6 @@
__HAL_I2S_ENABLE(hi2s);
}
- __HAL_UNLOCK(hi2s);
return HAL_OK;
}
@@ -1060,15 +1058,14 @@
return HAL_ERROR;
}
- /* Process Locked */
- __HAL_LOCK(hi2s);
-
if (hi2s->State != HAL_I2S_STATE_READY)
{
- __HAL_UNLOCK(hi2s);
return HAL_BUSY;
}
+ /* Process Locked */
+ __HAL_LOCK(hi2s);
+
/* Set state and reset error code */
hi2s->State = HAL_I2S_STATE_BUSY_RX;
hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
@@ -1087,6 +1084,8 @@
hi2s->RxXferCount = Size;
}
+ __HAL_UNLOCK(hi2s);
+
/* Enable RXNE and ERR interrupt */
__HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
@@ -1097,7 +1096,6 @@
__HAL_I2S_ENABLE(hi2s);
}
- __HAL_UNLOCK(hi2s);
return HAL_OK;
}
@@ -1124,15 +1122,14 @@
return HAL_ERROR;
}
- /* Process Locked */
- __HAL_LOCK(hi2s);
-
if (hi2s->State != HAL_I2S_STATE_READY)
{
- __HAL_UNLOCK(hi2s);
return HAL_BUSY;
}
+ /* Process Locked */
+ __HAL_LOCK(hi2s);
+
/* Set state and reset error code */
hi2s->State = HAL_I2S_STATE_BUSY_TX;
hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
@@ -1174,12 +1171,7 @@
return HAL_ERROR;
}
- /* Check if the I2S is already enabled */
- if (HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
- {
- /* Enable I2S peripheral */
- __HAL_I2S_ENABLE(hi2s);
- }
+ __HAL_UNLOCK(hi2s);
/* Check if the I2S Tx request is already enabled */
if (HAL_IS_BIT_CLR(hi2s->Instance->CR2, SPI_CR2_TXDMAEN))
@@ -1188,7 +1180,13 @@
SET_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
}
- __HAL_UNLOCK(hi2s);
+ /* Check if the I2S is already enabled */
+ if (HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
+ {
+ /* Enable I2S peripheral */
+ __HAL_I2S_ENABLE(hi2s);
+ }
+
return HAL_OK;
}
@@ -1215,15 +1213,14 @@
return HAL_ERROR;
}
- /* Process Locked */
- __HAL_LOCK(hi2s);
-
if (hi2s->State != HAL_I2S_STATE_READY)
{
- __HAL_UNLOCK(hi2s);
return HAL_BUSY;
}
+ /* Process Locked */
+ __HAL_LOCK(hi2s);
+
/* Set state and reset error code */
hi2s->State = HAL_I2S_STATE_BUSY_RX;
hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
@@ -1271,12 +1268,7 @@
return HAL_ERROR;
}
- /* Check if the I2S is already enabled */
- if (HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
- {
- /* Enable I2S peripheral */
- __HAL_I2S_ENABLE(hi2s);
- }
+ __HAL_UNLOCK(hi2s);
/* Check if the I2S Rx request is already enabled */
if (HAL_IS_BIT_CLR(hi2s->Instance->CR2, SPI_CR2_RXDMAEN))
@@ -1285,7 +1277,13 @@
SET_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
}
- __HAL_UNLOCK(hi2s);
+ /* Check if the I2S is already enabled */
+ if (HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
+ {
+ /* Enable I2S peripheral */
+ __HAL_I2S_ENABLE(hi2s);
+ }
+
return HAL_OK;
}
diff --git a/Src/stm32f1xx_hal_iwdg.c b/Src/stm32f1xx_hal_iwdg.c
index c65b792..1d61feb 100644
--- a/Src/stm32f1xx_hal_iwdg.c
+++ b/Src/stm32f1xx_hal_iwdg.c
@@ -120,7 +120,8 @@
The timeout value is multiplied by 1000 to be converted in milliseconds.
LSI startup time is also considered here by adding LSI_STARTUP_TIME
converted in milliseconds. */
-#define HAL_IWDG_DEFAULT_TIMEOUT (((6UL * 256UL * 1000UL) / LSI_VALUE) + ((LSI_STARTUP_TIME / 1000UL) + 1UL))
+#define HAL_IWDG_DEFAULT_TIMEOUT (((6UL * 256UL * 1000UL) / (LSI_VALUE / 128U)) + \
+ ((LSI_STARTUP_TIME / 1000UL) + 1UL))
#define IWDG_KERNEL_UPDATE_FLAGS (IWDG_SR_RVU | IWDG_SR_PVU)
/**
* @}
diff --git a/Src/stm32f1xx_hal_mmc.c b/Src/stm32f1xx_hal_mmc.c
index e394706..e7b7df2 100644
--- a/Src/stm32f1xx_hal_mmc.c
+++ b/Src/stm32f1xx_hal_mmc.c
@@ -2328,7 +2328,7 @@
if(errorstate != HAL_MMC_ERROR_NONE)
{
/* Clear all the static flags */
- __HAL_MMC_CLEAR_FLAG(hmmc, SDMMC_STATIC_FLAGS);
+ __HAL_MMC_CLEAR_FLAG(hmmc, SDIO_STATIC_FLAGS);
hmmc->ErrorCode |= errorstate;
return HAL_ERROR;
}
diff --git a/Src/stm32f1xx_hal_nand.c b/Src/stm32f1xx_hal_nand.c
index 184912f..c536e21 100644
--- a/Src/stm32f1xx_hal_nand.c
+++ b/Src/stm32f1xx_hal_nand.c
@@ -507,7 +507,7 @@
* @param pDeviceConfig pointer to NAND_DeviceConfigTypeDef structure
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_NAND_ConfigDevice(NAND_HandleTypeDef *hnand, NAND_DeviceConfigTypeDef *pDeviceConfig)
+HAL_StatusTypeDef HAL_NAND_ConfigDevice(NAND_HandleTypeDef *hnand, const NAND_DeviceConfigTypeDef *pDeviceConfig)
{
hnand->Config.PageSize = pDeviceConfig->PageSize;
hnand->Config.SpareAreaSize = pDeviceConfig->SpareAreaSize;
diff --git a/Src/stm32f1xx_hal_pccard.c b/Src/stm32f1xx_hal_pccard.c
index ec246b4..49e9b59 100644
--- a/Src/stm32f1xx_hal_pccard.c
+++ b/Src/stm32f1xx_hal_pccard.c
@@ -163,7 +163,8 @@
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCCARD_Init(PCCARD_HandleTypeDef *hpccard, FSMC_NAND_PCC_TimingTypeDef *ComSpaceTiming,
- FSMC_NAND_PCC_TimingTypeDef *AttSpaceTiming, FSMC_NAND_PCC_TimingTypeDef *IOSpaceTiming)
+ FSMC_NAND_PCC_TimingTypeDef *AttSpaceTiming,
+ FSMC_NAND_PCC_TimingTypeDef *IOSpaceTiming)
{
/* Check the PCCARD controller state */
if (hpccard == NULL)
@@ -187,7 +188,7 @@
#else
/* Initialize the low level hardware (MSP) */
HAL_PCCARD_MspInit(hpccard);
-#endif
+#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */
}
/* Initialize the PCCARD state */
@@ -234,7 +235,7 @@
#else
/* De-Initialize the low level hardware (MSP) */
HAL_PCCARD_MspDeInit(hpccard);
-#endif
+#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */
/* Configure the PCCARD registers with their reset values */
FSMC_PCCARD_DeInit(hpccard->Instance);
@@ -307,8 +308,9 @@
*/
HAL_StatusTypeDef HAL_PCCARD_Read_ID(PCCARD_HandleTypeDef *hpccard, uint8_t CompactFlash_ID[], uint8_t *pStatus)
{
- uint32_t timeout = PCCARD_TIMEOUT_READ_ID, index = 0U;
- uint8_t status = 0;
+ uint32_t timeout = 0U;
+ uint32_t index = 0U;
+ uint8_t status = 0U;
/* Process Locked */
__HAL_LOCK(hpccard);
@@ -371,8 +373,9 @@
HAL_StatusTypeDef HAL_PCCARD_Read_Sector(PCCARD_HandleTypeDef *hpccard, uint16_t *pBuffer, uint16_t SectorAddress,
uint8_t *pStatus)
{
- uint32_t timeout = PCCARD_TIMEOUT_READ_WRITE_SECTOR, index = 0U;
- uint8_t status = 0;
+ uint32_t timeout = 0U;
+ uint32_t index = 0U;
+ uint8_t status = 0U;
/* Process Locked */
__HAL_LOCK(hpccard);
@@ -448,8 +451,9 @@
HAL_StatusTypeDef HAL_PCCARD_Write_Sector(PCCARD_HandleTypeDef *hpccard, uint16_t *pBuffer, uint16_t SectorAddress,
uint8_t *pStatus)
{
- uint32_t timeout = PCCARD_TIMEOUT_READ_WRITE_SECTOR, index = 0U;
- uint8_t status = 0;
+ uint32_t timeout = 0U;
+ uint32_t index = 0U;
+ uint8_t status = 0U;
/* Process Locked */
__HAL_LOCK(hpccard);
@@ -522,7 +526,7 @@
HAL_StatusTypeDef HAL_PCCARD_Erase_Sector(PCCARD_HandleTypeDef *hpccard, uint16_t SectorAddress, uint8_t *pStatus)
{
uint32_t timeout = PCCARD_TIMEOUT_ERASE_SECTOR;
- uint8_t status = 0;
+ uint8_t status = 0U;
/* Process Locked */
__HAL_LOCK(hpccard);
@@ -624,7 +628,7 @@
hpccard->ItCallback(hpccard);
#else
HAL_PCCARD_ITCallback(hpccard);
-#endif
+#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */
/* Clear PCCARD interrupt Rising edge pending bit */
__FSMC_PCCARD_CLEAR_FLAG(hpccard->Instance, FSMC_FLAG_RISING_EDGE);
@@ -638,7 +642,7 @@
hpccard->ItCallback(hpccard);
#else
HAL_PCCARD_ITCallback(hpccard);
-#endif
+#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */
/* Clear PCCARD interrupt Level pending bit */
__FSMC_PCCARD_CLEAR_FLAG(hpccard->Instance, FSMC_FLAG_LEVEL);
@@ -652,7 +656,7 @@
hpccard->ItCallback(hpccard);
#else
HAL_PCCARD_ITCallback(hpccard);
-#endif
+#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */
/* Clear PCCARD interrupt Falling edge pending bit */
__FSMC_PCCARD_CLEAR_FLAG(hpccard->Instance, FSMC_FLAG_FALLING_EDGE);
@@ -666,7 +670,7 @@
hpccard->ItCallback(hpccard);
#else
HAL_PCCARD_ITCallback(hpccard);
-#endif
+#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */
/* Clear PCCARD interrupt FIFO empty pending bit */
__FSMC_PCCARD_CLEAR_FLAG(hpccard->Instance, FSMC_FLAG_FEMPT);
@@ -823,7 +827,7 @@
__HAL_UNLOCK(hpccard);
return status;
}
-#endif
+#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */
/**
* @}
@@ -866,7 +870,8 @@
*/
HAL_PCCARD_StatusTypeDef HAL_PCCARD_GetStatus(PCCARD_HandleTypeDef *hpccard)
{
- uint32_t timeout = PCCARD_TIMEOUT_STATUS, status_pccard = 0U;
+ uint32_t timeout = PCCARD_TIMEOUT_STATUS;
+ uint32_t status_pccard = 0U;
/* Check the PCCARD controller state */
if (hpccard->State == HAL_PCCARD_STATE_BUSY)
@@ -902,7 +907,8 @@
*/
HAL_PCCARD_StatusTypeDef HAL_PCCARD_ReadStatus(PCCARD_HandleTypeDef *hpccard)
{
- uint8_t data = 0U, status_pccard = PCCARD_BUSY;
+ uint8_t data = 0U;
+ uint8_t status_pccard = PCCARD_BUSY;
/* Check the PCCARD controller state */
if (hpccard->State == HAL_PCCARD_STATE_BUSY)
diff --git a/Src/stm32f1xx_hal_pcd.c b/Src/stm32f1xx_hal_pcd.c
index 809f339..6a89738 100644
--- a/Src/stm32f1xx_hal_pcd.c
+++ b/Src/stm32f1xx_hal_pcd.c
@@ -130,9 +130,6 @@
*/
HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
{
-#if defined (USB_OTG_FS)
- USB_OTG_GlobalTypeDef *USBx;
-#endif /* defined (USB_OTG_FS) */
uint8_t i;
/* Check the PCD handle allocation */
@@ -144,10 +141,6 @@
/* Check the parameters */
assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance));
-#if defined (USB_OTG_FS)
- USBx = hpcd->Instance;
-#endif /* defined (USB_OTG_FS) */
-
if (hpcd->State == HAL_PCD_STATE_RESET)
{
/* Allocate lock resource and initialize it */
@@ -181,13 +174,8 @@
hpcd->State = HAL_PCD_STATE_BUSY;
-#if defined (USB_OTG_FS)
/* Disable DMA mode for FS instance */
- if (USBx == USB_OTG_FS)
- {
- hpcd->Init.dma_enable = 0U;
- }
-#endif /* defined (USB_OTG_FS) */
+ hpcd->Init.dma_enable = 0U;
/* Disable the Interrupts */
__HAL_PCD_DISABLE(hpcd);
@@ -2119,9 +2107,9 @@
*/
static HAL_StatusTypeDef PCD_EP_OutXfrComplete_int(PCD_HandleTypeDef *hpcd, uint32_t epnum)
{
- USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
+ const USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
uint32_t USBx_BASE = (uint32_t)USBx;
- uint32_t gSNPSiD = *(__IO uint32_t *)(&USBx->CID + 0x1U);
+ uint32_t gSNPSiD = *(__IO const uint32_t *)(&USBx->CID + 0x1U);
uint32_t DoepintReg = USBx_OUTEP(epnum)->DOEPINT;
if (gSNPSiD == USB_OTG_CORE_ID_310A)
@@ -2166,9 +2154,9 @@
*/
static HAL_StatusTypeDef PCD_EP_OutSetupPacket_int(PCD_HandleTypeDef *hpcd, uint32_t epnum)
{
- USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
+ const USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
uint32_t USBx_BASE = (uint32_t)USBx;
- uint32_t gSNPSiD = *(__IO uint32_t *)(&USBx->CID + 0x1U);
+ uint32_t gSNPSiD = *(__IO const uint32_t *)(&USBx->CID + 0x1U);
uint32_t DoepintReg = USBx_OUTEP(epnum)->DOEPINT;
if ((gSNPSiD > USB_OTG_CORE_ID_300A) &&
@@ -2298,6 +2286,7 @@
if (((wEPVal & USB_EP_SETUP) == 0U) && ((wEPVal & USB_EP_RX_STRX) != USB_EP_RX_VALID))
{
+ PCD_SET_EP_RX_CNT(hpcd->Instance, PCD_ENDP0, ep->maxpacket);
PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID);
}
}
@@ -2418,7 +2407,7 @@
/* Manage Single Buffer Transaction */
if ((wEPVal & USB_EP_KIND) == 0U)
{
- /* Multi-packet on the NON control IN endpoint */
+ /* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
if (ep->xfer_len > TxPctSize)
@@ -2494,7 +2483,7 @@
if (ep->xfer_len == 0U)
{
- /* Set NAK to OUT endpoint since double buffer is enabled */
+ /* set NAK to OUT endpoint since double buffer is enabled */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
}
@@ -2526,11 +2515,11 @@
if (ep->xfer_len == 0U)
{
- /* Set NAK on the current endpoint */
+ /* set NAK on the current endpoint */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
}
- /* Need to FreeUser Buffer */
+ /*Need to FreeUser Buffer*/
if ((wEPVal & USB_EP_DTOG_TX) == 0U)
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
@@ -2580,12 +2569,6 @@
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
- if (ep->type == EP_TYPE_BULK)
- {
- /* Set Bulk endpoint in NAK state */
- PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_NAK);
- }
-
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
@@ -2597,12 +2580,10 @@
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
}
-
- return HAL_OK;
}
else /* Transfer is not yet Done */
{
- /* Need to Free USB Buffer */
+ /* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
@@ -2633,7 +2614,7 @@
}
/* Write remaining Data to Buffer */
- /* Set the Double buffer counter for pma buffer0 */
+ /* Set the Double buffer counter for pma buffer1 */
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, len);
/* Copy user buffer to USB PMA */
@@ -2661,12 +2642,6 @@
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
- if (ep->type == EP_TYPE_BULK)
- {
- /* Set Bulk endpoint in NAK state */
- PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_NAK);
- }
-
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
@@ -2679,12 +2654,10 @@
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
}
-
- return HAL_OK;
}
else /* Transfer is not yet Done */
{
- /* Need to Free USB Buffer */
+ /* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
@@ -2714,7 +2687,7 @@
ep->xfer_fill_db = 0;
}
- /* Set the Double buffer counter for pma buffer1 */
+ /* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, len);
/* Copy the user buffer to USB PMA */
@@ -2723,7 +2696,7 @@
}
}
- /* Enable endpoint IN */
+ /*enable endpoint IN*/
PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_VALID);
return HAL_OK;
diff --git a/Src/stm32f1xx_hal_sd.c b/Src/stm32f1xx_hal_sd.c
index c2a9e7c..4b3d335 100644
--- a/Src/stm32f1xx_hal_sd.c
+++ b/Src/stm32f1xx_hal_sd.c
@@ -403,7 +403,6 @@
HAL_StatusTypeDef HAL_SD_InitCard(SD_HandleTypeDef *hsd)
{
uint32_t errorstate;
- HAL_StatusTypeDef status;
SD_InitTypeDef Init;
/* Default SDIO peripheral configuration for SD card initialization */
@@ -415,11 +414,7 @@
Init.ClockDiv = SDIO_INIT_CLK_DIV;
/* Initialize SDIO peripheral interface with default configuration */
- status = SDIO_Init(hsd->Instance, Init);
- if(status != HAL_OK)
- {
- return HAL_ERROR;
- }
+ SDIO_Init(hsd->Instance, Init);
/* Disable SDIO Clock */
__HAL_SD_DISABLE(hsd);
@@ -2864,7 +2859,7 @@
}
}
- if((HAL_GetTick() - tickstart) >= SDMMC_DATATIMEOUT)
+ if((HAL_GetTick() - tickstart) >= SDMMC_SWDATATIMEOUT)
{
return HAL_SD_ERROR_TIMEOUT;
}
@@ -2892,7 +2887,7 @@
*pData = SDIO_ReadFIFO(hsd->Instance);
pData++;
- if((HAL_GetTick() - tickstart) >= SDMMC_DATATIMEOUT)
+ if((HAL_GetTick() - tickstart) >= SDMMC_SWDATATIMEOUT)
{
return HAL_SD_ERROR_TIMEOUT;
}
@@ -3084,7 +3079,7 @@
break;
}
- if((HAL_GetTick() - tickstart) >= SDMMC_DATATIMEOUT)
+ if((HAL_GetTick() - tickstart) >= SDMMC_SWDATATIMEOUT)
{
return HAL_SD_ERROR_TIMEOUT;
}
diff --git a/Src/stm32f1xx_hal_spi.c b/Src/stm32f1xx_hal_spi.c
index 71b05a9..16c9c93 100644
--- a/Src/stm32f1xx_hal_spi.c
+++ b/Src/stm32f1xx_hal_spi.c
@@ -44,7 +44,8 @@
(+++) Configure the DMA handle parameters
(+++) Configure the DMA Tx or Rx Stream/Channel
(+++) Associate the initialized hdma_tx(or _rx) handle to the hspi DMA Tx or Rx handle
- (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx or Rx Stream/Channel
+ (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx
+ or Rx Stream/Channel
(#) Program the Mode, BidirectionalMode , Data size, Baudrate Prescaler, NSS
management, Clock polarity and phase, FirstBit and CRC configuration in the hspi Init structure.
@@ -190,7 +191,8 @@
@note The max SPI frequency depend on SPI data size (8bits, 16bits),
SPI mode(2 Lines fullduplex, 2 lines RxOnly, 1 line TX/RX) and Process mode (Polling, IT, DMA).
@note
- (#) TX/RX processes are HAL_SPI_TransmitReceive(), HAL_SPI_TransmitReceive_IT() and HAL_SPI_TransmitReceive_DMA()
+ (#) TX/RX processes are HAL_SPI_TransmitReceive(), HAL_SPI_TransmitReceive_IT() and
+ HAL_SPI_TransmitReceive_DMA()
(#) RX processes are HAL_SPI_Receive(), HAL_SPI_Receive_IT() and HAL_SPI_Receive_DMA()
(#) TX processes are HAL_SPI_Transmit(), HAL_SPI_Transmit_IT() and HAL_SPI_Transmit_DMA()
@@ -790,38 +792,35 @@
* @param Timeout Timeout duration
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
+HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size, uint32_t Timeout)
{
uint32_t tickstart;
- HAL_StatusTypeDef errorcode = HAL_OK;
uint16_t initial_TxXferCount;
/* Check Direction parameter */
assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
- /* Process Locked */
- __HAL_LOCK(hspi);
-
/* Init tickstart for timeout management*/
tickstart = HAL_GetTick();
initial_TxXferCount = Size;
if (hspi->State != HAL_SPI_STATE_READY)
{
- errorcode = HAL_BUSY;
- goto error;
+ return HAL_BUSY;
}
if ((pData == NULL) || (Size == 0U))
{
- errorcode = HAL_ERROR;
- goto error;
+ return HAL_ERROR;
}
+ /* Process Locked */
+ __HAL_LOCK(hspi);
+
/* Set the transaction information */
hspi->State = HAL_SPI_STATE_BUSY_TX;
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
- hspi->pTxBuffPtr = (uint8_t *)pData;
+ hspi->pTxBuffPtr = (const uint8_t *)pData;
hspi->TxXferSize = Size;
hspi->TxXferCount = Size;
@@ -860,7 +859,7 @@
{
if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
{
- hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
+ hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr);
hspi->pTxBuffPtr += sizeof(uint16_t);
hspi->TxXferCount--;
}
@@ -870,7 +869,7 @@
/* Wait until TXE flag is set to send data */
if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE))
{
- hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
+ hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr);
hspi->pTxBuffPtr += sizeof(uint16_t);
hspi->TxXferCount--;
}
@@ -879,9 +878,9 @@
/* Timeout management */
if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U))
{
- errorcode = HAL_TIMEOUT;
hspi->State = HAL_SPI_STATE_READY;
- goto error;
+ __HAL_UNLOCK(hspi);
+ return HAL_TIMEOUT;
}
}
}
@@ -891,7 +890,7 @@
{
if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
{
- *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr);
+ *((__IO uint8_t *)&hspi->Instance->DR) = *((const uint8_t *)hspi->pTxBuffPtr);
hspi->pTxBuffPtr += sizeof(uint8_t);
hspi->TxXferCount--;
}
@@ -900,7 +899,7 @@
/* Wait until TXE flag is set to send data */
if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE))
{
- *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr);
+ *((__IO uint8_t *)&hspi->Instance->DR) = *((const uint8_t *)hspi->pTxBuffPtr);
hspi->pTxBuffPtr += sizeof(uint8_t);
hspi->TxXferCount--;
}
@@ -909,9 +908,9 @@
/* Timeout management */
if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U))
{
- errorcode = HAL_TIMEOUT;
hspi->State = HAL_SPI_STATE_READY;
- goto error;
+ __HAL_UNLOCK(hspi);
+ return HAL_TIMEOUT;
}
}
}
@@ -936,19 +935,18 @@
__HAL_SPI_CLEAR_OVRFLAG(hspi);
}
+ hspi->State = HAL_SPI_STATE_READY;
+ /* Process Unlocked */
+ __HAL_UNLOCK(hspi);
+
if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
{
- errorcode = HAL_ERROR;
+ return HAL_ERROR;
}
else
{
- hspi->State = HAL_SPI_STATE_READY;
+ return HAL_OK;
}
-
-error:
- /* Process Unlocked */
- __HAL_UNLOCK(hspi);
- return errorcode;
}
/**
@@ -966,12 +964,10 @@
__IO uint32_t tmpreg = 0U;
#endif /* USE_SPI_CRC */
uint32_t tickstart;
- HAL_StatusTypeDef errorcode = HAL_OK;
if (hspi->State != HAL_SPI_STATE_READY)
{
- errorcode = HAL_BUSY;
- goto error;
+ return HAL_BUSY;
}
if ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES))
@@ -981,18 +977,17 @@
return HAL_SPI_TransmitReceive(hspi, pData, pData, Size, Timeout);
}
- /* Process Locked */
- __HAL_LOCK(hspi);
-
/* Init tickstart for timeout management*/
tickstart = HAL_GetTick();
if ((pData == NULL) || (Size == 0U))
{
- errorcode = HAL_ERROR;
- goto error;
+ return HAL_ERROR;
}
+ /* Process Locked */
+ __HAL_LOCK(hspi);
+
/* Set the transaction information */
hspi->State = HAL_SPI_STATE_BUSY_RX;
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
@@ -1051,9 +1046,9 @@
/* Timeout management */
if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U))
{
- errorcode = HAL_TIMEOUT;
hspi->State = HAL_SPI_STATE_READY;
- goto error;
+ __HAL_UNLOCK(hspi);
+ return HAL_TIMEOUT;
}
}
}
@@ -1075,9 +1070,9 @@
/* Timeout management */
if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U))
{
- errorcode = HAL_TIMEOUT;
hspi->State = HAL_SPI_STATE_READY;
- goto error;
+ __HAL_UNLOCK(hspi);
+ return HAL_TIMEOUT;
}
}
}
@@ -1100,8 +1095,8 @@
if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK)
{
/* the latest data has not been received */
- errorcode = HAL_TIMEOUT;
- goto error;
+ __HAL_UNLOCK(hspi);
+ return HAL_TIMEOUT;
}
/* Receive last data in 16 Bit mode */
@@ -1119,8 +1114,9 @@
if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK)
{
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
- errorcode = HAL_TIMEOUT;
- goto error;
+ hspi->State = HAL_SPI_STATE_READY;
+ __HAL_UNLOCK(hspi);
+ return HAL_TIMEOUT;
}
/* Read CRC to Flush DR and RXNE flag */
@@ -1155,18 +1151,17 @@
}
#endif /* USE_SPI_CRC */
+ hspi->State = HAL_SPI_STATE_READY;
+ /* Unlock the process */
+ __HAL_UNLOCK(hspi);
if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
{
- errorcode = HAL_ERROR;
+ return HAL_ERROR;
}
else
{
- hspi->State = HAL_SPI_STATE_READY;
+ return HAL_OK;
}
-
-error :
- __HAL_UNLOCK(hspi);
- return errorcode;
}
/**
@@ -1179,8 +1174,8 @@
* @param Timeout Timeout duration
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size,
- uint32_t Timeout)
+HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData,
+ uint16_t Size, uint32_t Timeout)
{
uint16_t initial_TxXferCount;
uint32_t tmp_mode;
@@ -1192,14 +1187,10 @@
/* Variable used to alternate Rx and Tx during transfer */
uint32_t txallowed = 1U;
- HAL_StatusTypeDef errorcode = HAL_OK;
/* Check Direction parameter */
assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
- /* Process Locked */
- __HAL_LOCK(hspi);
-
/* Init tickstart for timeout management*/
tickstart = HAL_GetTick();
@@ -1209,18 +1200,20 @@
initial_TxXferCount = Size;
if (!((tmp_state == HAL_SPI_STATE_READY) || \
- ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX))))
+ ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) &&
+ (tmp_state == HAL_SPI_STATE_BUSY_RX))))
{
- errorcode = HAL_BUSY;
- goto error;
+ return HAL_BUSY;
}
if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
{
- errorcode = HAL_ERROR;
- goto error;
+ return HAL_ERROR;
}
+ /* Process Locked */
+ __HAL_LOCK(hspi);
+
/* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
if (hspi->State != HAL_SPI_STATE_BUSY_RX)
{
@@ -1232,7 +1225,7 @@
hspi->pRxBuffPtr = (uint8_t *)pRxData;
hspi->RxXferCount = Size;
hspi->RxXferSize = Size;
- hspi->pTxBuffPtr = (uint8_t *)pTxData;
+ hspi->pTxBuffPtr = (const uint8_t *)pTxData;
hspi->TxXferCount = Size;
hspi->TxXferSize = Size;
@@ -1260,7 +1253,7 @@
{
if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
{
- hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
+ hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr);
hspi->pTxBuffPtr += sizeof(uint16_t);
hspi->TxXferCount--;
@@ -1278,7 +1271,7 @@
/* Check TXE flag */
if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U))
{
- hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
+ hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr);
hspi->pTxBuffPtr += sizeof(uint16_t);
hspi->TxXferCount--;
/* Next Data is a reception (Rx). Tx not allowed */
@@ -1304,9 +1297,9 @@
}
if (((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY))
{
- errorcode = HAL_TIMEOUT;
hspi->State = HAL_SPI_STATE_READY;
- goto error;
+ __HAL_UNLOCK(hspi);
+ return HAL_TIMEOUT;
}
}
}
@@ -1315,7 +1308,7 @@
{
if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
{
- *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr);
+ *((__IO uint8_t *)&hspi->Instance->DR) = *((const uint8_t *)hspi->pTxBuffPtr);
hspi->pTxBuffPtr += sizeof(uint8_t);
hspi->TxXferCount--;
@@ -1332,7 +1325,7 @@
/* Check TXE flag */
if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U))
{
- *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr);
+ *(__IO uint8_t *)&hspi->Instance->DR = *((const uint8_t *)hspi->pTxBuffPtr);
hspi->pTxBuffPtr++;
hspi->TxXferCount--;
/* Next Data is a reception (Rx). Tx not allowed */
@@ -1358,9 +1351,9 @@
}
if ((((HAL_GetTick() - tickstart) >= Timeout) && ((Timeout != HAL_MAX_DELAY))) || (Timeout == 0U))
{
- errorcode = HAL_TIMEOUT;
hspi->State = HAL_SPI_STATE_READY;
- goto error;
+ __HAL_UNLOCK(hspi);
+ return HAL_TIMEOUT;
}
}
}
@@ -1374,8 +1367,9 @@
{
/* Error on the CRC reception */
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
- errorcode = HAL_TIMEOUT;
- goto error;
+ hspi->State = HAL_SPI_STATE_READY;
+ __HAL_UNLOCK(hspi);
+ return HAL_TIMEOUT;
}
/* Read CRC */
tmpreg = READ_REG(hspi->Instance->DR);
@@ -1393,8 +1387,8 @@
/* Reset CRC Calculation */
SPI_RESET_CRC(hspi);
-
- errorcode = HAL_ERROR;
+ __HAL_UNLOCK(hspi);
+ return HAL_ERROR;
}
else
{
@@ -1406,9 +1400,9 @@
/* Check the end of the transaction */
if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK)
{
- errorcode = HAL_ERROR;
hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
- goto error;
+ __HAL_UNLOCK(hspi);
+ return HAL_ERROR;
}
/* Clear overrun flag in 2 Lines communication mode because received is not read */
@@ -1417,18 +1411,19 @@
__HAL_SPI_CLEAR_OVRFLAG(hspi);
}
+
+ hspi->State = HAL_SPI_STATE_READY;
+ /* Unlock the process */
+ __HAL_UNLOCK(hspi);
+
if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
{
- errorcode = HAL_ERROR;
+ return HAL_ERROR;
}
else
{
- hspi->State = HAL_SPI_STATE_READY;
+ return HAL_OK;
}
-
-error :
- __HAL_UNLOCK(hspi);
- return errorcode;
}
/**
@@ -1439,9 +1434,8 @@
* @param Size amount of data to be sent
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
+HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size)
{
- HAL_StatusTypeDef errorcode = HAL_OK;
/* Check Direction parameter */
assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
@@ -1449,14 +1443,12 @@
if ((pData == NULL) || (Size == 0U))
{
- errorcode = HAL_ERROR;
- goto error;
+ return HAL_ERROR;
}
if (hspi->State != HAL_SPI_STATE_READY)
{
- errorcode = HAL_BUSY;
- goto error;
+ return HAL_BUSY;
}
/* Process Locked */
@@ -1465,7 +1457,7 @@
/* Set the transaction information */
hspi->State = HAL_SPI_STATE_BUSY_TX;
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
- hspi->pTxBuffPtr = (uint8_t *)pData;
+ hspi->pTxBuffPtr = (const uint8_t *)pData;
hspi->TxXferSize = Size;
hspi->TxXferCount = Size;
@@ -1513,8 +1505,7 @@
/* Enable TXE and ERR interrupt */
__HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR));
-error :
- return errorcode;
+ return HAL_OK;
}
/**
@@ -1527,13 +1518,10 @@
*/
HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
{
- HAL_StatusTypeDef errorcode = HAL_OK;
-
if (hspi->State != HAL_SPI_STATE_READY)
{
- errorcode = HAL_BUSY;
- goto error;
+ return HAL_BUSY;
}
if ((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER))
@@ -1546,8 +1534,7 @@
if ((pData == NULL) || (Size == 0U))
{
- errorcode = HAL_ERROR;
- goto error;
+ return HAL_ERROR;
}
/* Process Locked */
@@ -1608,8 +1595,7 @@
/* Enable RXNE and ERR interrupt */
__HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
-error :
- return errorcode;
+ return HAL_OK;
}
/**
@@ -1621,11 +1607,11 @@
* @param Size amount of data to be sent and received
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
+HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData,
+ uint16_t Size)
{
uint32_t tmp_mode;
HAL_SPI_StateTypeDef tmp_state;
- HAL_StatusTypeDef errorcode = HAL_OK;
/* Check Direction parameter */
assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
@@ -1635,16 +1621,15 @@
tmp_mode = hspi->Init.Mode;
if (!((tmp_state == HAL_SPI_STATE_READY) || \
- ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX))))
+ ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) &&
+ (tmp_state == HAL_SPI_STATE_BUSY_RX))))
{
- errorcode = HAL_BUSY;
- goto error;
+ return HAL_BUSY;
}
if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
{
- errorcode = HAL_ERROR;
- goto error;
+ return HAL_ERROR;
}
/* Process locked */
@@ -1658,7 +1643,7 @@
/* Set the transaction information */
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
- hspi->pTxBuffPtr = (uint8_t *)pTxData;
+ hspi->pTxBuffPtr = (const uint8_t *)pTxData;
hspi->TxXferSize = Size;
hspi->TxXferCount = Size;
hspi->pRxBuffPtr = (uint8_t *)pRxData;
@@ -1698,8 +1683,7 @@
/* Enable TXE, RXNE and ERR interrupt */
__HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
-error :
- return errorcode;
+ return HAL_OK;
}
/**
@@ -1710,9 +1694,8 @@
* @param Size amount of data to be sent
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
+HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size)
{
- HAL_StatusTypeDef errorcode = HAL_OK;
/* Check tx dma handle */
assert_param(IS_SPI_DMA_HANDLE(hspi->hdmatx));
@@ -1720,25 +1703,23 @@
/* Check Direction parameter */
assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
- /* Process Locked */
- __HAL_LOCK(hspi);
-
if (hspi->State != HAL_SPI_STATE_READY)
{
- errorcode = HAL_BUSY;
- goto error;
+ return HAL_BUSY;
}
if ((pData == NULL) || (Size == 0U))
{
- errorcode = HAL_ERROR;
- goto error;
+ return HAL_ERROR;
}
+ /* Process Locked */
+ __HAL_LOCK(hspi);
+
/* Set the transaction information */
hspi->State = HAL_SPI_STATE_BUSY_TX;
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
- hspi->pTxBuffPtr = (uint8_t *)pData;
+ hspi->pTxBuffPtr = (const uint8_t *)pData;
hspi->TxXferSize = Size;
hspi->TxXferCount = Size;
@@ -1783,9 +1764,9 @@
{
/* Update SPI error code */
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
- errorcode = HAL_ERROR;
-
- goto error;
+ /* Process Unlocked */
+ __HAL_UNLOCK(hspi);
+ return HAL_ERROR;
}
/* Check if the SPI is already enabled */
@@ -1795,16 +1776,16 @@
__HAL_SPI_ENABLE(hspi);
}
+ /* Process Unlocked */
+ __HAL_UNLOCK(hspi);
+
/* Enable the SPI Error Interrupt Bit */
__HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR));
/* Enable Tx DMA Request */
SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
-error :
- /* Process Unlocked */
- __HAL_UNLOCK(hspi);
- return errorcode;
+ return HAL_OK;
}
/**
@@ -1819,15 +1800,12 @@
*/
HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
{
- HAL_StatusTypeDef errorcode = HAL_OK;
-
/* Check rx dma handle */
assert_param(IS_SPI_DMA_HANDLE(hspi->hdmarx));
if (hspi->State != HAL_SPI_STATE_READY)
{
- errorcode = HAL_BUSY;
- goto error;
+ return HAL_BUSY;
}
if ((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER))
@@ -1841,15 +1819,14 @@
return HAL_SPI_TransmitReceive_DMA(hspi, pData, pData, Size);
}
- /* Process Locked */
- __HAL_LOCK(hspi);
-
if ((pData == NULL) || (Size == 0U))
{
- errorcode = HAL_ERROR;
- goto error;
+ return HAL_ERROR;
}
+ /* Process Locked */
+ __HAL_LOCK(hspi);
+
/* Set the transaction information */
hspi->State = HAL_SPI_STATE_BUSY_RX;
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
@@ -1897,9 +1874,9 @@
{
/* Update SPI error code */
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
- errorcode = HAL_ERROR;
-
- goto error;
+ /* Process Unlocked */
+ __HAL_UNLOCK(hspi);
+ return HAL_ERROR;
}
/* Check if the SPI is already enabled */
@@ -1909,16 +1886,16 @@
__HAL_SPI_ENABLE(hspi);
}
+ /* Process Unlocked */
+ __HAL_UNLOCK(hspi);
+
/* Enable the SPI Error Interrupt Bit */
__HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR));
/* Enable Rx DMA Request */
SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
-error:
- /* Process Unlocked */
- __HAL_UNLOCK(hspi);
- return errorcode;
+ return HAL_OK;
}
/**
@@ -1931,12 +1908,11 @@
* @param Size amount of data to be sent
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData,
+HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData,
uint16_t Size)
{
uint32_t tmp_mode;
HAL_SPI_StateTypeDef tmp_state;
- HAL_StatusTypeDef errorcode = HAL_OK;
/* Check rx & tx dma handles */
assert_param(IS_SPI_DMA_HANDLE(hspi->hdmarx));
@@ -1945,26 +1921,25 @@
/* Check Direction parameter */
assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
- /* Process locked */
- __HAL_LOCK(hspi);
-
/* Init temporary variables */
tmp_state = hspi->State;
tmp_mode = hspi->Init.Mode;
if (!((tmp_state == HAL_SPI_STATE_READY) ||
- ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX))))
+ ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) &&
+ (tmp_state == HAL_SPI_STATE_BUSY_RX))))
{
- errorcode = HAL_BUSY;
- goto error;
+ return HAL_BUSY;
}
if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
{
- errorcode = HAL_ERROR;
- goto error;
+ return HAL_ERROR;
}
+ /* Process locked */
+ __HAL_LOCK(hspi);
+
/* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
if (hspi->State != HAL_SPI_STATE_BUSY_RX)
{
@@ -1973,7 +1948,7 @@
/* Set the transaction information */
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
- hspi->pTxBuffPtr = (uint8_t *)pTxData;
+ hspi->pTxBuffPtr = (const uint8_t *)pTxData;
hspi->TxXferSize = Size;
hspi->TxXferCount = Size;
hspi->pRxBuffPtr = (uint8_t *)pRxData;
@@ -2018,9 +1993,9 @@
{
/* Update SPI error code */
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
- errorcode = HAL_ERROR;
-
- goto error;
+ /* Process Unlocked */
+ __HAL_UNLOCK(hspi);
+ return HAL_ERROR;
}
/* Enable Rx DMA Request */
@@ -2039,9 +2014,9 @@
{
/* Update SPI error code */
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
- errorcode = HAL_ERROR;
-
- goto error;
+ /* Process Unlocked */
+ __HAL_UNLOCK(hspi);
+ return HAL_ERROR;
}
/* Check if the SPI is already enabled */
@@ -2050,16 +2025,17 @@
/* Enable SPI peripheral */
__HAL_SPI_ENABLE(hspi);
}
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hspi);
+
/* Enable the SPI Error Interrupt Bit */
__HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR));
/* Enable Tx DMA Request */
SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
-error :
- /* Process Unlocked */
- __HAL_UNLOCK(hspi);
- return errorcode;
+ return HAL_OK;
}
/**
@@ -2423,9 +2399,11 @@
{
HAL_StatusTypeDef errorcode = HAL_OK;
/* The Lock is not implemented on this API to allow the user application
- to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback():
+ to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or
+ HAL_SPI_TxRxCpltCallback():
when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
- and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback()
+ and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or
+ HAL_SPI_TxRxCpltCallback()
*/
/* Abort the SPI DMA tx Stream/Channel */
@@ -2710,7 +2688,7 @@
* the configuration information for SPI module.
* @retval SPI state
*/
-HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi)
+HAL_SPI_StateTypeDef HAL_SPI_GetState(const SPI_HandleTypeDef *hspi)
{
/* Return SPI handle state */
return hspi->State;
@@ -2722,7 +2700,7 @@
* the configuration information for SPI module.
* @retval SPI error code in bitmap format
*/
-uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi)
+uint32_t HAL_SPI_GetError(const SPI_HandleTypeDef *hspi)
{
/* Return SPI ErrorCode */
return hspi->ErrorCode;
@@ -2749,7 +2727,7 @@
*/
static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma)
{
- SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
+ SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent);
uint32_t tickstart;
/* Init tickstart for timeout management*/
@@ -2806,7 +2784,7 @@
*/
static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
{
- SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
+ SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent);
uint32_t tickstart;
#if (USE_SPI_CRC != 0U)
__IO uint32_t tmpreg = 0U;
@@ -2905,7 +2883,7 @@
*/
static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma)
{
- SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
+ SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent);
uint32_t tickstart;
#if (USE_SPI_CRC != 0U)
__IO uint32_t tmpreg = 0U;
@@ -2995,7 +2973,7 @@
*/
static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma)
{
- SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
+ SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent);
/* Call user Tx half complete callback */
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
@@ -3013,7 +2991,7 @@
*/
static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma)
{
- SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
+ SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent);
/* Call user Rx half complete callback */
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
@@ -3031,7 +3009,7 @@
*/
static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma)
{
- SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
+ SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent);
/* Call user TxRx half complete callback */
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
@@ -3049,7 +3027,7 @@
*/
static void SPI_DMAError(DMA_HandleTypeDef *hdma)
{
- SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
+ SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent);
/* Stop the disable DMA transfer on SPI side */
CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);
@@ -3072,7 +3050,7 @@
*/
static void SPI_DMAAbortOnError(DMA_HandleTypeDef *hdma)
{
- SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
+ SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent);
hspi->RxXferCount = 0U;
hspi->TxXferCount = 0U;
@@ -3094,7 +3072,7 @@
*/
static void SPI_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
{
- SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
+ SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent);
__IO uint32_t count;
hspi->hdmatx->XferAbortCallback = NULL;
@@ -3158,7 +3136,7 @@
*/
static void SPI_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
{
- SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
+ SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent);
/* Disable SPI Peripheral */
__HAL_SPI_DISABLE(hspi);
@@ -3279,7 +3257,7 @@
*/
static void SPI_2linesTxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
{
- *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr);
+ *(__IO uint8_t *)&hspi->Instance->DR = *((const uint8_t *)hspi->pTxBuffPtr);
hspi->pTxBuffPtr++;
hspi->TxXferCount--;
@@ -3372,7 +3350,7 @@
static void SPI_2linesTxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
{
/* Transmit data in 16 Bit mode */
- hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
+ hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr);
hspi->pTxBuffPtr += sizeof(uint16_t);
hspi->TxXferCount--;
@@ -3534,7 +3512,7 @@
*/
static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
{
- *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr);
+ *(__IO uint8_t *)&hspi->Instance->DR = *((const uint8_t *)hspi->pTxBuffPtr);
hspi->pTxBuffPtr++;
hspi->TxXferCount--;
@@ -3560,7 +3538,7 @@
static void SPI_TxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
{
/* Transmit data in 16 Bit mode */
- hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
+ hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr);
hspi->pTxBuffPtr += sizeof(uint16_t);
hspi->TxXferCount--;
@@ -3693,6 +3671,13 @@
*/
static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart)
{
+ /* Wait until TXE flag */
+ if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_TXE, SET, Timeout, Tickstart) != HAL_OK)
+ {
+ SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
+ return HAL_TIMEOUT;
+ }
+
/* Control the BSY flag */
if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK)
{
@@ -4008,7 +3993,8 @@
{
#if defined(SPI_CRC_ERROR_WORKAROUND_FEATURE) && (USE_SPI_CRC_ERROR_WORKAROUND != 0U)
/* Check how to handle this CRC error (workaround to be applied or not) */
- /* If CRC errors could be wrongly detected (issue 2.15.2 in STM32F10xxC/D/E silicon limitations ES (DocID14732 Rev 13) */
+ /* If CRC errors could be wrongly detected (issue 2.15.2 in STM32F10xxC/D/E silicon limitations ES
+ (DocID14732 Rev 13)) */
if (hspi->Instance == SPI2)
{
if (hspi->Instance->RXCRCR == 0U)
diff --git a/Src/stm32f1xx_hal_sram.c b/Src/stm32f1xx_hal_sram.c
index d136ea4..c5a3719 100644
--- a/Src/stm32f1xx_hal_sram.c
+++ b/Src/stm32f1xx_hal_sram.c
@@ -209,7 +209,7 @@
/* Initialize SRAM extended mode timing Interface */
(void)FSMC_NORSRAM_Extended_Timing_Init(hsram->Extended, ExtTiming, hsram->Init.NSBank,
- hsram->Init.ExtendedMode);
+ hsram->Init.ExtendedMode);
/* Enable the NORSRAM device */
__FSMC_NORSRAM_ENABLE(hsram->Instance, hsram->Init.NSBank);
@@ -1038,6 +1038,7 @@
*/
static void SRAM_DMACplt(DMA_HandleTypeDef *hdma)
{
+ /* Derogation MISRAC2012-Rule-11.5 */
SRAM_HandleTypeDef *hsram = (SRAM_HandleTypeDef *)(hdma->Parent);
/* Disable the DMA channel */
@@ -1060,6 +1061,7 @@
*/
static void SRAM_DMACpltProt(DMA_HandleTypeDef *hdma)
{
+ /* Derogation MISRAC2012-Rule-11.5 */
SRAM_HandleTypeDef *hsram = (SRAM_HandleTypeDef *)(hdma->Parent);
/* Disable the DMA channel */
@@ -1082,6 +1084,7 @@
*/
static void SRAM_DMAError(DMA_HandleTypeDef *hdma)
{
+ /* Derogation MISRAC2012-Rule-11.5 */
SRAM_HandleTypeDef *hsram = (SRAM_HandleTypeDef *)(hdma->Parent);
/* Disable the DMA channel */
diff --git a/Src/stm32f1xx_hal_tim.c b/Src/stm32f1xx_hal_tim.c
index 587dabc..c00a9de 100644
--- a/Src/stm32f1xx_hal_tim.c
+++ b/Src/stm32f1xx_hal_tim.c
@@ -3830,7 +3830,7 @@
if ((itsource & (TIM_IT_CC1)) == (TIM_IT_CC1))
{
{
- __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1);
+ __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC1);
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
/* Input capture event */
@@ -3862,7 +3862,7 @@
{
if ((itsource & (TIM_IT_CC2)) == (TIM_IT_CC2))
{
- __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2);
+ __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC2);
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
/* Input capture event */
if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
@@ -3892,7 +3892,7 @@
{
if ((itsource & (TIM_IT_CC3)) == (TIM_IT_CC3))
{
- __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3);
+ __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC3);
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
/* Input capture event */
if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
@@ -3922,7 +3922,7 @@
{
if ((itsource & (TIM_IT_CC4)) == (TIM_IT_CC4))
{
- __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4);
+ __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC4);
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
/* Input capture event */
if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
@@ -3952,7 +3952,7 @@
{
if ((itsource & (TIM_IT_UPDATE)) == (TIM_IT_UPDATE))
{
- __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
+ __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_UPDATE);
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->PeriodElapsedCallback(htim);
#else
@@ -3965,7 +3965,7 @@
{
if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK))
{
- __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
+ __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK);
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->BreakCallback(htim);
#else
@@ -3978,7 +3978,7 @@
{
if ((itsource & (TIM_IT_TRIGGER)) == (TIM_IT_TRIGGER))
{
- __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
+ __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_TRIGGER);
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->TriggerCallback(htim);
#else
@@ -3991,7 +3991,7 @@
{
if ((itsource & (TIM_IT_COM)) == (TIM_IT_COM))
{
- __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
+ __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_COM);
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->CommutationCallback(htim);
#else
@@ -4478,7 +4478,8 @@
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
- uint32_t BurstRequestSrc, const uint32_t *BurstBuffer, uint32_t BurstLength)
+ uint32_t BurstRequestSrc, const uint32_t *BurstBuffer,
+ uint32_t BurstLength)
{
HAL_StatusTypeDef status;
@@ -6943,7 +6944,6 @@
tmpccer |= (OC_Config->OCNPolarity << 4U);
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC2NE;
-
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
diff --git a/Src/stm32f1xx_hal_tim_ex.c b/Src/stm32f1xx_hal_tim_ex.c
index ff8c8f5..8a565a6 100644
--- a/Src/stm32f1xx_hal_tim_ex.c
+++ b/Src/stm32f1xx_hal_tim_ex.c
@@ -835,7 +835,7 @@
/* Disable the TIM Break interrupt (only if no more channel is active) */
tmpccer = htim->Instance->CCER;
- if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
+ if ((tmpccer & TIM_CCER_CCxNE_MASK) == (uint32_t)RESET)
{
__HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
}
@@ -1081,17 +1081,6 @@
(+) Stop the Complementary PWM and disable interrupts.
(+) Start the Complementary PWM and enable DMA transfers.
(+) Stop the Complementary PWM and disable DMA transfers.
- (+) Start the Complementary Input Capture measurement.
- (+) Stop the Complementary Input Capture.
- (+) Start the Complementary Input Capture and enable interrupts.
- (+) Stop the Complementary Input Capture and disable interrupts.
- (+) Start the Complementary Input Capture and enable DMA transfers.
- (+) Stop the Complementary Input Capture and disable DMA transfers.
- (+) Start the Complementary One Pulse generation.
- (+) Stop the Complementary One Pulse.
- (+) Start the Complementary One Pulse and enable interrupts.
- (+) Stop the Complementary One Pulse and disable interrupts.
-
@endverbatim
* @{
*/
@@ -1317,7 +1306,7 @@
/* Disable the TIM Break interrupt (only if no more channel is active) */
tmpccer = htim->Instance->CCER;
- if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
+ if ((tmpccer & TIM_CCER_CCxNE_MASK) == (uint32_t)RESET)
{
__HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
}
@@ -2100,7 +2089,7 @@
*/
/**
- * @brief Hall commutation changed callback in non-blocking mode
+ * @brief Commutation callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
@@ -2114,7 +2103,7 @@
*/
}
/**
- * @brief Hall commutation changed half complete callback in non-blocking mode
+ * @brief Commutation half complete callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
@@ -2129,7 +2118,7 @@
}
/**
- * @brief Hall Break detection callback in non-blocking mode
+ * @brief Break detection callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
@@ -2280,15 +2269,6 @@
TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
}
}
- else if (hdma == htim->hdma[TIM_DMA_ID_CC4])
- {
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
-
- if (hdma->Init.Mode == DMA_NORMAL)
- {
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY);
- }
- }
else
{
/* nothing to do */
@@ -2357,13 +2337,13 @@
{
uint32_t tmp;
- tmp = TIM_CCER_CC1NE << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
+ tmp = TIM_CCER_CC1NE << (Channel & 0xFU); /* 0xFU = 15 bits max shift */
/* Reset the CCxNE Bit */
TIMx->CCER &= ~tmp;
/* Set or reset the CCxNE Bit */
- TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
+ TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0xFU)); /* 0xFU = 15 bits max shift */
}
/**
* @}
diff --git a/Src/stm32f1xx_hal_uart.c b/Src/stm32f1xx_hal_uart.c
index 0c79538..b7cf66c 100644
--- a/Src/stm32f1xx_hal_uart.c
+++ b/Src/stm32f1xx_hal_uart.c
@@ -1792,21 +1792,18 @@
status = UART_Start_Receive_DMA(huart, pData, Size);
/* Check Rx process has been successfully started */
- if (status == HAL_OK)
+ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
{
- if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
- {
- __HAL_UART_CLEAR_IDLEFLAG(huart);
- ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
- }
- else
- {
- /* In case of errors already pending when reception is started,
- Interrupts may have already been raised and lead to reception abortion.
- (Overrun error for instance).
- In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */
- status = HAL_ERROR;
- }
+ __HAL_UART_CLEAR_IDLEFLAG(huart);
+ ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
+ }
+ else
+ {
+ /* In case of errors already pending when reception is started,
+ Interrupts may have already been raised and lead to reception abortion.
+ (Overrun error for instance).
+ In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */
+ status = HAL_ERROR;
}
return status;
diff --git a/Src/stm32f1xx_hal_usart.c b/Src/stm32f1xx_hal_usart.c
index 7c01b90..4423252 100644
--- a/Src/stm32f1xx_hal_usart.c
+++ b/Src/stm32f1xx_hal_usart.c
@@ -2084,6 +2084,9 @@
/**
* @}
*/
+/**
+ * @}
+ */
/** @defgroup USART_Private_Functions USART Private Functions
* @{
@@ -2798,10 +2801,6 @@
* @}
*/
-/**
- * @}
- */
-
#endif /* HAL_USART_MODULE_ENABLED */
/**
* @}
diff --git a/Src/stm32f1xx_hal_wwdg.c b/Src/stm32f1xx_hal_wwdg.c
index b14db97..ad8704b 100644
--- a/Src/stm32f1xx_hal_wwdg.c
+++ b/Src/stm32f1xx_hal_wwdg.c
@@ -122,7 +122,6 @@
(+) __HAL_WWDG_ENABLE_IT: Enable the WWDG early wakeup interrupt
@endverbatim
- ******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -418,3 +417,4 @@
/**
* @}
*/
+
diff --git a/Src/stm32f1xx_ll_fsmc.c b/Src/stm32f1xx_ll_fsmc.c
index 3d42565..f783c99 100644
--- a/Src/stm32f1xx_ll_fsmc.c
+++ b/Src/stm32f1xx_ll_fsmc.c
@@ -60,7 +60,7 @@
* @{
*/
#if defined(HAL_NOR_MODULE_ENABLED) || defined(HAL_NAND_MODULE_ENABLED) || defined(HAL_PCCARD_MODULE_ENABLED) \
- || defined(HAL_SRAM_MODULE_ENABLED)
+ || defined(HAL_SRAM_MODULE_ENABLED)
/** @defgroup FSMC_LL FSMC Low Layer
* @brief FSMC driver modules
@@ -206,7 +206,7 @@
* @retval HAL status
*/
HAL_StatusTypeDef FSMC_NORSRAM_Init(FSMC_NORSRAM_TypeDef *Device,
- FSMC_NORSRAM_InitTypeDef *Init)
+ const FSMC_NORSRAM_InitTypeDef *Init)
{
uint32_t flashaccess;
uint32_t btcr_reg;
@@ -289,7 +289,7 @@
* @retval HAL status
*/
HAL_StatusTypeDef FSMC_NORSRAM_DeInit(FSMC_NORSRAM_TypeDef *Device,
- FSMC_NORSRAM_EXTENDED_TypeDef *ExDevice, uint32_t Bank)
+ FSMC_NORSRAM_EXTENDED_TypeDef *ExDevice, uint32_t Bank)
{
/* Check the parameters */
assert_param(IS_FSMC_NORSRAM_DEVICE(Device));
@@ -326,7 +326,7 @@
* @retval HAL status
*/
HAL_StatusTypeDef FSMC_NORSRAM_Timing_Init(FSMC_NORSRAM_TypeDef *Device,
- FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank)
+ const FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank)
{
/* Check the parameters */
@@ -341,13 +341,14 @@
assert_param(IS_FSMC_NORSRAM_BANK(Bank));
/* Set FSMC_NORSRAM device timing parameters */
- MODIFY_REG(Device->BTCR[Bank + 1U], BTR_CLEAR_MASK, (Timing->AddressSetupTime |
- ((Timing->AddressHoldTime) << FSMC_BTRx_ADDHLD_Pos) |
- ((Timing->DataSetupTime) << FSMC_BTRx_DATAST_Pos) |
- ((Timing->BusTurnAroundDuration) << FSMC_BTRx_BUSTURN_Pos) |
- (((Timing->CLKDivision) - 1U) << FSMC_BTRx_CLKDIV_Pos) |
- (((Timing->DataLatency) - 2U) << FSMC_BTRx_DATLAT_Pos) |
- (Timing->AccessMode)));
+ Device->BTCR[Bank + 1U] =
+ (Timing->AddressSetupTime << FSMC_BTRx_ADDSET_Pos) |
+ (Timing->AddressHoldTime << FSMC_BTRx_ADDHLD_Pos) |
+ (Timing->DataSetupTime << FSMC_BTRx_DATAST_Pos) |
+ (Timing->BusTurnAroundDuration << FSMC_BTRx_BUSTURN_Pos) |
+ ((Timing->CLKDivision - 1U) << FSMC_BTRx_CLKDIV_Pos) |
+ ((Timing->DataLatency - 2U) << FSMC_BTRx_DATLAT_Pos) |
+ Timing->AccessMode;
return HAL_OK;
}
@@ -365,8 +366,8 @@
* @retval HAL status
*/
HAL_StatusTypeDef FSMC_NORSRAM_Extended_Timing_Init(FSMC_NORSRAM_EXTENDED_TypeDef *Device,
- FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank,
- uint32_t ExtendedMode)
+ const FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank,
+ uint32_t ExtendedMode)
{
/* Check the parameters */
assert_param(IS_FSMC_EXTENDED_MODE(ExtendedMode));
@@ -526,7 +527,7 @@
* @param Init Pointer to NAND Initialization structure
* @retval HAL status
*/
-HAL_StatusTypeDef FSMC_NAND_Init(FSMC_NAND_TypeDef *Device, FSMC_NAND_InitTypeDef *Init)
+HAL_StatusTypeDef FSMC_NAND_Init(FSMC_NAND_TypeDef *Device, const FSMC_NAND_InitTypeDef *Init)
{
/* Check the parameters */
assert_param(IS_FSMC_NAND_DEVICE(Device));
@@ -574,7 +575,7 @@
* @retval HAL status
*/
HAL_StatusTypeDef FSMC_NAND_CommonSpace_Timing_Init(FSMC_NAND_TypeDef *Device,
- FSMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank)
+ const FSMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank)
{
/* Check the parameters */
assert_param(IS_FSMC_NAND_DEVICE(Device));
@@ -614,7 +615,7 @@
* @retval HAL status
*/
HAL_StatusTypeDef FSMC_NAND_AttributeSpace_Timing_Init(FSMC_NAND_TypeDef *Device,
- FSMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank)
+ const FSMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank)
{
/* Check the parameters */
assert_param(IS_FSMC_NAND_DEVICE(Device));
@@ -761,8 +762,8 @@
* @param Timeout Timeout wait value
* @retval HAL status
*/
-HAL_StatusTypeDef FSMC_NAND_GetECC(FSMC_NAND_TypeDef *Device, uint32_t *ECCval, uint32_t Bank,
- uint32_t Timeout)
+HAL_StatusTypeDef FSMC_NAND_GetECC(const FSMC_NAND_TypeDef *Device, uint32_t *ECCval, uint32_t Bank,
+ uint32_t Timeout)
{
uint32_t tickstart;
@@ -854,7 +855,7 @@
* @param Init Pointer to PCCARD Initialization structure
* @retval HAL status
*/
-HAL_StatusTypeDef FSMC_PCCARD_Init(FSMC_PCCARD_TypeDef *Device, FSMC_PCCARD_InitTypeDef *Init)
+HAL_StatusTypeDef FSMC_PCCARD_Init(FSMC_PCCARD_TypeDef *Device, const FSMC_PCCARD_InitTypeDef *Init)
{
/* Check the parameters */
assert_param(IS_FSMC_PCCARD_DEVICE(Device));
@@ -888,7 +889,7 @@
* @retval HAL status
*/
HAL_StatusTypeDef FSMC_PCCARD_CommonSpace_Timing_Init(FSMC_PCCARD_TypeDef *Device,
- FSMC_NAND_PCC_TimingTypeDef *Timing)
+ const FSMC_NAND_PCC_TimingTypeDef *Timing)
{
/* Check the parameters */
assert_param(IS_FSMC_PCCARD_DEVICE(Device));
@@ -917,7 +918,7 @@
* @retval HAL status
*/
HAL_StatusTypeDef FSMC_PCCARD_AttributeSpace_Timing_Init(FSMC_PCCARD_TypeDef *Device,
- FSMC_NAND_PCC_TimingTypeDef *Timing)
+ const FSMC_NAND_PCC_TimingTypeDef *Timing)
{
/* Check the parameters */
assert_param(IS_FSMC_PCCARD_DEVICE(Device));
@@ -946,7 +947,7 @@
* @retval HAL status
*/
HAL_StatusTypeDef FSMC_PCCARD_IOSpace_Timing_Init(FSMC_PCCARD_TypeDef *Device,
- FSMC_NAND_PCC_TimingTypeDef *Timing)
+ const FSMC_NAND_PCC_TimingTypeDef *Timing)
{
/* Check the parameters */
assert_param(IS_FSMC_PCCARD_DEVICE(Device));
diff --git a/Src/stm32f1xx_ll_spi.c b/Src/stm32f1xx_ll_spi.c
index 5f557d3..e528a69 100644
--- a/Src/stm32f1xx_ll_spi.c
+++ b/Src/stm32f1xx_ll_spi.c
@@ -119,7 +119,7 @@
* - SUCCESS: SPI registers are de-initialized
* - ERROR: SPI registers are not de-initialized
*/
-ErrorStatus LL_SPI_DeInit(SPI_TypeDef *SPIx)
+ErrorStatus LL_SPI_DeInit(const SPI_TypeDef *SPIx)
{
ErrorStatus status = ERROR;
@@ -168,8 +168,9 @@
/**
* @brief Initialize the SPI registers according to the specified parameters in SPI_InitStruct.
- * @note As some bits in SPI configuration registers can only be written when the SPI is disabled (SPI_CR1_SPE bit =0),
- * SPI peripheral should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
+ * @note As some bits in SPI configuration registers can only be written when the
+ * SPI is disabled (SPI_CR1_SPE bit = 0), SPI peripheral should be in disabled state prior
+ * calling this function. Otherwise, ERROR result will be returned.
* @param SPIx SPI Instance
* @param SPI_InitStruct pointer to a @ref LL_SPI_InitTypeDef structure
* @retval An ErrorStatus enumeration value. (Return always SUCCESS)
@@ -348,7 +349,7 @@
* - SUCCESS: SPI registers are de-initialized
* - ERROR: SPI registers are not de-initialized
*/
-ErrorStatus LL_I2S_DeInit(SPI_TypeDef *SPIx)
+ErrorStatus LL_I2S_DeInit(const SPI_TypeDef *SPIx)
{
return LL_SPI_DeInit(SPIx);
}
diff --git a/Src/stm32f1xx_ll_tim.c b/Src/stm32f1xx_ll_tim.c
index 6e01d0f..f111d51 100644
--- a/Src/stm32f1xx_ll_tim.c
+++ b/Src/stm32f1xx_ll_tim.c
@@ -766,8 +766,6 @@
assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));
assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity));
- assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState));
- assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity));
/* Disable the Channel 1: Reset the CC1E Bit */
CLEAR_BIT(TIMx->CCER, TIM_CCER_CC1E);
@@ -795,8 +793,10 @@
if (IS_TIM_BREAK_INSTANCE(TIMx))
{
- assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState));
assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCIdleState));
+ assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState));
+ assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity));
+ assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState));
/* Set the complementary output Polarity */
MODIFY_REG(tmpccer, TIM_CCER_CC1NP, TIM_OCInitStruct->OCNPolarity << 2U);
@@ -845,8 +845,6 @@
assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));
assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity));
- assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState));
- assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity));
/* Disable the Channel 2: Reset the CC2E Bit */
CLEAR_BIT(TIMx->CCER, TIM_CCER_CC2E);
@@ -874,8 +872,10 @@
if (IS_TIM_BREAK_INSTANCE(TIMx))
{
- assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState));
assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCIdleState));
+ assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState));
+ assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity));
+ assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState));
/* Set the complementary output Polarity */
MODIFY_REG(tmpccer, TIM_CCER_CC2NP, TIM_OCInitStruct->OCNPolarity << 6U);
@@ -924,8 +924,6 @@
assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));
assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity));
- assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState));
- assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity));
/* Disable the Channel 3: Reset the CC3E Bit */
CLEAR_BIT(TIMx->CCER, TIM_CCER_CC3E);
@@ -953,8 +951,10 @@
if (IS_TIM_BREAK_INSTANCE(TIMx))
{
- assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState));
assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCIdleState));
+ assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState));
+ assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity));
+ assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState));
/* Set the complementary output Polarity */
MODIFY_REG(tmpccer, TIM_CCER_CC3NP, TIM_OCInitStruct->OCNPolarity << 10U);
@@ -1003,8 +1003,6 @@
assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));
assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity));
- assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity));
- assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState));
/* Disable the Channel 4: Reset the CC4E Bit */
CLEAR_BIT(TIMx->CCER, TIM_CCER_CC4E);
@@ -1032,7 +1030,6 @@
if (IS_TIM_BREAK_INSTANCE(TIMx))
{
- assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState));
assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCIdleState));
/* Set the Output Idle state */
@@ -1054,7 +1051,6 @@
return SUCCESS;
}
-
/**
* @brief Configure the TIMx input channel 1.
* @param TIMx Timer Instance
diff --git a/Src/stm32f1xx_ll_usb.c b/Src/stm32f1xx_ll_usb.c
index 71bc7a0..7e481aa 100644
--- a/Src/stm32f1xx_ll_usb.c
+++ b/Src/stm32f1xx_ll_usb.c
@@ -452,7 +452,7 @@
* @arg USB_OTG_SPEED_FULL: Full speed mode
* @retval Hal status
*/
-HAL_StatusTypeDef USB_SetDevSpeed(USB_OTG_GlobalTypeDef *USBx, uint8_t speed)
+HAL_StatusTypeDef USB_SetDevSpeed(const USB_OTG_GlobalTypeDef *USBx, uint8_t speed)
{
uint32_t USBx_BASE = (uint32_t)USBx;
@@ -467,7 +467,7 @@
* This parameter can be one of these values:
* @arg USBD_FS_SPEED: Full speed mode
*/
-uint8_t USB_GetDevSpeed(USB_OTG_GlobalTypeDef *USBx)
+uint8_t USB_GetDevSpeed(const USB_OTG_GlobalTypeDef *USBx)
{
uint32_t USBx_BASE = (uint32_t)USBx;
uint8_t speed;
@@ -492,7 +492,7 @@
* @param ep pointer to endpoint structure
* @retval HAL status
*/
-HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
+HAL_StatusTypeDef USB_ActivateEndpoint(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep)
{
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t epnum = (uint32_t)ep->num;
@@ -530,7 +530,7 @@
* @param ep pointer to endpoint structure
* @retval HAL status
*/
-HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
+HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep)
{
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t epnum = (uint32_t)ep->num;
@@ -569,7 +569,7 @@
* @param ep pointer to endpoint structure
* @retval HAL status
*/
-HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
+HAL_StatusTypeDef USB_DeactivateEndpoint(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep)
{
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t epnum = (uint32_t)ep->num;
@@ -616,7 +616,7 @@
* @param ep pointer to endpoint structure
* @retval HAL status
*/
-HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
+HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep)
{
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t epnum = (uint32_t)ep->num;
@@ -792,7 +792,7 @@
* @param ep pointer to endpoint structure
* @retval HAL status
*/
-HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
+HAL_StatusTypeDef USB_EPStopXfer(const USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
{
__IO uint32_t count = 0U;
HAL_StatusTypeDef ret = HAL_OK;
@@ -852,7 +852,7 @@
* @param len Number of bytes to write
* @retval HAL status
*/
-HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src,
+HAL_StatusTypeDef USB_WritePacket(const USB_OTG_GlobalTypeDef *USBx, uint8_t *src,
uint8_t ch_ep_num, uint16_t len)
{
uint32_t USBx_BASE = (uint32_t)USBx;
@@ -880,7 +880,7 @@
* @param len Number of bytes to read
* @retval pointer to destination buffer
*/
-void *USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len)
+void *USB_ReadPacket(const USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len)
{
uint32_t USBx_BASE = (uint32_t)USBx;
uint8_t *pDest = dest;
@@ -922,7 +922,7 @@
* @param ep pointer to endpoint structure
* @retval HAL status
*/
-HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
+HAL_StatusTypeDef USB_EPSetStall(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep)
{
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t epnum = (uint32_t)ep->num;
@@ -953,7 +953,7 @@
* @param ep pointer to endpoint structure
* @retval HAL status
*/
-HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
+HAL_StatusTypeDef USB_EPClearStall(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep)
{
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t epnum = (uint32_t)ep->num;
@@ -1023,7 +1023,7 @@
* This parameter can be a value from 0 to 255
* @retval HAL status
*/
-HAL_StatusTypeDef USB_SetDevAddress(USB_OTG_GlobalTypeDef *USBx, uint8_t address)
+HAL_StatusTypeDef USB_SetDevAddress(const USB_OTG_GlobalTypeDef *USBx, uint8_t address)
{
uint32_t USBx_BASE = (uint32_t)USBx;
@@ -1038,7 +1038,7 @@
* @param USBx Selected device
* @retval HAL status
*/
-HAL_StatusTypeDef USB_DevConnect(USB_OTG_GlobalTypeDef *USBx)
+HAL_StatusTypeDef USB_DevConnect(const USB_OTG_GlobalTypeDef *USBx)
{
uint32_t USBx_BASE = (uint32_t)USBx;
@@ -1055,7 +1055,7 @@
* @param USBx Selected device
* @retval HAL status
*/
-HAL_StatusTypeDef USB_DevDisconnect(USB_OTG_GlobalTypeDef *USBx)
+HAL_StatusTypeDef USB_DevDisconnect(const USB_OTG_GlobalTypeDef *USBx)
{
uint32_t USBx_BASE = (uint32_t)USBx;
@@ -1088,7 +1088,7 @@
* @param chnum Channel number
* @retval USB Channel Interrupt status
*/
-uint32_t USB_ReadChInterrupts(USB_OTG_GlobalTypeDef *USBx, uint8_t chnum)
+uint32_t USB_ReadChInterrupts(const USB_OTG_GlobalTypeDef *USBx, uint8_t chnum)
{
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t tmpreg;
@@ -1104,7 +1104,7 @@
* @param USBx Selected device
* @retval USB Device OUT EP interrupt status
*/
-uint32_t USB_ReadDevAllOutEpInterrupt(USB_OTG_GlobalTypeDef *USBx)
+uint32_t USB_ReadDevAllOutEpInterrupt(const USB_OTG_GlobalTypeDef *USBx)
{
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t tmpreg;
@@ -1120,7 +1120,7 @@
* @param USBx Selected device
* @retval USB Device IN EP interrupt status
*/
-uint32_t USB_ReadDevAllInEpInterrupt(USB_OTG_GlobalTypeDef *USBx)
+uint32_t USB_ReadDevAllInEpInterrupt(const USB_OTG_GlobalTypeDef *USBx)
{
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t tmpreg;
@@ -1138,7 +1138,7 @@
* This parameter can be a value from 0 to 15
* @retval Device OUT EP Interrupt register
*/
-uint32_t USB_ReadDevOutEPInterrupt(USB_OTG_GlobalTypeDef *USBx, uint8_t epnum)
+uint32_t USB_ReadDevOutEPInterrupt(const USB_OTG_GlobalTypeDef *USBx, uint8_t epnum)
{
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t tmpreg;
@@ -1156,7 +1156,7 @@
* This parameter can be a value from 0 to 15
* @retval Device IN EP Interrupt register
*/
-uint32_t USB_ReadDevInEPInterrupt(USB_OTG_GlobalTypeDef *USBx, uint8_t epnum)
+uint32_t USB_ReadDevInEPInterrupt(const USB_OTG_GlobalTypeDef *USBx, uint8_t epnum)
{
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t tmpreg;
@@ -1190,7 +1190,7 @@
* 0 : Host
* 1 : Device
*/
-uint32_t USB_GetMode(USB_OTG_GlobalTypeDef *USBx)
+uint32_t USB_GetMode(const USB_OTG_GlobalTypeDef *USBx)
{
return ((USBx->GINTSTS) & 0x1U);
}
@@ -1200,7 +1200,7 @@
* @param USBx Selected device
* @retval HAL status
*/
-HAL_StatusTypeDef USB_ActivateSetup(USB_OTG_GlobalTypeDef *USBx)
+HAL_StatusTypeDef USB_ActivateSetup(const USB_OTG_GlobalTypeDef *USBx)
{
uint32_t USBx_BASE = (uint32_t)USBx;
@@ -1218,10 +1218,10 @@
* @param psetup pointer to setup packet
* @retval HAL status
*/
-HAL_StatusTypeDef USB_EP0_OutStart(USB_OTG_GlobalTypeDef *USBx, uint8_t *psetup)
+HAL_StatusTypeDef USB_EP0_OutStart(const USB_OTG_GlobalTypeDef *USBx, const uint8_t *psetup)
{
uint32_t USBx_BASE = (uint32_t)USBx;
- uint32_t gSNPSiD = *(__IO uint32_t *)(&USBx->CID + 0x1U);
+ uint32_t gSNPSiD = *(__IO const uint32_t *)(&USBx->CID + 0x1U);
UNUSED(psetup);
if (gSNPSiD > USB_OTG_CORE_ID_300A)
@@ -1349,7 +1349,7 @@
* HCFG_6_MHZ : Low Speed 6 MHz Clock
* @retval HAL status
*/
-HAL_StatusTypeDef USB_InitFSLSPClkSel(USB_OTG_GlobalTypeDef *USBx, uint8_t freq)
+HAL_StatusTypeDef USB_InitFSLSPClkSel(const USB_OTG_GlobalTypeDef *USBx, uint8_t freq)
{
uint32_t USBx_BASE = (uint32_t)USBx;
@@ -1379,7 +1379,7 @@
* @note (1)The application must wait at least 10 ms
* before clearing the reset bit.
*/
-HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx)
+HAL_StatusTypeDef USB_ResetPort(const USB_OTG_GlobalTypeDef *USBx)
{
uint32_t USBx_BASE = (uint32_t)USBx;
@@ -1406,7 +1406,7 @@
* 1 : Activate VBUS
* @retval HAL status
*/
-HAL_StatusTypeDef USB_DriveVbus(USB_OTG_GlobalTypeDef *USBx, uint8_t state)
+HAL_StatusTypeDef USB_DriveVbus(const USB_OTG_GlobalTypeDef *USBx, uint8_t state)
{
uint32_t USBx_BASE = (uint32_t)USBx;
__IO uint32_t hprt0 = 0U;
@@ -1704,7 +1704,7 @@
* @param USBx Selected device
* @retval HAL state
*/
-uint32_t USB_HC_ReadInterrupt(USB_OTG_GlobalTypeDef *USBx)
+uint32_t USB_HC_ReadInterrupt(const USB_OTG_GlobalTypeDef *USBx)
{
uint32_t USBx_BASE = (uint32_t)USBx;
@@ -1718,7 +1718,7 @@
* This parameter can be a value from 1 to 15
* @retval HAL state
*/
-HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx, uint8_t hc_num)
+HAL_StatusTypeDef USB_HC_Halt(const USB_OTG_GlobalTypeDef *USBx, uint8_t hc_num)
{
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t hcnum = (uint32_t)hc_num;
@@ -1802,7 +1802,7 @@
* This parameter can be a value from 1 to 15
* @retval HAL state
*/
-HAL_StatusTypeDef USB_DoPing(USB_OTG_GlobalTypeDef *USBx, uint8_t ch_num)
+HAL_StatusTypeDef USB_DoPing(const USB_OTG_GlobalTypeDef *USBx, uint8_t ch_num)
{
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t chnum = (uint32_t)ch_num;
@@ -1891,7 +1891,7 @@
* @param USBx Selected device
* @retval HAL status
*/
-HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_OTG_GlobalTypeDef *USBx)
+HAL_StatusTypeDef USB_ActivateRemoteWakeup(const USB_OTG_GlobalTypeDef *USBx)
{
uint32_t USBx_BASE = (uint32_t)USBx;
@@ -1909,7 +1909,7 @@
* @param USBx Selected device
* @retval HAL status
*/
-HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_OTG_GlobalTypeDef *USBx)
+HAL_StatusTypeDef USB_DeActivateRemoteWakeup(const USB_OTG_GlobalTypeDef *USBx)
{
uint32_t USBx_BASE = (uint32_t)USBx;
@@ -2186,10 +2186,6 @@
PCD_CLEAR_RX_DTOG(USBx, ep->num);
PCD_CLEAR_TX_DTOG(USBx, ep->num);
- /* Set endpoint RX count */
- PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, ep->maxpacket);
-
- /* Set endpoint RX to valid state */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
}
@@ -2294,7 +2290,7 @@
/* IN endpoint */
if (ep->is_in == 1U)
{
- /* Multi packet transfer */
+ /*Multi packet transfer*/
if (ep->xfer_len > ep->maxpacket)
{
len = ep->maxpacket;
@@ -2396,9 +2392,9 @@
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
}
}
- else /* Manage isochronous double buffer IN mode */
+ else /* manage isochronous double buffer IN mode */
{
- /* Each Time to write in PMA xfer_len_db will */
+ /* each Time to write in PMA xfer_len_db will */
ep->xfer_len_db -= len;
/* Fill the data buffer */
@@ -2430,25 +2426,19 @@
{
if (ep->doublebuffer == 0U)
{
- if ((ep->xfer_len == 0U) && (ep->type == EP_TYPE_CTRL))
- {
- /* This is a status out stage set the OUT_STATUS */
- PCD_SET_OUT_STATUS(USBx, ep->num);
- }
- else
- {
- PCD_CLEAR_OUT_STATUS(USBx, ep->num);
- }
-
/* Multi packet transfer */
if (ep->xfer_len > ep->maxpacket)
{
- ep->xfer_len -= ep->maxpacket;
+ len = ep->maxpacket;
+ ep->xfer_len -= len;
}
else
{
+ len = ep->xfer_len;
ep->xfer_len = 0U;
}
+ /* configure and validate Rx endpoint */
+ PCD_SET_EP_RX_CNT(USBx, ep->num, len);
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
@@ -2457,13 +2447,15 @@
/* Set the Double buffer counter */
if (ep->type == EP_TYPE_BULK)
{
+ PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, ep->maxpacket);
+
/* Coming from ISR */
if (ep->xfer_count != 0U)
{
- /* Update last value to check if there is blocking state */
+ /* update last value to check if there is blocking state */
wEPVal = PCD_GET_ENDPOINT(USBx, ep->num);
- /* Blocking State */
+ /*Blocking State */
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
{
@@ -2474,8 +2466,18 @@
/* iso out double */
else if (ep->type == EP_TYPE_ISOC)
{
- /* Only single packet transfer supported in FS */
- ep->xfer_len = 0U;
+ /* Multi packet transfer */
+ if (ep->xfer_len > ep->maxpacket)
+ {
+ len = ep->maxpacket;
+ ep->xfer_len -= len;
+ }
+ else
+ {
+ len = ep->xfer_len;
+ ep->xfer_len = 0U;
+ }
+ PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, len);
}
else
{
@@ -2519,22 +2521,25 @@
*/
HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
- if (ep->is_in != 0U)
+ if (ep->doublebuffer == 0U)
{
- PCD_CLEAR_TX_DTOG(USBx, ep->num);
-
- if (ep->type != EP_TYPE_ISOC)
+ if (ep->is_in != 0U)
{
- /* Configure NAK status for the Endpoint */
- PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
- }
- }
- else
- {
- PCD_CLEAR_RX_DTOG(USBx, ep->num);
+ PCD_CLEAR_TX_DTOG(USBx, ep->num);
- /* Configure VALID status for the Endpoint */
- PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
+ if (ep->type != EP_TYPE_ISOC)
+ {
+ /* Configure NAK status for the Endpoint */
+ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
+ }
+ }
+ else
+ {
+ PCD_CLEAR_RX_DTOG(USBx, ep->num);
+
+ /* Configure VALID status for the Endpoint */
+ PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
+ }
}
return HAL_OK;
