commit 806ff0c6348130fd783a0755ea5ce988200b2ce7
author Ali Labbene <ali.labbene@st.com> Wed Nov 02 12:35:59 2022 +0100
committer Ali Labbene <ali.labbene@st.com> Wed Nov 02 12:35:59 2022 +0100
tree 1099498883bd32fcd2c2892baae58cdee538dd24
parent 30a6c8fdb588ab5bd43235cc61b613cc21fe8f6d

[HAL][IRDA] Fix wrong cast when computing the USARTDIV value in IRDA_SetConfig()

Src/stm32f3xx_hal_irda.c

diff --git a/Src/stm32f3xx_hal_irda.c b/Src/stm32f3xx_hal_irda.c
index 3746c5e..59a15ea 100644
--- a/Src/stm32f3xx_hal_irda.c
+++ b/Src/stm32f3xx_hal_irda.c
@@ -2283,21 +2283,21 @@
   {
     case IRDA_CLOCKSOURCE_PCLK1:
       pclk = HAL_RCC_GetPCLK1Freq();
-      tmpreg = (uint16_t)(IRDA_DIV_SAMPLING16(pclk, hirda->Init.BaudRate));
+      tmpreg = (uint32_t)(IRDA_DIV_SAMPLING16(pclk, hirda->Init.BaudRate));
       break;
     case IRDA_CLOCKSOURCE_PCLK2:
       pclk = HAL_RCC_GetPCLK2Freq();
-      tmpreg = (uint16_t)(IRDA_DIV_SAMPLING16(pclk, hirda->Init.BaudRate));
+      tmpreg = (uint32_t)(IRDA_DIV_SAMPLING16(pclk, hirda->Init.BaudRate));
       break;
     case IRDA_CLOCKSOURCE_HSI:
-      tmpreg = (uint16_t)(IRDA_DIV_SAMPLING16(HSI_VALUE, hirda->Init.BaudRate));
+      tmpreg = (uint32_t)(IRDA_DIV_SAMPLING16(HSI_VALUE, hirda->Init.BaudRate));
       break;
     case IRDA_CLOCKSOURCE_SYSCLK:
       pclk = HAL_RCC_GetSysClockFreq();
-      tmpreg = (uint16_t)(IRDA_DIV_SAMPLING16(pclk, hirda->Init.BaudRate));
+      tmpreg = (uint32_t)(IRDA_DIV_SAMPLING16(pclk, hirda->Init.BaudRate));
       break;
     case IRDA_CLOCKSOURCE_LSE:
-      tmpreg = (uint16_t)(IRDA_DIV_SAMPLING16((uint32_t)LSE_VALUE, hirda->Init.BaudRate));
+      tmpreg = (uint32_t)(IRDA_DIV_SAMPLING16((uint32_t)LSE_VALUE, hirda->Init.BaudRate));
       break;
     default:
       ret = HAL_ERROR;
@@ -2307,7 +2307,7 @@
   /* USARTDIV must be greater than or equal to 0d16 */
   if ((tmpreg >= USART_BRR_MIN) && (tmpreg <= USART_BRR_MAX))
   {
-    hirda->Instance->BRR = tmpreg;
+    hirda->Instance->BRR = (uint16_t)tmpreg;
   }
   else
   {