[HAL][I2C] Update the HAL I2C driver to disactivate all interrupts after the end of transaction
diff --git a/Src/stm32f4xx_hal_fmpi2c.c b/Src/stm32f4xx_hal_fmpi2c.c
index eb99ba6..602cea4 100644
--- a/Src/stm32f4xx_hal_fmpi2c.c
+++ b/Src/stm32f4xx_hal_fmpi2c.c
@@ -2197,11 +2197,11 @@
/* Note : The FMPI2C interrupts must be enabled after unlocking current process
to avoid the risk of FMPI2C interrupt handle execution before current
process unlock */
- /* Enable ERR, TC, STOP, NACK, TXI interrupt */
+ /* Enable ERR, TC, STOP, NACK, RXI interrupt */
/* possible to enable all of these */
/* FMPI2C_IT_ERRI | FMPI2C_IT_TCI | FMPI2C_IT_STOPI | FMPI2C_IT_NACKI |
FMPI2C_IT_ADDRI | FMPI2C_IT_RXI | FMPI2C_IT_TXI */
- FMPI2C_Enable_IRQ(hfmpi2c, FMPI2C_XFER_TX_IT);
+ FMPI2C_Enable_IRQ(hfmpi2c, FMPI2C_XFER_RX_IT);
}
return HAL_OK;
@@ -2855,11 +2855,11 @@
to avoid the risk of FMPI2C interrupt handle execution before current
process unlock */
- /* Enable ERR, TC, STOP, NACK, RXI interrupt */
+ /* Enable ERR, TC, STOP, NACK, TXI interrupt */
/* possible to enable all of these */
/* FMPI2C_IT_ERRI | FMPI2C_IT_TCI | FMPI2C_IT_STOPI | FMPI2C_IT_NACKI |
FMPI2C_IT_ADDRI | FMPI2C_IT_RXI | FMPI2C_IT_TXI */
- FMPI2C_Enable_IRQ(hfmpi2c, (FMPI2C_XFER_TX_IT | FMPI2C_XFER_RX_IT));
+ FMPI2C_Enable_IRQ(hfmpi2c, FMPI2C_XFER_TX_IT);
return HAL_OK;
}
@@ -3852,11 +3852,11 @@
/* Note : The FMPI2C interrupts must be enabled after unlocking current process
to avoid the risk of FMPI2C interrupt handle execution before current
process unlock */
- /* Enable ERR, TC, STOP, NACK, TXI interrupt */
+ /* Enable ERR, TC, STOP, NACK, RXI interrupt */
/* possible to enable all of these */
/* FMPI2C_IT_ERRI | FMPI2C_IT_TCI | FMPI2C_IT_STOPI | FMPI2C_IT_NACKI |
FMPI2C_IT_ADDRI | FMPI2C_IT_RXI | FMPI2C_IT_TXI */
- FMPI2C_Enable_IRQ(hfmpi2c, FMPI2C_XFER_TX_IT);
+ FMPI2C_Enable_IRQ(hfmpi2c, FMPI2C_XFER_RX_IT);
}
return HAL_OK;
@@ -5101,6 +5101,12 @@
else if ((FMPI2C_CHECK_FLAG(tmpITFlags, FMPI2C_FLAG_TC) != RESET) && \
(FMPI2C_CHECK_IT_SOURCE(ITSources, FMPI2C_IT_TCI) != RESET))
{
+ /* Disable Interrupt related to address step */
+ FMPI2C_Disable_IRQ(hfmpi2c, FMPI2C_XFER_TX_IT);
+
+ /* Enable ERR, TC, STOP, NACK and RXI interrupts */
+ FMPI2C_Enable_IRQ(hfmpi2c, FMPI2C_XFER_RX_IT);
+
if (hfmpi2c->State == HAL_FMPI2C_STATE_BUSY_RX)
{
direction = FMPI2C_GENERATE_START_READ;
@@ -5467,6 +5473,9 @@
else if ((FMPI2C_CHECK_FLAG(ITFlags, FMPI2C_FLAG_TCR) != RESET) && \
(FMPI2C_CHECK_IT_SOURCE(ITSources, FMPI2C_IT_TCI) != RESET))
{
+ /* Disable Interrupt related to address step */
+ FMPI2C_Disable_IRQ(hfmpi2c, FMPI2C_XFER_TX_IT);
+
/* Enable only Error interrupt */
FMPI2C_Enable_IRQ(hfmpi2c, FMPI2C_XFER_ERROR_IT);
@@ -5509,6 +5518,12 @@
else if ((FMPI2C_CHECK_FLAG(ITFlags, FMPI2C_FLAG_TC) != RESET) && \
(FMPI2C_CHECK_IT_SOURCE(ITSources, FMPI2C_IT_TCI) != RESET))
{
+ /* Disable Interrupt related to address step */
+ FMPI2C_Disable_IRQ(hfmpi2c, FMPI2C_XFER_TX_IT);
+
+ /* Enable only Error and NACK interrupt for data transfer */
+ FMPI2C_Enable_IRQ(hfmpi2c, FMPI2C_XFER_ERROR_IT);
+
if (hfmpi2c->State == HAL_FMPI2C_STATE_BUSY_RX)
{
direction = FMPI2C_GENERATE_START_READ;
@@ -6193,7 +6208,8 @@
__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c, FMPI2C_FLAG_STOPF);
/* Disable Interrupts and Store Previous state */
- if ((tmpstate == HAL_FMPI2C_STATE_BUSY_TX) || (tmpstate == HAL_FMPI2C_STATE_BUSY_TX_LISTEN))
+ if ((tmpstate == HAL_FMPI2C_STATE_BUSY_TX) || (tmpstate == HAL_FMPI2C_STATE_BUSY_TX_LISTEN) ||
+ (tmpstate == HAL_FMPI2C_STATE_LISTEN))
{
FMPI2C_Disable_IRQ(hfmpi2c, FMPI2C_XFER_LISTEN_IT | FMPI2C_XFER_TX_IT);
hfmpi2c->PreviousState = FMPI2C_STATE_SLAVE_BUSY_TX;
@@ -7186,13 +7202,13 @@
if ((InterruptRequest & FMPI2C_XFER_TX_IT) == FMPI2C_XFER_TX_IT)
{
- /* Enable ERR, TC, STOP, NACK and RXI interrupts */
+ /* Enable ERR, TC, STOP, NACK and TXI interrupts */
tmpisr |= FMPI2C_IT_ERRI | FMPI2C_IT_TCI | FMPI2C_IT_STOPI | FMPI2C_IT_NACKI | FMPI2C_IT_TXI;
}
if ((InterruptRequest & FMPI2C_XFER_RX_IT) == FMPI2C_XFER_RX_IT)
{
- /* Enable ERR, TC, STOP, NACK and TXI interrupts */
+ /* Enable ERR, TC, STOP, NACK and RXI interrupts */
tmpisr |= FMPI2C_IT_ERRI | FMPI2C_IT_TCI | FMPI2C_IT_STOPI | FMPI2C_IT_NACKI | FMPI2C_IT_RXI;
}
