tree c69bb0c8431f703c0def457fcecd364241ca281c
parent 8bb859fd8458d35c21e66c2faa7b5be8784528b4
author Ali Labbene <ali.labbene@st.com> 1653507954 +0100
committer Ali Labbene <ali.labbene@st.com> 1653507954 +0100

[HAL][ETH] Ensure a delay of 4 TX_CLK/RX_CLK cycles between two successive write operations to the same register