commit bcfd32d9cd8d0f46c7dec7fc888696e03fc6c9d6
author Eya <aya.selmi1@st.com> Wed Mar 03 16:11:08 2021 +0100
committer Eya <aya.selmi1@st.com> Wed Mar 03 16:11:08 2021 +0100
tree 753e676ea93b8853c865d1df42f3c1199f390ae5
parent f7ffdf6bf72110e58b42c632b0a051df5997e4ee

Release v1.2.9

Src/stm32f7xx_ll_lptim.c

diff --git a/Src/stm32f7xx_ll_lptim.c b/Src/stm32f7xx_ll_lptim.c
index 63c8a55..6c58544 100644
--- a/Src/stm32f7xx_ll_lptim.c
+++ b/Src/stm32f7xx_ll_lptim.c
@@ -48,22 +48,22 @@
   * @{
   */
 #define IS_LL_LPTIM_CLOCK_SOURCE(__VALUE__) (((__VALUE__) == LL_LPTIM_CLK_SOURCE_INTERNAL) \
-                                          || ((__VALUE__) == LL_LPTIM_CLK_SOURCE_EXTERNAL))
+                                             || ((__VALUE__) == LL_LPTIM_CLK_SOURCE_EXTERNAL))
 
 #define IS_LL_LPTIM_CLOCK_PRESCALER(__VALUE__) (((__VALUE__) == LL_LPTIM_PRESCALER_DIV1)   \
-                                             || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV2)   \
-                                             || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV4)   \
-                                             || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV8)   \
-                                             || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV16)  \
-                                             || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV32)  \
-                                             || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV64)  \
-                                             || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV128))
+                                                || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV2)   \
+                                                || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV4)   \
+                                                || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV8)   \
+                                                || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV16)  \
+                                                || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV32)  \
+                                                || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV64)  \
+                                                || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV128))
 
 #define IS_LL_LPTIM_WAVEFORM(__VALUE__) (((__VALUE__) == LL_LPTIM_OUTPUT_WAVEFORM_PWM) \
-                                      || ((__VALUE__) == LL_LPTIM_OUTPUT_WAVEFORM_SETONCE))
+                                         || ((__VALUE__) == LL_LPTIM_OUTPUT_WAVEFORM_SETONCE))
 
 #define IS_LL_LPTIM_OUTPUT_POLARITY(__VALUE__) (((__VALUE__) == LL_LPTIM_OUTPUT_POLARITY_REGULAR) \
-                                             || ((__VALUE__) == LL_LPTIM_OUTPUT_POLARITY_INVERSE))
+                                                || ((__VALUE__) == LL_LPTIM_OUTPUT_POLARITY_INVERSE))
 /**
   * @}
   */
@@ -240,8 +240,7 @@
       do
       {
         rcc_clock.SYSCLK_Frequency--; /* Used for timeout */
-      }
-      while (((LL_LPTIM_IsActiveFlag_CMPOK(LPTIMx) != 1UL)) && ((rcc_clock.SYSCLK_Frequency) > 0UL));
+      } while (((LL_LPTIM_IsActiveFlag_CMPOK(LPTIMx) != 1UL)) && ((rcc_clock.SYSCLK_Frequency) > 0UL));
 
       LL_LPTIM_ClearFlag_CMPOK(LPTIMx);
     }