)]}'
{
  "commit": "35b44dc1d7ab5049ee79c8d142c2f28643eda5c2",
  "tree": "3c50535154646ae9d0509522473e52f078a6fd2d",
  "parents": [
    "8e90e8f8e3f36507f5515b393ab10698012b70e6"
  ],
  "author": {
    "name": "Ali Labbene",
    "email": "ali.labbene@st.com",
    "time": "Mon Mar 14 18:16:47 2022 +0100"
  },
  "committer": {
    "name": "Ali Labbene",
    "email": "ali.labbene@st.com",
    "time": "Mon Mar 14 18:20:33 2022 +0100"
  },
  "message": "[HAL][UART] Handle UART concurrent register access in case of race condition between Tx and Rx transfers\n",
  "tree_diff": [
    {
      "type": "modify",
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      "old_mode": 33188,
      "old_path": "Inc/stm32l1xx_hal_uart.h",
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      "new_mode": 33188,
      "new_path": "Inc/stm32l1xx_hal_uart.h"
    },
    {
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}