commit dc56f5075c129cb7d8fd9cd8ca8878caa093d75c
author Rania JMAI <rania.jmai@st.com> Wed Jun 12 17:04:41 2024 +0100
committer Rania JMAI <rania.jmai@st.com> Wed Jun 12 17:04:41 2024 +0100
tree 3585611522ecfc01cd8eff96f773a849e1a76bba
parent 1e1ff183c67dd58b76912bc182304ffe1d7c5250

[HAL][SMBUS] Update SMBUS_ITErrorHandler to flush TXDR just in case of error

Src/stm32l4xx_hal_smbus.c

diff --git a/Src/stm32l4xx_hal_smbus.c b/Src/stm32l4xx_hal_smbus.c
index ec68cb2..cfbbcb2 100644
--- a/Src/stm32l4xx_hal_smbus.c
+++ b/Src/stm32l4xx_hal_smbus.c
@@ -2619,8 +2619,11 @@
     __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_PECERR);
   }
 
-  /* Flush TX register */
-  SMBUS_Flush_TXDR(hsmbus);
+  if (hsmbus->ErrorCode != HAL_SMBUS_ERROR_NONE)
+  {
+    /* Flush TX register */
+    SMBUS_Flush_TXDR(hsmbus);
+  }
 
   /* Store current volatile hsmbus->ErrorCode, misra rule */
   tmperror = hsmbus->ErrorCode;