)]}'
{
  "commit": "77534271b327d33f3f61e1f54cd8557b2fb142bf",
  "tree": "d01c5277e90bd680a69abccbbcd98f66c84d1cbd",
  "parents": [
    "6281a07b7e08629884ec93a89fea6e05c62e599c"
  ],
  "author": {
    "name": "郑紫阳10295048",
    "email": "zheng.ziyang@zte.com.cn",
    "time": "Wed Apr 15 10:33:35 2026 +0800"
  },
  "committer": {
    "name": "郑紫阳10295048",
    "email": "zheng.ziyang@zte.com.cn",
    "time": "Wed Apr 15 10:33:35 2026 +0800"
  },
  "message": "refactor: Align RISC-V implementation with AArch64 branchless mask extraction\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "d6d709ad703786211e4571f96dbe4a9e2c775c3c",
      "old_mode": 33188,
      "old_path": "snappy.cc",
      "new_id": "eab94f99b8e0044502679d763f3c3eb04bb40ba6",
      "new_mode": 33188,
      "new_path": "snappy.cc"
    }
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}