)]}'
{
  "commit": "b68435f083ccdc1c269ec983847d16af21f8da9d",
  "tree": "28d086f0046e4efa1d6a1f0775f43ee1c1ff95a4",
  "parents": [
    "6af9287fbdb913f0794d0148c6aa43b58e63c8e3"
  ],
  "author": {
    "name": "wanghan",
    "email": "wang.han15@sanechips.com.cn",
    "time": "Tue Jul 01 12:16:49 2025 +0800"
  },
  "committer": {
    "name": "wanghan",
    "email": "wang.han15@sanechips.com.cn",
    "time": "Mon Jul 28 18:23:35 2025 +0800"
  },
  "message": "build: Update benchmark submodule for RISC-V\n- Pins to b20cea67 to fix illegal instruction\n- Verified on openEuler RISC-V\n",
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